JP2002204150A - Semiconductor integrated circuit and motor drive control system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress pulsation of load current by performing accurate current control when constant current control is performed by repeating charge/ discharge of a current for a reactance load through an H bridge circuit mounted on an IC. SOLUTION: The semiconductor integrated circuit comprises an H bridge circuit for driving a coil load L being connected with a pair of external output terminals 15 and 16, a PWM control circuit 20 for driving the switching of output switch elements 11-14 in the H bridge circuit with a PWM signal and setting a charge mode, a low speed attenuation mode or a high speed attenuation mode of the H bridge circuit selectively for the load, a first current detection circuit 21 for detecting a load current dropping below a first set level in high speed attenuation mode for the load, and an output control logic circuit 23 for controlling a PWM control circuit by receiving a detection output from the first current detection circuit 21 and generating a control signal for making a switch to the low speed attenuation mode.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor integrated circuit (IC) and a motor drive control system, and more particularly to an H-bridge circuit control circuit suitable for driving a reactance load and a motor drive control system using the same. For example, it is used for driving a stepping motor or a DC motor used in a printer or the like.

[0002]

2. Description of the Related Art When an inductive load such as a motor coil is driven by an H-bridge circuit formed on an IC,
In order to perform ideal driving, the stability of the driving current (constant current control) and the variable capability (variable current control) of changing the driving current to a required value are required. In order to perform the constant current control and the variable current control efficiently, pulse width modulation (PWM) control is often used. PWM control is a method commonly used to control the amount of power by switching a reactive load (inductive load or capacitive load), and controls the charging and discharging (attenuation) of current to the load. The constant current control is performed by repeating.

FIG. 10 shows an example of a connection relationship between an H-bridge circuit formed on an IC and a coil of a stepping motor connected as a load external to the IC.

In FIG. 10, high voltage NMOSFETs (N-channel type MOS field effect transistors) 71 to 74 are used. Here, the NMOSFET 71 on the high side and the NMOSFET 72 on the low side are connected in series, and the series connection node is connected to the first external output terminal 75. Similarly, NM on the high side
The OSFET 73 and the low-side NMOSFET 74 are connected in series, and the series connection node is connected to the second external output terminal.
Connected to 76.

The drains of the high-side NMOSFETs 71 and 73 are connected in common and then connected to a motor power supply terminal 78 via a current detecting resistor 77. Each source is commonly connected to a ground terminal 79.

The pair of external output terminals 75 and
A coil L of a stepping motor is connected as a load outside the IC between the coils 76, and a motor power supply V is connected to the motor power supply terminal 78.

Note that Di1 to Di4 each correspond to the NMOSFET 7
A diode for absorbing a back electromotive force formed in parallel with 1 to 74 in parallel.

By controlling the gates of the NMOSFETs 71 to 74 of the H-bridge circuit by a PWM control circuit (not shown), the charge level to the coil load changes stepwise according to the change in the pulse width of the PWM signal input. A pseudo sine wave current is applied. When controlling the actual current flow in each step, control (Mixed Decay Mode) that normally combines the following three operation modes is used.
I do.

[0009] Here, 3 shown in FIG.
The two operation modes will be described with reference to the timing waveform of the NMOSFET gate application signal shown in FIG.

In the power supply mode (charge mode, charge mode) shown in FIG. 11A, one of the high-side transistor 73 and the low-side transistor 72 is controlled to be on by the PWM pulses U2 and L1. Power from the motor power supply V to the coil load L.

In the low-speed regeneration mode (slow decay mode) shown in FIG. 11B, the PWM pulse L1,
The low-side NMOSFETs 72 and 74 are controlled to be turned on by L2 to circulate a current between the low-side NMOSFETs 72 and 74 and the coil load L, thereby maintaining low-speed rotation. In this case, the back electromotive force generated in the coil load L in the charge mode is used as a power supply. However, since the ON resistances of the NMOSFETs 72 and 74 are small, the current can be held without unnecessary switching loss.

In the high-speed regeneration mode (high-speed decay mode, Fast Decay Mode) shown in FIG.
The other transistor 71 on the high side and the other transistor 74 on the low side are controlled to be turned on by L2, and current is returned from the coil load L in which the back electromotive voltage is generated to the motor power supply V.

The rate of current decay (discharge) in the two attenuation modes changes according to the time rate of the two attenuation modes.

Conventionally, a sequence as shown in FIG. 13 or FIG. 14 is employed as a control method combining the above three operation modes.

The current control sequence shown in FIG.
Power supply mode within M pulse period (PWM reference time) →
The control for switching in the order of the high-speed regeneration mode and the low-speed regeneration mode is repeatedly executed in each cycle.

At this time, the switching from the power supply mode to the high-speed regeneration mode is performed by setting the set current value (PWM
The resistance element determines whether the peak value corresponding to the control input has been reached.
The current is detected by the current detection unit 80 based on the voltage drop of 77, and switching is performed using the detection output that has reached the set current value. Then, after the high-speed regeneration mode is continued until reaching a certain time, the mode is switched to the low-speed regeneration mode, and the time of the low-speed regeneration mode is fixed.

However, in such a control method, since the current value is restricted by the amount of attenuation in the high-speed regeneration mode, there is a problem that a pulsating current (ripple) of the current is increased and noise is generated.

On the other hand, the current control sequence shown in FIG. 14 repeatedly executes control for switching in the order of the power supply mode, the low-speed regeneration mode, and the high-speed regeneration mode within each cycle of the PWM pulse (PWM reference time). It is to let.

At this time, the switching from the power supply mode to the low-speed regeneration mode is performed by determining whether or not the set current value has been reached in the power supply mode based on the voltage drop of the resistance element 77.
Detect at 80 and switch using the detection output that has reached the set current value. Then, after the low-speed regeneration mode is continued until reaching a certain time, the mode is switched to the high-speed regeneration mode, and the time of the high-speed regeneration mode is fixed.

However, such a control method also has a problem in that the current value is restricted by the amount of attenuation in the high-speed regenerative mode, so that the pulsating flow of the load current increases and the amount of noise generated is large.

That is, conventionally, as a method of discharging the current to the coil load L, control is performed with a certain fixed time. Therefore, when a current change more than a steady state is given, adjustment is performed by changing the condition change outside the IC (user side) to change the current change rate, or by making the constant of the load-side component variable. Often.

At this time, in order to reproduce an optimal current waveform such that the pulsating flow of the load current is reduced, it is necessary to precisely control the timing of the current control from the outside in a timely manner in accordance with the load. It leads to complexity and cost increase.

Further, in the conventional PWM control, when the constant current control is to be performed by repeating the charging and discharging of the current to the coil load L, the set value of the discharging time is predetermined, so that it is not necessarily required. It is not possible to set a proper time. For this reason, the constant current performance and the ability to change the current are contradictory, and it is very difficult to achieve both.

[0024]

As described above, when the constant current control is performed by repeating the charging and discharging of the current to the reactance load by performing the PWM control of the H bridge circuit formed in the conventional IC, the load current is reduced. The pulsating flow becomes large, and the amount of generated noise is large.

The present invention has been made in order to solve the above-mentioned problems. When constant current control is performed by repeating charging and discharging of a current to a reactance load by PWM control of an H-bridge circuit, the required amount of load depends on the load. It is an object of the present invention to provide a semiconductor integrated circuit that can automate the damping force of different currents, more accurately control the load current, reduce the pulsating flow of the load current, and reduce the amount of noise generated.

Another object of the present invention is to perform constant current control by repeatedly controlling the H-bridge circuit formed in an IC by performing PWM control to repeatedly charge and discharge current to a coil of a motor outside the IC. An object of the present invention is to provide a motor drive control system capable of controlling a coil current more accurately.

[0027]

A semiconductor integrated circuit according to the present invention has a pair of external output terminals, one end of which is connected to the pair of external output terminals, and the other end of which is collectively connected to the power supply node side. One end is connected to each of the two high-side output switch elements and the pair of external output terminals, and each other end has two low-side output switch elements that are collectively connected to the ground node side. And an H-bridge circuit for driving a load externally connected through the pair of external output terminals; and an output switch element of the H-bridge circuit, which is switched and driven by a pulse width modulation signal.
Charge mode for the load by a bridge circuit,
Selectable slow decay mode and fast decay mode
A PWM control circuit for generating a control signal for switching to the low-speed decay mode when the current of the load falls below a first set current value in the high-speed decay mode for the load; And an output control logic circuit for controlling.

A motor drive control system according to the present invention is characterized in that current control of a motor coil of an external motor is performed using the semiconductor integrated circuit of the present invention.

[0029]

Embodiments of the present invention will be described below in detail with reference to the drawings.

<First Embodiment> FIG. 1 shows a first embodiment of the present invention.
H-bridge circuit formed in the IC according to the embodiment of the present invention and I
C illustrates an example of a connection relationship with a coil of a stepping motor connected as an external load.

In FIG. 1, 11 to 11 formed in an IC 10 are shown.
14 is a high voltage type output switch element,
For example, NMOSFET is used. Here, the NMOSFET 11 on the high side and the NMOSFET 12 on the low side are connected in series, and the series connection node is connected to the first external output terminal 15. Similarly, NM on the high side
The OSFET 13 and the low-side NMOSFET 14 are connected in series, and the series connection node is connected to the second external output terminal.
Connected to 16.

These four NMOSFETs 11 to 14 are connected to a load between the pair of external output terminals 15 and 16 as an IC.
An H-bridge circuit for driving an external reactance load is formed. In this example, a coil L of a stepping motor is connected as a reactance load.

The drains of the high-side NMOSFETs 11 and 13 are collectively connected to a motor power supply terminal 18 via a current detecting resistor element 17, and the motor power supply terminal 18 Is connected. The sources of the low-side NMOSFETs 12 and 14 are collectively connected to a ground terminal 19.

Note that Di1 to Di4 are respectively the NMOSFET1
Diodes for back electromotive force absorption connected in parallel corresponding to 1 to 14. When diodes are formed in the NMOSFETs 11 to 14 in a parasitic manner, these diodes are connected to the diodes Di1 to Di for absorbing the back electromotive force.
4 can be used.

Reference numeral 20 denotes a PWM control circuit for driving and controlling the H-bridge circuit by a PWM pulse signal. Reference numeral 22 denotes a second current detection circuit that detects whether the load current is equal to or greater than a second set current value by detecting a voltage drop caused by the current detection resistance element 17.

Further, a first current detection circuit 21 for detecting whether the load current is equal to or less than a first set current value by detecting a voltage drop by the current detection resistance element 17 is provided. I have. Here, the first set current value is a value lower than the existing set current value (second set current value) in the charge mode by a specified value (offset value), and the current newly set in the present example. Value.

Each of the current detection circuits 21 and 22 uses a voltage comparison circuit, and receives comparison reference voltages Vref1 and Vref2 from a reference voltage source.
The reference voltages Vref1 and Vref2 are supplied to the H-bridge circuit by PWM.
When a pseudo sine wave current in which the charge level to the coil load changes in a stepwise manner according to the change in the pulse width of the signal input flows, when controlling the actual current flow in each step, for example, for each step, An appropriate value is set and controlled by a microcomputer mounted on the same chip as the PWM control circuit 20.

The output control logic circuit 23 receives the output signals of the two current detection circuits 21 and 22 and generates a control signal for controlling the switching of the operation mode of the H-bridge circuit as described later. The PWM control circuit 20 is controlled.

According to the recent Bi-CMOS process,
The components of the PWM control circuit 20 and the high-withstand-voltage output switch element of the H-bridge circuit (for example, a double-diffused NMOSFET
) And can be mounted on the same chip,
The PWM control circuit 20 may be formed on an IC different from the IC on which the H-bridge circuit is formed.

Next, the NMOSFETs 11 to 11 of the H-bridge circuit are described.
The operation when the 14 gates are PWM-controlled by the PWM control circuit 20 will be described.

When controlling the actual current to the coil load L, the three operation modes described above with reference to FIGS.
Control is performed in a sequence as shown in FIG. 5, FIG. 6, and FIG.

<First Control Example> FIG. 2 shows a first control example of an actual current flow in the H-bridge circuit and the coil load of FIG.

FIG. 3 is a waveform chart showing an example of a change in the voltage drop of the resistance element 17 for current detection and a change in the detection output of the current detection circuits 21 and 22 in the current control sequence shown in FIG.

FIG. 4 is a flowchart showing a sequence of the current control shown in FIG.

The current control sequence shown in FIG.
Switch in the order of power supply mode (charge mode, Charge Mode) → high-speed regeneration mode (high-speed decay mode, Fast Decay Mode) → low-speed regeneration mode (slow decay mode, Slow Decay Mode) within the pulse period (PWM reference time) .

At this time, the switching from the power supply mode to the high-speed regenerative mode is performed by setting the current detection resistance (current peak value corresponding to the pulse width of the PWM signal input) in the power supply mode. The second current detection circuit 22 detects the voltage based on the voltage drop of the element 17, and the output control logic circuit 23 receives this detection output to perform switching control.

The switching from the high-speed regeneration mode to the low-speed regeneration mode is performed based on the voltage drop of the current detecting resistance element 17 in the high-speed regeneration mode. The output is detected by the current detection circuit 21, and the output is received by the output control logic circuit 23 to perform switching control. Then, control is performed so that the low-speed regeneration mode is continued until the end of the PWM reference time, and such a series of controls is repeatedly executed in each cycle. That is, even within the time of the high-speed regenerative mode, if the current comparison is performed and it is detected that the current level has decreased to a preset current level,
At that timing, control is shifted to the low-speed regeneration mode.

If the first current detection circuit 21 detects the current immediately after the high-speed regenerative mode is entered, a malfunction may occur due to a delay in circuit operation or the like. It is desirable to perform control so that detection is performed after the elapse.

<Second Control Example> FIG. 5 shows a second control example of an actual current flow in a coil load driven by the H-bridge circuit of FIG.

The current control sequence shown in FIG.
In the pulse cycle (PWM reference time), switch in the order of power supply mode → high-speed regeneration mode → low-speed regeneration mode. If the set current is not changed within the above-mentioned low-speed regeneration mode, the next PWM reference Control is performed such that the low-speed regeneration mode is continued (holds current) for a certain period of time, and such a series of controls is repeatedly executed.

According to such control, no switching loss occurs in the PWM reference time for continuing the low-speed regeneration mode, so that the number of switching operations can be reduced as a whole of the current control, and the switching loss can be reduced.

<Third Control Example> FIG. 6 shows a third control example of an actual current flow in a coil load driven by the H-bridge circuit of FIG.

The current control sequence shown in FIG.
Within the pulse cycle (PWM reference time), switch in the order of power supply mode → high-speed regeneration mode → low-speed regeneration mode.

At this time, after switching from the power supply mode to the high-speed regeneration mode, a predetermined short blank time A elapses, and then a decrease width (offset level) B of the current from the set current value is calculated. When the value of B / A is larger than the specified value, the normal PWM operation is performed in the order of the power supply mode → the high-speed regeneration mode also in the next PWM reference time.
Is smaller than the specified value, control is performed to continue the low-speed regeneration mode, and such a series of controls is repeatedly executed.

According to such control, no switching loss occurs during the PWM reference time for continuing the low-speed regeneration mode (holding the current), so that the number of switching times and the switching loss are reduced as a whole of the current control. Can be.

<Fourth Control Example> FIG. 7 shows a fourth control example of an actual current flow in a coil load driven by the H-bridge circuit of FIG.

The current control sequence shown in FIG.
The high-speed regeneration mode is set immediately within the pulse cycle (PWM reference time), and the mode is switched to the low-speed regeneration mode using the detection output that the current level has decreased to the preset current level (when the set current value = 0) in the high-speed regeneration mode. This low-speed regeneration mode is continued until the end of the PWM reference time. The control is performed so that the low-speed regeneration mode is continued (the current is held at zero) during the next PWM reference time, and such a series of controls is repeatedly executed.

In the H-bridge circuit shown in FIG. 1, since the NMOSFETs 11 to 14 can flow current in both directions between the drain and the source, the diodes Di1 to Di4 for absorbing the back electromotive force are connected. Omitted, NMOSFET11 ~
14 may have a role of absorbing back electromotive force.

The high-side NMOSFETs 11, 13
Instead of using the PMOSFET, the above NMOSFET 11,
Driving may be performed at the same timing as in FIG.

In the first embodiment, the constant current is obtained by repeating the charging and discharging of the current to the reactance load (the motor coil in this example) outside the IC by the PWM control of the H bridge circuit formed in the IC. When performing the control, it is possible to realize an automatic stabilized constant current control circuit which can be controlled with the automatically stabilized constant current.

At this time, after the required attenuation amount of the load current is obtained in the high-speed regeneration mode, a change to a low attenuation speed (low-speed regeneration mode) is performed. In addition, the load current can be controlled more accurately, the pulsation of the load current can be minimized, the stability of the current waveform can be greatly improved, and the amount of noise generated can be reduced. Further, when a further amount of attenuation is required in the low-speed regeneration mode, the required amount of attenuation can be easily obtained by continuing the low-speed regeneration mode.

Further, the above-mentioned automatic stabilization constant current control circuit
By automatically controlling the current variable capability instead of the conventional control of the current variable capability by setting conditions outside the IC, the pulsating flow of the load current generated during PWM control is reduced, and the load current waveform for the PWM input is reduced. Reproducibility is improved. In addition, since the current variable capacity is controlled automatically,
Compared with the conventional control of the current variable capability by setting conditions outside the IC, control input for setting conditions is not required, and the number of external terminals is reduced accordingly.

If the load is a reactive load (inductive load or capacitive load), the controllability of the current is optimized regardless of the type of the load. There is an advantage that an optimum driving result can be easily obtained even in the case where it can be used.

Further, it is possible to realize a motor drive control system capable of controlling the coil current of the motor more accurately by using the automatic stabilizing constant current control circuit. This motor drive control system can be realized by adding the first current detection circuit 21 and changing the output control logic circuit 23 to the conventional motor drive control system. It can be replaced and can be applied to a wide range of fields (general systems using motors), and general-purpose effects of the system can be expected.

<Second Embodiment> In the first embodiment,
Although the current detecting resistance element 17 is inserted between the common drain connection node of the NMOSFETs 11 and 13 on the high side and the motor power supply terminal 18, the insertion position may be changed, and an example thereof will be described below.

FIG. 8 is a circuit diagram showing an I-mode according to a second embodiment of the present invention.
3 shows a basic configuration of a connection relationship between an H bridge circuit formed in C and a coil of a stepping motor connected outside the IC.

This H-bridge circuit is different from the above-mentioned H-bridge circuit in FIG. 1 in that a current detecting resistance element 17 is provided between a common connection node of the low-side NMOSFETs 12 and 14 and a ground (GND) terminal. The difference is that the voltage drop in the current detection resistor element 17 is detected by the current detection circuits 21 and 22.
1 are given the same reference numerals as in FIG. 1 and description thereof is omitted.

However, when the current detecting resistor 17 is inserted on the motor power supply terminal 18 side as in the first embodiment, the voltage drop due to the current detecting resistor 17 affects the H-bridge circuit. It is desirable because there is little possibility of the effect.

The current detecting resistance element 17 may be connected to the outside of the IC. In this case, when detecting a voltage drop at the current detecting resistance element outside the IC, the current detecting circuit 2
Although 1, 22 may be used, another current detection circuit may be used.

<Third Embodiment> In the first and second embodiments, a MOSFET is used as an output switch element.
A bipolar transistor may be used as the output switch element, and an example is shown below.

FIG. 9 is a block diagram showing an I-mode according to a third embodiment of the present invention.
3 shows a basic configuration of a connection relationship between an H bridge circuit formed in C and a coil of a stepping motor connected outside the IC.

This H-bridge circuit is different from the H-bridge circuit shown in FIG.
In that PNP transistors Q1 and Q3 are used in place of NPN transistors Q2 and Q4 in place of the low-side MOSFETs 12 and 14, and the other components are the same. The description is omitted.

[0073]

As described above, according to the semiconductor integrated circuit of the present invention, when the constant current control is performed by repeating the charging and discharging of the current to the reactance load by the H-bridge circuit, accurate current control is performed. Therefore, the pulsating flow of the load current can be reduced, and the amount of noise generated can be reduced.

Further, according to the motor drive control system of the present invention, the H-bridge circuit formed in the semiconductor integrated circuit of the present invention is controlled by PWM to repeat charging and discharging of the current to the coil of the external motor, thereby providing a constant current. When performing the control, the coil current can be controlled more accurately.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an example of a connection relationship between an H-bridge circuit formed in an IC according to a first embodiment of the present invention and a coil of a stepping motor connected outside the IC.

FIG. 2 is a sequence diagram showing a first control example of an actual current flow in the H-bridge circuit and the coil load of FIG. 1;

FIG. 3 is a waveform chart showing an example of a change in a voltage drop of a resistance element for current detection and a change in a detection output of a current detection circuit in the current control sequence shown in FIG. 2;

FIG. 4 is a flowchart showing the details of the current control sequence shown in FIG. 2;

FIG. 5 is a sequence diagram showing a second control example of an actual current flow in a coil load driven by the H-bridge circuit of FIG. 1;

FIG. 6 is a sequence diagram showing a third control example of an actual current flow in a coil load driven by the H-bridge circuit of FIG. 1;

FIG. 7 is a sequence diagram showing a fourth control example of an actual current flow in a coil load driven by the H-bridge circuit of FIG. 1;

FIG. 8 is a circuit diagram showing a basic configuration of a connection relationship between an H-bridge circuit formed in an IC according to a second embodiment of the present invention and a coil of a stepping motor connected outside the IC.

FIG. 9 is a circuit diagram showing a basic configuration of a connection relationship between an H-bridge circuit formed in an IC according to a third embodiment of the present invention and a coil of a stepping motor connected outside the IC.

FIG. 10 shows a conventional H-bridge circuit formed on an IC and I
FIG. 4 is a circuit diagram showing an example of a connection relationship with a coil of a stepping motor connected to the outside of C.

FIG. 11 is a diagram for explaining three operation modes when controlling an actual current flow in a coil load driven by the H-bridge circuit of FIG. 10;

FIG. 12 shows an NMOS for the three operation modes shown in FIG.
FIG. 5 is a timing waveform chart showing an example of an FET gate application signal.

FIG. 13 shows a conventional H-bridge circuit shown in FIG.
FIG. 6 is a sequence diagram showing an example of a control method combining two operation modes.

FIG. 14 shows a conventional H-bridge circuit shown in FIG.
FIG. 13 is a sequence diagram showing another example of a control method combining two operation modes.

[Explanation of symbols]

10 ... IC, 11-14 ... High withstand voltage type NMOS forming H-bridge circuit
FET, 15, 16… External output terminal, 17… Resistance element for current detection, 18… Power supply terminal for motor, 19… Ground terminal, 20… PWM control circuit, 21… First current detection circuit, 22… Second Current detection circuit, 23: Output control logic circuit, V: Motor power supply, L: Reactance load (stepping motor coil), Di1 to Di4: Diode for absorbing back electromotive force.

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5H570 AA20 CC01 DD01 DD06 DD07 GG01 HA08 HB16 LL02 5J055 AX25 AX65 AX66 BX16 CX13 CX20 DX04 DX05 DX13 DX22 DX60 DX84 EY12 EZ10 EZ23 FX04 FX32 FX38 GX01 GX03 GXX

Claims (9)

[Claims] A pair of external output terminals, one end of each of which is connected to the pair of external output terminals, and the other end of which is collectively connected to a power supply node side;
One end is connected to each of the output switch elements and the pair of external output terminals, and the other end has two low-side output switch elements connected collectively to the ground node side. An H-bridge circuit for driving a load externally connected through an output terminal; and a switching mode for driving an output switch element of the H-bridge circuit by a pulse width modulation signal, and a charge mode for the load by the H-bridge circuit. A PWM control circuit capable of selectively setting a low-speed decay mode and a high-speed decay mode; and a control for switching to the low-speed decay mode when the current of the load drops below a first set current value in the high-speed decay mode for the load. To generate a control signal for the PW
A semiconductor integrated circuit, comprising: an output control logic circuit for controlling an M control circuit. 2. The apparatus according to claim 1, further comprising: a first current detection circuit configured to detect that a current of the load has decreased to a first set current value or less. 2. The semiconductor integrated circuit according to claim 1, wherein a control signal for controlling the switching to the low-speed decay mode is received in response to the detection output. A second current detection circuit for detecting that a current of the load has reached a second set current value, wherein the output control logic circuit is configured to charge the load with the second current in a charge mode. 3. The semiconductor integrated circuit according to claim 1, wherein a control signal for controlling the switching to said high-speed decay mode is generated in response to a detection output of said current detection circuit, and said PWM control circuit is controlled. 4. A power supply terminal and a ground terminal for the H-bridge circuit, and between a power supply terminal and a collective connection node of the two high-side output switch elements or two low-side output switches. A current detection resistance element inserted and connected between the collective connection node of the elements and the ground terminal, wherein the current detection circuit detects a voltage drop caused by the current detection resistance element, 5. The semiconductor integrated circuit according to claim 3, wherein a current of a load is detected. 5. The semiconductor integrated circuit according to claim 1, a motor having a motor coil connected to a pair of external output terminals of the semiconductor integrated circuit, and a motor connected to the outside of the semiconductor integrated circuit and connected to the high side. A current detection resistance element inserted and connected between a collective connection node of two output switch elements and a motor power supply or between a collective connection node of the two low-side output switch elements and ground; By detecting a voltage drop by the current detecting resistance element, it is detected that the current of the motor coil has dropped below a first set current value, and a detection output is supplied to an output control logic circuit of the semiconductor integrated circuit. A motor drive control system, comprising: a first current detection circuit. 6. A motor drive control system for controlling the current of a motor coil of an external motor using the semiconductor integrated circuit according to claim 1. Description: 7. When the operation mode of the motor coil is controlled by the semiconductor integrated circuit, after switching from the charge mode to the high-speed decay mode and the low-speed decay mode within a PWM reference time determined by a cycle of a PWM pulse. 7. The motor drive control system according to claim 5, wherein the control is performed such that the low-speed decay mode is continued until the end of the PWM reference time, and this series of controls is repeatedly executed in each cycle. 8. When the operation mode of the motor coil is controlled by the semiconductor integrated circuit, control is performed so as to switch from the charge mode to the high-speed decay mode and the low-speed decay mode within a PWM reference time determined by a cycle of a PWM pulse. 7. The method according to claim 5, wherein if the set current is not changed within the time of the low-speed decay mode, the control is performed so that the low-speed decay mode is continued for the next PWM reference time. Motor drive control system. 9. When the operation mode of the motor coil is controlled by the semiconductor integrated circuit, control is performed so as to switch from the charge mode to a high-speed decay mode and a low-speed decay mode within a PWM reference time determined by a cycle of a PWM pulse. Then, when the decrease width of the current of the motor coil after a predetermined blank time has elapsed after switching from the charge mode to the high-speed decay mode is larger than a specified value, the next PW
The M reference time is also switched in the order of the charge mode, the high-speed decay mode, and the low-speed decay mode, and if the decrease in the current of the motor coil is smaller than a specified value, control is performed so as to continue the low-speed decay mode. Item 7. The motor drive control system according to item 5 or 6.