JP2002189428A - Array substrate and liquid crystal display device using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device in which depletion type TFTs(thin film transistors) for making countermeasures against static electricity and array inspection to be consistent with each other can be manufactured without increasing processes. SOLUTION: The channel length of TFTs for controlling conductive states among the gate wirings and the source wirings and the short ring of an array substrate is made to be shorter and that of TFTs provided in pixels of a display area. As a result, depletion type thin film transistors for realizing simultaneously the countermeasures against static electricity and the array inspection can be manufactured in the same processes entirely equal to processes for manufacturing the TFTs provided in the pixels.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an array substrate of a liquid crystal display device used as a display of a computer or the like.

[0002]

2. Description of the Related Art A liquid crystal display device has a counter glass substrate, a pixel electrode, and a thin film transistor (T) as an active element.
FT), a glass substrate (array substrate) having a gate bus line, a source bus line, and the like are bonded to each other, and a liquid crystal is injected between the two glass substrates. By adding a signal
It modulates light incident from the outside and displays an image. Such a liquid crystal display device has attracted attention as a next-generation display device because of its lower power consumption, thinner and lighter weight as compared with a CRT, and its production volume is increasing year by year. This liquid crystal display device has a large number of two-dimensionally arranged pixel electrodes. In recent years, as the quality of the liquid crystal display device has been improved, an active matrix type liquid crystal display device has been added to each of the pixel electrodes with a switching element such as a thin film transistor. Equipment is increasing.

Conventionally, such a liquid crystal display device is configured as shown in FIG.

A source line 2 and a gate line 3 intersect with each other via an insulating film and are arranged in a matrix on an array substrate 1. On the extension of each of the wirings 2, 3, signal input terminals 4,
5 are installed. When performing an array inspection, a signal voltage is applied to these terminals 4 and 5. A TFT 6 is provided at an intersection of the source line 2 and the gate line 3, and a drain electrode of the TFT 6 sends a signal to the pixel electrode 7. The pixel electrode 7 is opposed to the counter electrode 9 via the liquid crystal layer 8 and displays an image by holding the display data voltage in the liquid crystal layer 8. Since the source wiring 2 and the gate wiring 3 shown here are electrically insulated by the insulating film, a number of display defects due to static electricity may occur. For example, the source wiring 2 or the gate wiring 3 is charged by static electricity generated in a TFT manufacturing process, a liquid crystal display panel manufacturing process, a mounting process, and the like.
A voltage that is significantly higher than the actual drive voltage is applied, causing dielectric breakdown of the insulating film and defective TFT characteristics. Therefore, in general, in order to prevent this, a short ring 10 for electrically shorting the wirings 2 and 3 is provided on the outer periphery of the liquid crystal display device. By the way, since the manufacturing process of the TFT is complicated, a defect such as a linear defect due to disconnection or short circuit of a scanning line and a signal line, a point defect such as a defective switching element, and a display unevenness occurs. As described above, since the production yield of the liquid crystal display device is not 100%, it is necessary to sufficiently inspect the display quality. In addition, in aiming to improve the manufacturing yield and the display quality in the final liquid crystal display device,
Since it is necessary to promptly provide feedback on the status of failure occurrence to the manufacturing process, an array inspection can be performed when switching elements such as TFTs are completed, and liquid crystal displays before mounting expensive components such as driver circuits and TABs. It is important to perform lighting display inspection and analysis in the state of the panel.

However, in the case of a configuration in which the short ring 10 is provided on the outer periphery as shown in FIG. As a countermeasure, it is necessary to input a signal voltage to each terminal individually in a display inspection process, a mounting component assembling process, and the like, so that it is necessary to cut by a dividing line 11 shown by a two-dot chain line inside the short ring 10. And does not prevent electrostatic breakdown. For this reason, in the conventional configuration shown in FIG. 2, it is not possible to achieve both the countermeasure against electrostatic breakdown and the inspection. In order to solve these problems, a configuration as shown in FIG. 3 has been proposed. this is,
This is disclosed in JP-A-11-142888. FIG. 3 is an enlarged schematic view of a signal input terminal portion of a typical liquid crystal display device disclosed in the above-mentioned patent. As shown in FIG. 2, the short ring 10 and the wirings 2 and 3 are not directly electrically connected to each other, but are connected to the signal input terminals 4 and 5 via the depletion type TFT 12 on the substrate end side. A wiring 13 for electrically connecting the gate electrode of the depletion type TFT 12 and a gate voltage input terminal 14 for inputting a signal for controlling the resistance of the depletion type TFT 12 are provided on the wiring. Generally, a depletion type transistor has conductivity between a source and a drain terminal in a state where no voltage is applied to the gate. For this reason, since the short ring 10 is connected to the source line 2 and the gate line 3 via the depletion type TFT 12, electrostatic breakdown is prevented. Further, when performing an array inspection or a lighting display inspection of the liquid crystal display device, an off-voltage is applied to the gate voltage input terminal 14 so as to be applied between the source wirings and between the gate wirings, and between the source wirings and the gates. This makes it possible to electrically insulate the wiring. Then, by inputting an inspection signal or a lighting signal to an input terminal of the liquid crystal display device, a high-precision array inspection and a high-quality lighting display inspection can be performed.

[0006]

However, in the array substrate manufacturing process, in order to manufacture a depletion type TFT, as described in the embodiment of Japanese Patent Application Laid-Open No. Impurities need to be introduced into the semiconductor layer, which increases the number of manufacturing steps of the array substrate, increases the cost, and lowers the yield. The present invention has been made to solve such problems of the related art, and provides a liquid crystal display device capable of manufacturing a depletion-type TFT for achieving both the countermeasure against static electricity and array inspection without increasing the number of steps. The purpose is to do.

[0007]

In the liquid crystal display device of the present invention, a plurality of gate wirings and a plurality of source wirings are arranged so as to intersect with each other via an insulating layer, and the intersection exists. A pixel electrode provided for each pixel in the display area,
A counter substrate is disposed opposite to an array substrate provided with a thin film transistor as a switching element electrically connected to a gate wiring and a source wiring passing near the pixel electrode with a liquid crystal layer interposed therebetween. In the liquid crystal display device, the array substrate may be configured such that the plurality of gate lines and the plurality of source lines are also formed outside the display region, and the lines formed outside the display region are used for signal voltage input. A terminal, connected to a short ring disposed on an outer peripheral portion of the array substrate via a thin film transistor for controlling a conduction state between each wiring and the short ring, and connected to each wiring via the signal voltage input terminal. An array in which the thin-film transistor for controlling a conduction state with the ring is provided on the short ring side. In the substrate, the channel length of the thin film transistor for controlling the conduction state between the respective wires and the short ring, shorter than the channel length of the thin film transistor provided in the pixel display area. As a result, the threshold voltage of the TFT that controls the conduction between each wiring and the short ring shifts more negatively than the TFT in the pixel due to the short channel length effect that is often achieved with MOS transistors. (In the case of n channel, positive shift in the case of p channel), a depletion type thin film transistor can be obtained. In this manner, a depletion type thin film transistor for simultaneously realizing countermeasures against static electricity and array inspection can be manufactured in exactly the same process as the process for manufacturing the TFT provided in the pixel. In addition, the problem of increasing the number of steps can be solved.

The semiconductor layer of the thin film transistor is aS
The use of i or polycrystalline Si has an effect that the present invention can be applied to a larger substrate.

Further, when a-Si or polycrystalline Si is used as the semiconductor layer, by setting the channel length to 2 μm or less, there is an effect that the thin film transistor can be more effectively depleted. Further, by forming the gate electrode and the source / drain electrode of the thin film transistor in a self-aligned manner, the variation in the channel length of the thin film transistor in the substrate is suppressed, and the conduction state between each of the wirings and the short ring is more reliably ensured. Has the effect that the thin film transistor for controlling the depletion can be made into a depletion type.

[0010]

FIG. 1 is a schematic view showing an array substrate of a liquid crystal display device according to an embodiment of the present invention.

On the array substrate 1, source wirings 2 and gate wirings 3 intersect via an insulating film and are arranged in a matrix. Signal input terminals 4 and 5 are provided on extensions of the wirings 2 and 3. Source wiring 2 and gate wiring 3
The TFT 6 is provided at the intersection with the pixel electrode 7, and the drain electrode of the TFT 6 is electrically connected to the pixel electrode 7. The pixel electrode 7 faces the counter electrode 9 via the liquid crystal layer 8. On the outer periphery of the array substrate 1, a short ring 10 for electrically shorting the wirings 2 and 3 is provided. The short ring 10 and each of the wirings 2 and 3 are electrically connected via a TFT 15. This TFT 15 may be an n-channel type or a p-channel type. The gate electrodes of these TFTs 15 are combined in an arbitrary unit by the wiring 13 and are collectively controlled by the gate voltage input terminal 14.

TFTs 6 and 15 formed in an array substrate
Is shown in FIG. A metal film 102 having a predetermined shape is formed as a gate wiring on a glass substrate 101. A SiN _x film 103 having a predetermined shape is formed thereon as a gate insulating film.
Of about 300 nm. An i-layer a-Si film 104 having a predetermined shape is formed thereon as a semiconductor layer with a thickness of about 100 nm, and an n-type a-Si film 105 having a predetermined shape is formed with a thickness of about 50 nm as a contact layer with source / drain electrodes. Next, a metal film 106 having a predetermined shape is formed as a source / drain electrode. Finally, a protective film 107 is formed.

In such an array substrate, a TFT in a pixel portion
The TFT 15 has a channel length of 4 μm and electrically connects the short ring 9 to each of the wirings 1 and 2.
Is 2 μm. The characteristics of these TFTs are shown in FIG. As is clear from this figure, by changing the channel length, the TFT 6 can be of the enhancement type and the TFT 15 can be of the depletion type without increasing the number of steps for manufacturing the array substrate.

FIG. 6 shows a T-shaped transistor having the same structure as that of FIG.
4 shows a relationship between an FT channel length and a threshold voltage.

As is apparent from FIG. 1, by setting the channel length of the TFT to 2 μm or less, the TFT can be made into a depletion type.

[0016]

As described in detail above, according to the present invention,
The channel length of the thin film transistor that controls the conduction between each wiring and the short ring is made shorter than the channel length of the TFT provided in the pixel in the display area. Due to this, the TFT that controls the conduction state between each wiring and the short ring is better than the TFT in the pixel due to the short channel length effect that is often achieved with MOS transistors.
Is negatively shifted (n-channel, p-channel is positive), and a depletion type thin film transistor can be obtained. In this way,
A depletion type thin film transistor for simultaneously realizing countermeasures against static electricity and array inspection can be manufactured in exactly the same process as that for manufacturing a TFT provided in a pixel. Can be solved.

[Brief description of the drawings]

FIG. 1 is a schematic view of an array substrate of a liquid crystal display device which is an example of an embodiment of the present invention.

FIG. 2 is a diagram showing a conventional liquid crystal display device.

FIG. 3 is a diagram showing a conventional liquid crystal display device.

FIG. 4 is a sectional view of a TFT on an array substrate according to the present invention.

FIG. 5 is a characteristic diagram of a TFT on an array substrate according to the present invention.

FIG. 6 is a diagram showing a relationship between a threshold voltage of a TFT on an array substrate and a channel length according to the present invention;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Array substrate 2 Source wiring 3 Gate wiring 4 Signal input terminal 5 Signal input terminal 6 TFT 7 Pixel electrode 8 Liquid crystal layer 9 Counter electrode 10 Short ring 11 Split line 12 Depletion type TFT 13 Wiring 14 Gate voltage input terminal 15 TFT 101 Glass substrate 102 Metal film 103 SiN _x film 104 i-layer a-Si film 105 n-type a-Si film 106 metal film 107 protective film

 ──────────────────────────────────────────────────続 き Continued on the front page F-term (reference) CC07 DD02 EE02 FF03 GG02 GG13 GG15 GG28 GG35 HK02 HK09 HK16 HK21 NN78

Claims (5)

[Claims] A plurality of gate wirings and a plurality of source wirings are provided so as to intersect with each other via an insulating layer;
A pixel electrode provided for each pixel in the display area where the intersection exists, and an array substrate provided with a thin film transistor electrically connected to a gate wiring and a source wiring passing near the pixel electrode, In the array substrate, the plurality of gate wirings and the plurality of source wirings are also formed outside the display area, and the wiring formed outside the display area is a signal input terminal, The thin film transistor is connected to a short ring disposed on an outer peripheral portion of the array substrate via a thin film transistor for controlling a conductive state between the short ring and the short circuit. In an array substrate in which the thin film transistor for controlling a state is provided on the short ring side, the wiring and the short circuit are provided. Array substrate, wherein a channel length of the thin film transistor for controlling the conduction state, shorter than the channel length of the thin film transistor provided in a pixel of the display region between the strings. 2. The semiconductor layer of the thin film transistor is a-S
The array substrate according to claim 1, wherein the array substrate is made of i or polycrystalline Si. 3. A channel length of a thin film transistor for controlling a conduction state between each wiring and the short ring is set to 2 μm.
3. The array substrate according to claim 2, wherein m is equal to or less than m. 4. The array substrate according to claim 1, wherein a gate electrode and a source / drain electrode of the thin film transistor for controlling a conduction state between each wiring and the short ring are formed in a self-aligned manner. 5. A liquid crystal display device using the array substrate according to claim 1.