JP2002185427A - Loop oscillation detector and circulation canceller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve a problem that at least a time for receiving one symbol of OFDM signal and a time for FTF are required in order to detect loop oscillation by a conventional method and thereby it is very difficult to detect loop oscillation in a short time. SOLUTION: The loop oscillation detector comprises a delay circuit 2 for outputting an input OFDM signal with a preset time lag, a circuit 3 for detecting correlation between the input OFDM signal and the OFDM signal delayed through the delay circuit, a threshold value setting circuit 4 for supplying a predetermined threshold value to a comparator, and the comparator 5 for comparing the level between a threshold value supplied from the threshold value setting circuit and an output value from the correlation detecting circuit, making a decision that the input OFDM signal is loop oscillating if the output value from the correlation detecting circuit is larger than the threshold value and outputting an oscillation detection signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a loop oscillation detecting device and a loop canceller provided with the same, and more particularly, to a device for detecting a loop oscillation generated by a signal wraparound between a transmitting and receiving antenna of a broadcast wave relay station. Regarding the wraparound canceller equipped with it.

[0002]

2. Description of the Related Art This type of loop oscillation is called OFDM (Or
In digital broadcasting or digital transmission using thogonal frequency division multiplexing (SFN) signals, SFN
This is particularly problematic when a relay station constituting a (Single Frequency Network) relays broadcast waves by retransmission of the same frequency.

Conventionally, as a wraparound canceller incorporating a loop oscillation detection circuit for detecting this type of loop oscillation, there is a wraparound canceller according to the present invention (see Japanese Patent Application No. 11-341882). This loop oscillation detection circuit detects loop oscillation from the frequency characteristics of a received OFDM signal.

[0004]

However, Japanese Patent Application No. Hei.
According to the method described in the specification of JP-A-
To obtain the frequency characteristics of the FDM signal,
Received during symbol period and FFT signal for one symbol
(Fast Fourier Transform) is necessary. Therefore, in order to detect loop oscillation by this method, O
At least the time required for receiving one symbol of the FDM signal and the time required for FFT are required, and it is difficult to detect loop oscillation in a short time.

Accordingly, an object of the present invention is to provide a loop capable of detecting, in a very short time, a loop oscillation generated by a signal wraparound between transmitting and receiving antennas of a broadcast wave relay station which performs the same frequency retransmission constituting the SFN. An object of the present invention is to provide an oscillation detecting device.

[0006]

In order to achieve the above object, the present invention provides an OFDM signal that has little autocorrelation in time data having a length equal to or less than an effective symbol period. The present invention focuses on obtaining a large continuous autocorrelation, that is, the loop oscillation detecting apparatus of the present invention is provided between a transmitting / receiving antenna of a broadcast wave relay station that relays a broadcast wave of a digital broadcast by an OFDM signal. A delay circuit that delays an input OFDM signal by a preset time and outputs the delayed signal;
A correlation detection circuit for detecting a correlation value between the input OFDM signal and the OFDM signal delayed by the delay circuit, a threshold setting circuit for supplying a predetermined threshold value to a comparator, and a threshold setting circuit. Performing a level comparison between the threshold value and the substantial output value of the correlation detection circuit,
As a result of the comparison, when the substantial output value of the correlation detection circuit is larger than the threshold value, it is determined that the input OFDM signal is oscillating in a loop, and the comparison that outputs an oscillation detection signal is performed. And at least a container.

The loop oscillation detecting device according to the present invention is further characterized in that an integrating circuit is interposed between the correlation detecting circuit and the comparator.

Further, the wraparound canceller of the present invention is provided with the loop oscillation detecting device of the present invention.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below based on embodiments of the present invention with reference to the accompanying drawings. FIG.
1 is a block diagram showing a first embodiment of the loop oscillation detecting device of the present invention. In FIG. 1, 1 is an AGC circuit, 2 is a delay circuit, 3 is a correlation detection circuit, 4 is a comparator, and 5 is a threshold setting circuit.

The operation will be described. First, an OFDM signal as an input signal is supplied to an AGC (Au
tomatic Gain Control) circuit 1. The AGC circuit 1 controls the OFC so that the output power of the circuit 1 becomes constant.
The gain of the DM signal is adjusted and output to the delay circuit 2 and the correlation detection circuit 3. The delay circuit 2 delays and outputs an input signal by a preset time. It is assumed that the delay circuit 2 is configured to output level 0 until the first input signal is output with a delay of the set delay time. The delay circuits used in all parts of the device of the present invention other than the above are also configured to output level 0 until the first input signal is output with a delay of the set delay time. It is assumed that

The correlation detection circuit 3 receives the output signals of the AGC circuit 1 and the delay circuit 2, calculates a correlation value between these signals, and outputs the result to the comparator 4. Also, the comparator 4
Is connected to a threshold setting circuit 5, from which a predetermined threshold is supplied. The comparator 4 compares the level of the output signal of the correlation detection circuit 3 with the threshold supplied from the threshold setting circuit 5, and the level of the output signal of the correlation detection circuit 3 is higher than that of the threshold from the threshold setting circuit 5. If large,
That is, when the detected correlation value exceeds a predetermined threshold value, it is determined that the input OFDM signal is oscillating, and an oscillation detection signal is output.

Here, the delay circuit 2 is provided for the time required for retransmitting the received signal at the same frequency as that of the broadcast wave relay station in which the loop oscillation detecting device of the present invention is installed, or for a time longer than that, ie, The configuration is such that the input OFDM signal is delayed and output over the time required for the signal to make a round of the signal path which causes the loop oscillation, so that the output of the correlation detection circuit 3 when the loop oscillation occurs is generated. Can be made larger than the output when no loop oscillation occurs, and it is possible to detect the loop oscillation with high accuracy.

FIG. 2 shows a second embodiment of the loop oscillation detecting apparatus according to the present invention.
Is shown in a block diagram. This embodiment is different from the first embodiment in that an integrating circuit 6 is newly inserted between the correlation detecting circuit 3 and the comparator 4, as shown in FIG. 2, the same components as those in FIG. 1 are denoted by the same reference numerals, and the description thereof will be omitted.

The operation will be described. In FIG. 2, an integrating circuit 6 is interposed to prevent the comparator 4 from malfunctioning due to noise included in the correlation signal, which is an output signal of the correlation detecting circuit 3, and integrates the output signal of the correlation detecting circuit 3 ( The correlation signal is smoothed and output to the comparator 4. The integration of the integrating circuit 6 is performed by integrating over a predetermined period or by multiplying the integrated value by a preset coefficient.
To avoid the output signal from becoming large and diverging.

Hereinafter, the correlation detection circuit 3 used in the first and second embodiments of the present invention will be described.
A specific example of the integration circuit 6 (this is used only in the second embodiment) will be described. First, a first circuit configuration example and a second circuit configuration example of the correlation detection circuit 3 will be described. FIG. 3 is a block diagram illustrating a first circuit configuration example of the correlation detection circuit 3. In FIG. 3, 7 is a multiplier, 8
Is an absolute value circuit, 9 is a delay circuit, and 10 is a multiplier.

The operation will be described. The multiplier 7 has an AGC
The output signal of the circuit 1 (see FIGS. 1 and 2) (substantially the input OFDM signal) is multiplied by the output signal of the delay circuit 2 (see FIGS. 1 and 2) and the result of the multiplication is output to the absolute value circuit 8. I do. The absolute value circuit 8 calculates the absolute value of the complex amount of the output signal of the multiplier 7 and outputs the calculation result to the delay circuit 9 and the multiplier 10. The delay circuit 9 delays the output signal of the absolute value circuit 8 by a preset time, and
Output to Note that the delay time set in the delay circuit 9 is
It is set to the same value as the delay time of the delay circuit 2 (see FIGS. 1 and 2). The multiplier 10 multiplies the output signal of the absolute value circuit 8 and the output signal of the delay circuit 9 by a real number and outputs the result to the comparator 4 (FIG. 1) or the integrating circuit 6 (FIG. 2).

In FIG. 3, the multipliers 7 and 10 are multipliers for calculating correlations, although there are differences between complex numbers and real numbers. In this configuration, the correlations are calculated twice. become. As described above, by calculating the correlation twice, it is possible to accurately calculate the correlation due to the loop oscillation. Further, the absolute value circuit 8 is arranged at the subsequent stage of the multiplier 7 so that the multiplier 10 By using multiplication, the amount of calculation can be reduced as compared with complex multiplication.

FIG. 4 is a block diagram showing a second example of the circuit configuration of the correlation detection circuit 3. As shown in FIG. The second circuit configuration differs from the first circuit configuration in that, as shown in FIG. 4, the portion that was the multiplier 10 in FIG. 3 has been replaced with a correlation value calculation circuit 11. .

The operation will be described. The multiplier 7 has an AGC
The output signal of the circuit 1 (see FIGS. 1 and 2) (substantially the input OFDM signal) is multiplied by the output signal of the delay circuit 2 (see FIGS. 1 and 2) and the result of the multiplication is output to the absolute value circuit 8. (Up to this point is the same as in FIG. 3). The absolute value circuit 8 calculates the absolute value of the complex amount of the output signal of the multiplier 7 and outputs the calculation result to the delay circuit 9 and the correlation value calculation circuit 11.
Output to The delay circuit 9 outputs the output signal of the absolute value circuit 8 for the time required for retransmitting the received signal at the same frequency as that of the broadcast wave relay station in which the loop oscillation detecting device of the present invention is installed or for a longer time. The signal is output to the correlation value calculation circuit 11 after being delayed. The correlation value calculation circuit 11
A correlation value between the output signal of the absolute value circuit 8 and the output signal of the delay circuit 9 is calculated and output to the comparator 4 (in the case of FIG. 1) or the integration circuit 6 (in the case of FIG. 2).

Now, the time is represented by a natural number t, the output signal of the absolute value circuit 8 is f (t), and the output signal of the delay circuit 9 is g
(T) Assuming that the output signal of the correlation value calculation circuit 11 is c (t), the calculation of the correlation value in the correlation value calculation circuit 11 is represented by Expression (1) using a general correlation coefficient expression. be able to.

(Equation 1)

Here, N is set to a value that is equal to or longer than the time required for the signal to make a round of the path of the signal causing loop oscillation,

(Equation 2) And

In the correlation detection circuit 3 (see FIGS. 1 and 2) in which the correlation value is calculated by the equation (1), the output c (t) of the detection circuit is -1 ≦ c (t) ≦ 1, When there is no wraparound or multipath, it is almost 0,
The value is about 0.3 when the loop-around of D / U = 1 dB is present, and 0.5 or more when the loop oscillation occurs due to the loop-around. In the loop oscillation detection device using the correlation detection circuit 3 having the configuration shown in FIG.
By setting the threshold set in (see FIGS. 1 and 2) to 0.5, loop oscillation can be detected.

Next, a first circuit configuration example and a second circuit configuration example of the integration circuit 6 will be described. FIG. 5 shows the first circuit of the integrating circuit 6.
Is shown in a block diagram. In FIG. 5, 12 is an adder, 13 is a delay circuit, 14 is a multiplier,
5 is an integration coefficient setting circuit, 16 is a normalization coefficient setting circuit, and 17 is a multiplier.

The operation will be described. The adder 12 includes an output signal of the correlation detection circuit 3 (see FIG. 2) and a multiplier 1 described later.
4 to which the output signal is supplied (the delay time is
) And outputs the result to the multiplier 14. The integration coefficient setting circuit 15 multiplies the coefficient α set in advance by the multiplier 14 and the normalization coefficient setting circuit 1.
6 is output. Note that a value of 0 <α ≦ 1 is set as the coefficient α.

The multiplier 14 calculates the product of the output signal of the adder 12 and the coefficient α output from the integration coefficient setting circuit 15 and outputs the result to the delay circuit 13 and the multiplier 17. In the normalization coefficient setting circuit 16, the coefficient β obtained by performing the operation β = (1−α) / α using the coefficient α from the integration coefficient setting circuit 15 is output to the multiplier 17. The multiplier 17 multiplies the output signal of the multiplier 14 by the coefficient β from the normalization coefficient setting circuit 16 and outputs the result to the comparator 4 (see FIG. 2) as the output of the integration circuit 6.

FIG. 6 is a block diagram showing a second circuit configuration example of the integration circuit 6. In FIG. 6, reference numeral 18 denotes an integration coefficient setting circuit, 19 denotes a multiplier, 20 denotes a delay circuit, 21 denotes an adder, 22 denotes a delay circuit, and 23 denotes a subtractor.

The operation will be described. Integration coefficient setting circuit 1
8 outputs a preset coefficient α ′ to the multiplier 19, where the coefficient α ′ is a coefficient proportional to the reciprocal of the delay time of the delay circuit 22 described later, and a value of 0 <α ′ ≦ 1 is obtained. Set. A multiplier 19 adds a coefficient α ′ which is an output of the integration coefficient setting circuit 18 to an output signal of the correlation detection circuit 3 (see FIG. 2).
Is output to the delay circuit 20 and the adder 21. Adder 21 adds the signal whose output signal is delayed by one operation clock by delay circuit 22 to the output signal of multiplier 19, and outputs the addition result to delay circuit 22 and subtractor 23.

The delay circuit 20 delays the output signal of the multiplier 19 by a preset time and outputs the delayed signal to the subtracter 23. The subtracter 27 outputs the result of subtracting the output signal of the delay circuit 20 from the output signal of the adder 21 to the comparator 4 (see FIG. 2) as the output of the integration circuit 6.

Finally, in order to verify the effect of the present invention,
In a broadcast wave relay station in which the loop oscillation detecting device according to the present invention is installed, a D / U (Desired to Undesir) of a loop wave with respect to a master station wave (desired wave) received by the broadcast wave relay station.
ed Ratio) is ∞ (no wraparound), 6 dB, and 0
Correlation detection circuit 3 for each case of dB (during loop oscillation)
(See FIGS. 1 and 2) how the output signal changes.

FIGS. 7 (a), (b) and (c) show that the D / U is 回 り (no loop wave), 6 dB and 0, respectively.
Correlation detection circuit 3 for each case of dB (during loop oscillation)
Of the output signal of FIG. In the figure, the horizontal axis represents time, and the vertical axis represents correlation values. From the figure, it can be seen that the broadcast wave relay station performs loop oscillation (that is,
= 0 dB), it can be seen that the correlation detection circuit 3 outputs correlations due to loop oscillation continuously (see FIG. 7C). Further, even at D / U = 6 dB, a large correlation appears to be caused by noise in the output of the correlation circuit 3 (see FIG. 7B). In order to avoid erroneous detection that the relay station is performing loop oscillation due to the large correlation, an integrating circuit 6 is arranged between the correlation detecting circuit 3 and the comparator 4 as shown in FIG.

The present invention is not limited to the above-described embodiments of the present invention, but can be variously modified.
For example, as the correlation detection circuit 3 shown in FIGS. 1 and 2, a type of correlation detection circuit that performs a convolution operation can be used. Further, as the integration circuit 6 in FIGS. 1 and 2, a low-pass filter may simply be used.

The present invention also includes a wraparound canceller provided with the above-described loop oscillation detecting device. This type of wraparound canceller is well-known, for example, by the "wraparound canceller" (Japanese Patent Laid-Open No. 11-355160) according to the invention of the present inventors, and a description thereof will be omitted here.

[0033]

As described above, according to the present invention,
It is possible to detect a loop oscillation in a broadcast wave relay station that performs the same frequency retransmission with an OFDM signal in a short time.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of a loop oscillation detecting device according to the present invention.

FIG. 2 is a block diagram showing a second embodiment of the loop oscillation detecting device of the present invention.

FIG. 3 is a block diagram showing a first circuit configuration example of the correlation detection circuit.

FIG. 4 is a block diagram showing a second circuit configuration example of the correlation detection circuit.

FIG. 5 is a block diagram showing a first example of a circuit configuration of the integration circuit.

FIG. 6 is a block diagram showing a second circuit configuration example of the integration circuit.

FIG. 7 shows the time change of the output signal of the correlation detection circuit 3 when the D / U of the loop wave with respect to the desired wave is ∞ (no loop wave), 6 dB, and 0 dB (during loop oscillation).

[Explanation of symbols]

 Reference Signs List 1 AGC circuit 2 Delay circuit 3 Correlation detection circuit 4 Comparator 5 Threshold setting circuit 6 Integrator circuit 7, 10 Multiplier 8 Absolute value circuit 9 Delay circuit 11 Correlation value calculation circuit 12 Adder 13 Delay circuit 14, 17 Multiplier 15 Integration Coefficient setting circuit 16 Normalization coefficient setting circuit 18 Integration coefficient setting circuit 19 Multiplier 20, 22 Delay circuit 21 Adder 23 Subtractor

 ────────────────────────────────────────────────── ─── Continuing from the front page (72) Inventor Kazuhiko Shibuya 1-10-11 Kinuta, Setagaya-ku, Tokyo Japan Broadcasting Corporation Japan Broadcasting Research Institute F-term (reference) 5K022 DD01 DD13 DD19 DD24 DD34 5K072 AA25 BB14 DD15 GG04 GG14 GG25 GG27 HH03

Claims (3)

[Claims] 1. An apparatus for detecting a loop oscillation caused by a signal wraparound between transmitting and receiving antennas of a broadcast wave relay station that relays a broadcast wave of digital broadcasting by an OFDM signal, wherein the input OFDM signal has a predetermined time. A delay circuit for delaying the output signal by a delay, a correlation detection circuit for detecting a correlation value between the input OFDM signal and the OFDM signal delayed by the delay circuit, and a threshold value for supplying a predetermined threshold value to a comparator Setting circuit, performing a level comparison between a threshold value supplied from the threshold value setting circuit and a substantial output value of the correlation detection circuit, and as a result of the comparison, the substantial output value of the correlation detection circuit is more If the input OFDM signal is larger than the threshold value, it is determined that the input OFDM signal is oscillating in a loop, and at least the comparator that outputs an oscillation detection signal is provided. Loop oscillation detection apparatus characterized by being configured Te. 2. The loop oscillation detecting device according to claim 1, further comprising an integrating circuit interposed between said correlation detecting circuit and said comparator. . 3. A wraparound canceller comprising the loop oscillation detecting device according to claim 1.