JP2002184722A - Method of manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method capable of restraining a junction leak from occurring in a PN junction on the side of a chip and reducing the occurrence of dust when a semiconductor device equipped with PN junctions on the side of the chip is manufactured. SOLUTION: When a semiconductor device equipped with PN junctions J on the side of a chip 10 is manufactured, a semiconductor wafer is divided into the chips 10 by annealing their sides 13 with a laser beam 12.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a p-side
The present invention relates to a method for manufacturing a semiconductor device having an n-junction.

[0002]

2. Description of the Related Art Conventionally, an overflow barrier of a photosensor of a solid-state imaging device or a semiconductor light-receiving device is formed at a deep position from the surface by ion implantation with high energy, thereby widening a charge collection region and increasing sensitivity. Techniques for improving the performance are known (for example, Japanese Patent No. 2604251 and
No. 76813).

However, if the impurities forming the overflow barrier are ion-implanted over the entire surface of the chip, a pn junction is exposed on a scribe line for dividing a semiconductor wafer into chips, which causes a problem that a junction leak occurs. there were. This is because when a semiconductor wafer is divided into chips by scribe lines, crystal defects occur in the scribe lines, and the crystal defects cause junction leakage at the pn junction.

In order to form the overflow barrier of the photosensor deep from the silicon surface, a P-type impurity constituting the overflow barrier of the sensor is introduced into the surface of the N-type silicon substrate, and then the P-type impurity is formed on the silicon substrate by an epitaxial method. ^- is grown semiconductor epitaxial layer has been proposed a method of forming a depletion layer of the photo sensor (see Japanese Patent Laid-Open No. 9-331058).

[0005] However, even in this method, P ^-
The semiconductor epitaxial layer and the N-type substrate have a problem that a pn junction is exposed on a scribe line, and a junction leak similarly occurs.

[0006]

Therefore, in order to prevent the occurrence of junction leak, a scribe is formed by a resist so that a pn junction is not formed in the scribe line when the P-type impurity of the overflow barrier is ion-implanted. It is conceivable to mask the vicinity of the line.

However, at this time, when the energy of the ion implantation is increased, it is necessary to correspondingly increase the thickness of the resist, but there has been a problem that it is difficult to form the resist thicker. Moreover, when the energy of the ion implantation is increased to about 10 MeV, it reacts with carbon in the resist to generate neutrons, and this neutron may adversely affect the human body during manufacturing.

Conventionally, when a semiconductor wafer is divided into chips by scribe lines, cutting is performed with a rotary blade, so that crystal defects tend to occur on the cut surface. Further, dust was easily generated at the time of cutting.

In order to solve the above-mentioned problem, according to the present invention, when manufacturing a semiconductor device having a pn junction on a side surface of a chip, the occurrence of junction leak due to the pn junction on the side surface of the chip is suppressed. While you can
An object of the present invention is to provide a method for manufacturing a semiconductor device capable of reducing generation of dust.

[0010]

According to the method of manufacturing a semiconductor device of the present invention, when manufacturing a semiconductor device having a pn junction on a side surface of a chip, the semiconductor wafer is divided into chips while annealing the side surface of the chip with a laser. It has a process of performing.

According to the above-described manufacturing method of the present invention, when the chip is cut into pieces, the side of the chip is annealed with a laser so that the chip can be cut while recovering the defect on the side of the chip.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention is a method of manufacturing a semiconductor device having a pn junction on a side surface of a chip, the method comprising a step of cutting a semiconductor wafer into chips while annealing the side surface of the chip with a laser. It is a manufacturing method of.

Further, the present invention provides the above-described method for manufacturing a semiconductor device, wherein the pn junction is formed by the semiconductor substrate and the semiconductor well region inside the semiconductor substrate.

Further, according to the present invention, in the method for manufacturing a semiconductor device, the pn junction is formed by a semiconductor substrate and a semiconductor epitaxial layer on the semiconductor substrate.

The method of manufacturing a semiconductor device according to the present invention is, for example, as shown in FIG. 4, for dividing a semiconductor wafer 1 having a large number of chips 10 each having elements of the semiconductor device into chips 10. Applicable.

FIGS. 1 and 2 show, as an embodiment of the present invention, a manufacturing process diagram of a semiconductor device for obtaining each chip 10 from the semiconductor wafer 1 shown in FIG. First, as shown in FIG. 1A, a semiconductor wafer 1 composed of an N-type semiconductor substrate 2 is prepared.

Next, as shown in FIG. 1B, ion implantation 11 of a P-type impurity (for example, boron) is performed on the entire surface of the N-type semiconductor substrate 2 of the semiconductor wafer 1 at a relatively high energy, for example, 3 MeV or more. Thereby, the P-type impurity is introduced into a relatively deep position of the semiconductor substrate 2 to form the P-type semiconductor well region 3. Thereafter, elements (not shown) of the semiconductor device are formed in a region to be each chip 10 of the semiconductor wafer 1 by a conventionally known method. In this case,
P-type semiconductor well region 3 inside N-type semiconductor substrate 2
And the N-type impurity region 4 and the N-type semiconductor substrate 2 above and below (the N-type semiconductor substrate 2 remains on the surface).
An n-junction J is formed.

Subsequently, as shown in FIG. 2, a step (so-called dicing) of cutting each chip 10 on which elements are formed from the semiconductor wafer 1 into individual chips 10 at a scribe line is performed. At this time, in the present embodiment,
Cleavage is performed using the laser 12. In particular, the laser beam 12 is annealed to the fractured surface, that is, the side surface 13 of each chip 10, and the chip 10 is fractured while recovering the crystallinity near the side surface 13 (hatched in the figure). That is, laser 1
2 and the recovery of the crystallinity of the fractured surface 13 by annealing of the laser 12 are performed in parallel.

A conventionally known laser can be used as the laser 12. For example, in the case of forming a solid-state imaging device that reads an electric charge accumulated in a photosensor and obtains an imaging signal, a laser cutting device used for cutting a seal glass used on a package upper surface of the solid-state imaging device can be used. is there.

By devising the conditions of the laser 12, it is possible to recover the crystallinity by annealing the side surface 13 of the chip 10 cut by the laser 12.

As described above, since the crystallinity of the side surface 13 of the chip 10 is recovered by the annealing of the laser 12, defects caused by the cutting can be reduced. Accordingly, even when the pn junction J faces the side surface 13 of the chip 10, defects on the side surface 13 of the chip 10 are reduced, so that the occurrence of junction leak is suppressed at the pn junction J on the side surface 13 of the chip 10. can do.

Thereafter, as shown in FIG. 3, the electrode layer 5 is formed by performing a process such as grinding the back surface of the N-type semiconductor substrate 2 and depositing a gold electrode. By supplying the substrate voltage Vsub to the N-type semiconductor substrate 2 through the electrode layer 5, the substrate can be driven from the back surface.

In a semiconductor device having a configuration in which a pn junction does not face the side surface of a chip, for example, when a portion where a P-type semiconductor well region is implanted with a resist is limited, an N-type region is continuous on the side surface of the chip. The substrate voltage can be supplied from the N-type region on the surface. On the other hand, as in the present embodiment, the pn junction J is
In the semiconductor device having the configuration facing the side surface 13 of FIG. 1, the N-type region is divided by the P-type semiconductor well region 3, so that the substrate voltage cannot be supplied from the N-type region 4 on the surface. Therefore, it is necessary to form the above-mentioned electrode layer 5 on the back surface of the semiconductor substrate 2.

Thus, the pn junction J is connected to the chip 1
The semiconductor device formed on the 0 side surface 13 can be manufactured.

According to the above-described embodiment, when manufacturing a semiconductor device in which the pn junction J is formed on the side surface 13 of the chip 10, the semiconductor wafer 1 is scribed along the scribe line using the laser 12. Since the chip 10 is cut into pieces and the side surfaces 13 of the chip 10 that have been cut are annealed by the laser 12, the crystallinity is recovered by annealing for defects generated on the side surfaces 13 of the chip 10 due to the cut.
Thereby, the pn junction J facing the side surface 13 of the chip 10
, The occurrence of junction leak due to defects is reduced.

Since the occurrence of junction leak can be reduced without forming a thick resist, it is difficult to form a thick resist. Does not cause a problem that adversely affects the human body.

As described above, since the occurrence of junction leak at the pn junction J is reduced, when the P-type semiconductor well region 3 is formed, ions can be implanted over the entire surface with high energy. Well region 3 can be formed at a deep position in semiconductor substrate 2. Thereby, for example, in a semiconductor device having a photo sensor (for example, a solid-state
The overflow barrier of the photosensor can be formed deeply to widen the depletion layer, and the light receiving sensitivity can be improved. That is, according to the present embodiment, the characteristics of the semiconductor device such as the sensitivity can be improved. In addition, the above-described problems can be solved, and the manufacturing yield of the semiconductor device can be improved.

Further, the semiconductor wafer 1 is
Can be cut into each chip 10, so that dust generated when cutting is performed by a conventional cutting blade can be reduced. Also from this viewpoint, the production yield of the semiconductor device can be improved.

Next, FIG. 5 shows a solid-state image sensor to which the manufacturing process of the semiconductor device of the present embodiment is applied. This figure 5
Shows a case where the present invention is applied to a CCD solid-state imaging device that reads out and transfers an electric charge accumulated in a photosensor to obtain an imaging signal. As shown in FIGS. 1 to 3, a P-type semiconductor well region 3 is formed inside an N-type semiconductor substrate 2. In the vicinity of the surface of the N-type impurity region 4 remaining on the P-type semiconductor well region 3, an N ⁺ impurity region 21, a P ⁺ positive charge accumulation region 22, a second P-type semiconductor well region 23,
An N-type transfer channel region 24 is formed. A transfer electrode 27 made of polycrystalline silicon is formed on the surface of the silicon via a gate insulating film (not shown). N ⁺
The photodiode of the photosensor 20 is constituted by the impurity region 21 and the positive charge accumulation region 22, and the vertical transfer of the CCD structure is performed from the second P-type semiconductor well region 23, the N-type transfer channel region 24, and the transfer electrode 27 thereabove. The register 28 is configured. Further, the P-type semiconductor well region 3
The channel stop region 25 is formed by the P ⁺ impurity region formed near the surface of the substrate. Photo sensor 20
The other side of the channel stop region 25 is a read gate section 26 for reading signal charges.

A pn junction J is formed between the P-type semiconductor well region 3 inside the semiconductor substrate 2 and the upper and lower N-type regions 2 and 4. The pn junction J is also formed on the side surface 13 of the chip 10.

With respect to the CCD solid-state imaging device having this configuration,
After forming a solid-state imaging device on each chip 10 of the semiconductor wafer 1, by applying the manufacturing method of the present invention and performing annealing by a laser 12, each chip 10 is cleaved.
As described above, the occurrence of junction leak on the side surface 13 of the chip 10 can be reduced. Accordingly, P serving as an overflow barrier of the photosensor 20 is obtained.
Forming the semiconductor well region 3 at a position deep from the surface by ion implantation of high energy and widening the depletion layer of the photosensor 20 makes it possible to improve the sensitivity of the CCD solid-state imaging device.

In addition, the manufacturing method of the present invention can be applied to a solid-state imaging device having another configuration such as a MOS solid-state imaging device. Similarly, the manufacturing method of the present invention can be applied to a semiconductor light receiving element having a photosensor formed near the surface of a semiconductor substrate.

Next, another embodiment of the present invention will be described. This embodiment is a case where a target semiconductor device has a semiconductor epitaxial layer formed on a semiconductor substrate. As shown in FIG. 6A, a P-type semiconductor well region 32 of a P-type impurity region is formed in a part of the semiconductor wafer 1 near the surface of the N-type semiconductor substrate 31.

Next, as shown in FIG. 6B, a P ^- semiconductor epitaxial layer 33 is grown on the N-type semiconductor substrate 31. As a result, a pn junction J is formed by the N-type semiconductor substrate 31 and the P ⁻ semiconductor epitaxial layer 33 thereon.

Thereafter, as in the previous embodiment, the laser 12 is used when the semiconductor wafer 1 is cut into the chips 10, and the laser 12 is used to cut the chip 1
The annealing is performed on the side surface 13 of the zero.

In this case as well, an electrode layer is formed on the back surface of the N-type semiconductor substrate 31 so as to be driven from the back surface.

According to the present embodiment, as in the previous embodiment, the occurrence of junction leak due to defects in the pn junction J facing the side surface 13 of the chip 10 is reduced. Therefore, the characteristics of the semiconductor device can be improved, and the production yield of the semiconductor device can be improved.

The present embodiment can be applied to a solid-state image pickup device such as a CCD solid-state image pickup device or a MOS solid-state image pickup device as in the previous embodiment. In that case, a semiconductor region such as a photosensor is formed near the surface of the P ^- semiconductor epitaxial layer 33, and the P-type semiconductor well region 32 becomes an overflow barrier of the photosensor.
P ^- semiconductor epitaxial layer 33 becomes a depletion layer of the photosensor. By forming the P ^- semiconductor epitaxial layer 33 thick, it is possible to form the overflow barrier deeply and to improve the sensitivity of the solid-state imaging device.

[0039] In the embodiment described above, P on the N-type semiconductor substrate 31 ^- was the case of the semiconductor epitaxial layer 33 is grown, N as a semiconductor epitaxial layer ^-
Even when a semiconductor epitaxial layer or a non-doped semiconductor epitaxial layer is grown, it is possible to apply the manufacturing method of the present invention, that is, the method of annealing a fractured surface with a laser. In particular, when the P ^- semiconductor epitaxial layer 33 is formed as the semiconductor epitaxial layer as in the above-described embodiment, a pn junction J is formed on the side surface 13 of the chip 10. The effect of reducing the junction leak in the above is great.

Note that P^-Substitute for semiconductor epitaxial layer 33
Instead, as shown in FIG. 7, a non-doped (i-type) semiconductor
When the epitaxial layer 34 is formed,
The P-type of the P-type semiconductor well region 32 in the axial layer 34
Diffusion of impurities and out diffusion 35 occur
It is possible. In this way, the diffusion and out of P-type impurities
When the diffusion 35 occurs, P ^-Semiconductor epita
As in the case where the axial layer 33 is formed, pn
Bond J may be formed. So in this case
When the present invention is applied,
If the annealing is performed, the side surface 13 of the chip 10
Junction leakage can be reduced
You.

The present invention is not limited to the above-described embodiment, and may take various other configurations without departing from the gist of the present invention.

[0042]

According to the present invention described above, since the occurrence of junction leaks in a cut section obtained by cutting a semiconductor wafer into chips can be reduced, the quality of the semiconductor device can be improved and the production yield can be improved. can do.

According to the present invention, a semiconductor well region is formed at a deep position from the surface by ion-implanting impurities with a high energy or by growing a thick semiconductor epitaxial layer without generating a junction leak on a side surface of a chip. Can be formed.
Therefore, for example, in a semiconductor device (a solid-state imaging device or a semiconductor light-receiving device) having a photosensor, an overflow barrier formed of a semiconductor well region is formed deeply, a depletion layer of the photosensor is widened, and sensitivity can be improved. .

[Brief description of the drawings]

FIGS. 1A and 1B are process diagrams showing a manufacturing process of a semiconductor device as one embodiment of the present invention.

FIG. 2 is a process diagram showing a manufacturing process of a semiconductor device as one embodiment of the present invention.

FIG. 3 is a process chart showing a manufacturing process of a semiconductor device as one embodiment of the present invention.

FIG. 4 is a diagram showing a semiconductor wafer and each chip.

FIG. 5 is a schematic configuration diagram (cross-sectional view) when the semiconductor device shown in FIGS. 1 to 3 is applied to a CCD solid-state imaging device.

FIGS. 6A and 6B are process diagrams showing a manufacturing process of a semiconductor device as another embodiment of the present invention.

FIG. 7 is a diagram showing a case where a non-doped semiconductor epitaxial layer is formed on a semiconductor substrate.

[Explanation of symbols]

1 semiconductor wafer, 2,31 semiconductor substrate, 3,32
P-type semiconductor well region, N-type semiconductor region, 5 electrode layers, 10 chips, 11 ion implantation, 12 laser,
33,34 Semiconductor epitaxial layer, J pn junction

Claims (3)

[Claims] 1. A method of manufacturing a semiconductor device having a pn junction on a side surface of a chip, comprising a step of cutting a semiconductor wafer into the chips while annealing the side surface of the chip with a laser. A method for manufacturing a semiconductor device. 2. The method according to claim 1, wherein the pn junction is formed by a semiconductor substrate and a semiconductor well region inside the semiconductor substrate. 3. The method according to claim 1, wherein the pn junction is formed by a semiconductor substrate and a semiconductor epitaxial layer on the semiconductor substrate.