JP2002176160A - Solid-state image pickup element, solid-state image pickup device and system provided with the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To sufficiently separate elements between a pixel part and a vertical scanning circuit part or the like. SOLUTION: In this solid-state image pickup element provided with a scanning part 12 for reading signals from a pixel 10, the scanning part 12 is formed on a hollow region 110 formed inside a well region 111.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device, a solid-state imaging device, and a system including the same.
The present invention relates to a solid-state imaging device having an OI (Silicon On Insulator) structure, a solid-state imaging device, and a system including the same.

[0002]

2. Description of the Related Art Conventionally, an SOI substrate in which a crystalline silicon layer is formed on a silicon insulating film provided on a supporting substrate has a C
There is an SOI-MOS field effect transistor formed by forming a MOS field effect transistor by a MOS process. SOI-MOS type field effect transistors have the advantage of being latch-up free because individual elements can be easily separated as compared with bulk type MOS type field effect transistors. In addition, the SOI device has a merit of operating at high speed and with low power consumption because the junction capacitance is smaller than that of a bulk device, and has attracted attention as a next-generation transistor particularly in the field of portable information terminals. .

Further, assuming that an image processing apparatus is incorporated in a portable information terminal, it is essential to reduce the power consumption of an image pickup device. For this purpose, a CMOS solid-state image pickup device and an SOI device that operates with low power consumption are integrated. Is considered a powerful tool.

Further, in recent years, since the quality of SOI wafers has been greatly improved, there has been a movement to adopt SOI devices for logic ICs such as a central processing circuit and to mass-produce them.

[0005] Conventionally, a solid-state imaging device having a CMOS solid-state imaging device has attracted attention. this is,
This is because the CMOS solid-state imaging device has better matching with the CMOS process than the CCD solid-state imaging device, and can be driven with low power consumption and operated with a single power supply. This is because it can be integrated into a single chip with the circuit unit and is easily integrated. Therefore, it is expected that it will build its position as an intelligent sensor in the future.

[0006] However, the CMOS type solid-state imaging device has a CC
It has been said that the image quality is inferior to that of the D-type imaging device. This is because there are noises such as reset noise, readout amplifier noise, fixed pattern noise due to device variation, and fixed pattern noise due to dark current. CCD imaging devices have a long life span of 100 days. CCD imaging devices can prevent contamination in all process steps, and can reduce dark current caused by crystal defects by reducing intrinsic gettering and process temperatures. We are working on reduction.

[0007] Since the CMOS type image sensor follows the CMOS process, care must be taken for crystal defects more than the CCD process.
In recent years, technology to reduce noise in circuits
It has been said that the image quality of MOS type image sensors has become similar to that of CCD type image sensors, but improvement of white scratches due to crystal defects and crosstalk due to noise generated from peripheral circuits remains a challenge. ing.

By the way, a solid-state image pickup device is mounted on an SOI substrate.
When trying to form, Si and SiO _TwoExists at the interface with
Image quality deteriorates due to dark current caused by many defects
Therefore, the solid-state imaging device itself is formed on the SOI substrate.
Was not achieved.

For this reason, the CCD type solid-state image pickup device is designed so as to avoid element separation by the selective oxide film as much as possible. Further, the CMOS type solid-state imaging device is also designed so that the interface of the selective oxide film does not contact the photoelectric conversion portion.

Further, it is considered that white defects due to crystal defects in the SOI substrate occur during a process step, and this is a serious problem in a CMOS type solid-state imaging device following a CMOS process. At present, most photoelectric conversion units employ a so-called buried type structure so as not to be affected by defects on the silicon surface. Therefore, the formation region of the photoelectric conversion unit is extending in the depth direction.

Further, since the surface silicon layer (SOI layer) of a normal SOI wafer is at most 0.2 μm, a large amount of white flaws occur when the interface of the buried oxide film comes into contact with the photodiode. Become.

FIG. 1 is a plan view showing a schematic configuration of a CMOS solid-state imaging device disclosed in Japanese Patent Application Laid-Open No. 11-195776. FIG. 1 shows a pixel 10 that generates electric charges based on incident light, a vertical scanning circuit unit 12 and a horizontal scanning circuit units 11 and 14 that control reading of electric charges generated in each pixel 10, and stores read signals. FIG. 1 shows a signal storage unit 13, a multiplexer 15 for collecting stored signals, and an amplifier circuit unit 16 for amplifying the collected signals.

The pixel 10 has a photoelectric conversion unit (PD) 1 such as a photodiode for converting incident light into electric charge, and a transfer switch (TX) 2 for transferring the converted electric charge.
A source follower (SF) 4 as amplifying means for reading, amplifying and outputting the transferred signal charges, and a select switch (SEL) 5 for selecting a pixel;
And a reset switch (RES) 3 for removing charges still remaining after the transfer and resetting to the reference voltage VR.

FIG. 8 is a sectional view taken along line XX 'of FIG. FIG. 9 is a sectional view taken along line YY ′ of FIG. FIG.
FIG. 9 shows that the P ⁺ layer 114 and the N ⁺ layer 11
3, a photoelectric conversion portion 10 formed in the order of a P-well layer 111, and a gate poly electrode 101 in the depth direction from the surface.
A vertical scanning circuit portion 12 formed in layers in the order of source-drain regions 104 and a selective oxide film 10 for separating each element
2 is shown.

The horizontal scanning circuit 11 and the signal storage 1
3, the layer configuration of the multiplexer 15 and the amplification circuit section 16 is the same as that of the vertical scanning circuit section 12, and has an SOI structure.

[0016]

However, in the prior art, although the vertical scanning circuit section and the like are separated from the pixel side by a selective oxide film, the signal noise generated on the vertical scanning circuit section and the like is reduced. In some cases, it flows into the pixel side below the selective oxide film, that is, through the substrate, to cause crosstalk. Therefore, it is necessary to sufficiently separate the elements between the pixel portion and the vertical scanning circuit portion so as not to deteriorate the image quality.

Accordingly, it is an object of the present invention to sufficiently separate elements between a pixel portion and a vertical scanning circuit portion.

[0018]

According to another aspect of the present invention, there is provided a solid-state imaging device having a scanning unit for reading out a signal from a pixel, wherein the scanning unit is formed in a well region. It is characterized in that it is formed on a hollow region.

Further, the solid-state imaging device of the present invention includes the above-described solid-state imaging device, a clock circuit for generating a clock signal for controlling the operation of a scanning unit of the solid-state imaging device, and a signal amplified by the amplification circuit unit. An analog-digital converter for converting an analog signal to a digital signal, and a memory for storing the signal converted by the analog-digital converter are provided.

Furthermore, a solid-state imaging system according to the present invention includes the above-described solid-state imaging device, an optical system that forms light on the solid-state imaging device, and a signal processing circuit that processes an output signal from the solid-state imaging device. It is characterized by the following.

That is, in the present invention, a pixel group in which a plurality of pixels are two-dimensionally arranged is formed in bulk silicon, and has an SOI structure including a region other than the pixel group such as a scanning unit.

[0022]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a plan view showing a schematic configuration of a solid-state imaging device according to Embodiment 1 of the present invention.
FIG. 1 shows a pixel 10 that generates a charge based on incident light,
A vertical scanning circuit section 12 and horizontal scanning circuit sections 11 and 14 for controlling the reading of the electric charges generated in each pixel 10, a signal accumulating section 13 for accumulating the read signals, and a multiplexer 15 for integrating the accumulated signals; And an amplifier circuit section 16 for amplifying the combined signal.

The pixel 10 has a photoelectric conversion unit (PD) 1 such as a photodiode for converting incident light into electric charge, and a transfer switch (TX) 2 for transferring the converted electric charge.
A source follower (SF) 4 as amplifying means for reading, amplifying and outputting the transferred signal charges, and a select switch (SEL) 5 for selecting a pixel;
There is provided a reset switch (RES) 3 for removing the charge still remaining after the transfer and resetting it to the reference voltage VR, and can be shown by an equivalent circuit diagram as shown in FIG.

FIG. 2 is a sectional view taken along the line XX 'of FIG. FIG. 3 is a sectional view taken along line YY ′ of FIG. Figure 2
FIG. 3 shows the P ⁺ layer 114 and the N ⁺ layer 11 in the depth direction from the surface.
3, the P-well layer 111 and the gate poly electrode 10 in the depth direction from the surface.
1, a vertical scanning circuit section 12 formed in layers in the order of a source-drain region 104 and a hollow region 110, and a selective oxide film 102 for separating each element are shown.

On the side of the vertical scanning circuit section 12, air is used in the insulating layer section to reduce parasitic capacitance, and a hollow area 110 is formed. The horizontal scanning circuit unit 1
The layer configuration on the 1st side, the signal accumulation section 13 side, the multiplexer 15 side and the amplification circuit section 16 side is also the same as the vertical scanning circuit section 12 side, and has an SOI structure.

That is, the solid-state imaging device of this embodiment is
The photoelectric conversion unit 1 is formed in bulk silicon, and the vertical scanning circuit unit 12 and the like have an SOI structure so that dark current and signal charges generated in the vertical scanning circuit unit 12 and the like do not flow to the pixels 10. ing. Note that the vertical scanning circuit section 12 and the like operate at high speed with low power consumption by having an SOI structure.

Next, a method for manufacturing the solid-state imaging device according to the present embodiment will be described.

FIG. 5 is a diagram showing a state during the manufacturing process of the solid-state imaging device shown in FIG. In FIG. 5, FIG.
The same reference numerals are given to the same parts as. First, as shown in FIG. 5, a plurality of columns 111 are formed by patterning a region having an SOI structure such as the vertical scanning circuit unit 12 side.

Next, in a state where hydrogen or the like is added to prevent oxidation of the silicon surface during annealing, for example, a pressure of 1 is applied.
The substrate is annealed in an atmosphere of 33 Pa (10 Torr) and a temperature of 1100 ° C. Thus, crystallization is performed by utilizing the surface migration of silicon to form a plate-shaped hollow region 110.

Subsequently, a selective oxide film 102 is formed on the P well layer 111 by thermal oxidation. Next, a gate oxide film (not shown) is formed in the P well layer 111. Then, polysilicon is deposited and patterned to form a gate poly electrode 101. Next, an N ⁺ region 113 is formed in a self-aligned (self-aligned) manner using the gate poly electrode 101 and the selective oxide film 102 as a mask. And N ⁺
If the P ⁺ region 114 is formed on the region 113, the solid-state imaging device shown in FIG. 1 is completed.

Actually, a single layer or a plurality of wiring layers and via holes are further formed, and the wiring layers are electrically connected to the N ⁺ region 113 through the via holes.

Incidentally, when the solid-state image sensor of the present embodiment is compared with the conventional solid-state image sensor, the dark current is reduced by 15% and the power consumption is reduced by 20%. In particular,
When the electric charge is accumulated at 60 ° C. for 1 second, the current is 20 mA in the conventional solid-state imaging device, but is 17 mA in the present embodiment, and the power consumption is 200 mW, which is 160 mW. Further, with respect to crosstalk, the phenomenon of color mixing and false color has also been improved.

(Embodiment 2) FIG. 6 is a plan view showing a schematic configuration of a solid-state imaging device according to Embodiment 2 of the present invention.
FIG. 6 shows a solid-state image sensor (image sensor) 21 shown in FIG. 1, a clock circuit 22 for generating a clock signal for controlling the operation of the vertical scanning circuit unit 12 and the like of the solid-state image sensor 21, and a solid-state image sensor 21. Analog-to-digital converter (A / D converter) 23 that converts the signal amplified by the amplifier circuit section 16 from an analog signal to a digital signal.
And a memory 24 in which the signal converted by the A / D converter 23 is stored.

Here, the clock circuit 22, A /
The D converter 23 and the memory 24 are formed as one-chip intelligent sensors, and have an SOI structure by the method described in the first embodiment, for example. Thus, low power consumption and high-speed image processing of the entire solid-state imaging device are realized.

Incidentally, when the solid-state imaging device of the present embodiment is compared with the conventional solid-state imaging device, the dark current is reduced by 20% and the power consumption is reduced by 30%. In particular,
In the present embodiment, when electric charge is accumulated at 60 ° C. for 1 second, the current is 30 mA in the conventional solid-state imaging device, but is 24 mA in the present embodiment, and the power consumption is 800 mW, which is 550 mW. Further, with respect to crosstalk, the phenomenon of color mixing and false color has also been improved.

(Embodiment 3) FIG. 7 is a configuration diagram of a solid-state imaging system according to Embodiment 3 of the present invention. In FIG.
Reference numeral 1001 denotes a barrier functioning both as protection of a lens and a main switch. Reference numeral 1002 denotes an optical image of a subject.
A lens 1004 forms an image, 1003 denotes an aperture for varying the amount of light passing through the lens, 1004 denotes a lens 1002
The solid-state imaging device 1005 described in the first embodiment for capturing the subject formed in step 1 as an image signal. Reference numeral 1005 denotes an imaging signal processing circuit that performs various types of correction, clamping, and other processing on an image signal output from the solid-state imaging device 1004. , 1006 are A / D converters for performing analog / digital conversion of image signals output from the solid-state imaging device 1004, and 1007 is an A / D converter.
A signal processing unit that performs various corrections on the image data output from the D converter 1006 and compresses the data. Reference numeral 1008 denotes a solid-state imaging device 1004 and an imaging signal processing circuit 1005A.
A / D converter 1006, a timing generation section for outputting various timing signals to a signal processing section 1007, an overall control / calculation section 1009 for controlling various operations and the entire still video camera, and a reference numeral 1010 for temporarily storing image data Memory unit 1011 is a recording medium control interface unit for recording or reading on a recording medium, 1012 is a detachable recording medium such as a semiconductor memory for recording or reading out image data, and 1013 is an external computer or the like. External interface for communication (I / F)
Department.

Next, the operation of FIG. 7 will be described. When the barrier 1001 is opened, the main power is turned on, and then the power of the control system is turned on.
The power of the imaging system circuit such as the / D converter 1006 is turned on. Then, in order to control the exposure amount, the overall control / arithmetic unit 1009 opens the aperture 1003, and the signal output from the solid-state image sensor 1004 is
05 and output to the A / D converter 1006.
A / D converter 1006 A / D converts the signal,
The signal is output to the signal processing unit 1007. Signal processing unit 1007
Controls the exposure calculation based on the data.
009.

The brightness is determined based on the result of the photometry, and the overall control / arithmetic unit 1009 controls the aperture according to the result. Next, based on the signal output from the solid-state imaging device 1004, high-frequency components are extracted, and the distance to the subject is calculated by the overall control / calculation unit 1009. Thereafter, the lens 1002 is driven to determine whether or not the lens is in focus. If it is determined that the lens is not focused, the lens 1002 is driven again to perform distance measurement.

Then, after the focusing is confirmed, the main exposure starts. When the exposure is completed, the image signal output from the solid-state imaging device 1004 is corrected by an imaging signal processing circuit 1005 and the like, and the A / D converter 1006 performs A / D conversion.
The data is converted and stored in the memory unit 1010 by the overall control / arithmetic unit 1009 through the signal processing unit 1007. Thereafter, the data stored in the memory unit 1010 is transferred to the recording medium control I / F unit 1 under the control of the overall control / arithmetic unit 1009.
011, a removable recording medium 10 such as a semiconductor memory
12 is recorded. Further, the image may be processed by inputting directly to a computer or the like through the external I / F unit 1013.

[0041]

As described above, according to the present invention,
The scanning section is formed on a hollow area formed in the well area, and the hollow area prevents dark current and the like generated on the scanning section side from flowing to the pixel side. Element separation can be sufficiently performed between the device side and the like.

[Brief description of the drawings]

FIG. 1 is a plan view illustrating a schematic configuration of a first embodiment of the present invention and a conventional solid-state imaging device.

FIG. 2 is a sectional view taken along line X-X 'of FIG.

FIG. 3 is a sectional view taken along line Y-Y 'of FIG.

FIG. 4 is an equivalent circuit diagram of the pixel of FIG.

5 is a diagram illustrating a state during a manufacturing process of the solid-state imaging device illustrated in FIG. 1;

FIG. 6 is a plan view illustrating a schematic configuration of a solid-state imaging device according to a second embodiment of the present invention.

FIG. 7 is a configuration diagram of a solid-state imaging system according to a third embodiment of the present invention.

FIG. 8 is a schematic sectional view of a conventional solid-state imaging device.

FIG. 9 is a schematic sectional view of a conventional solid-state imaging device.

[Explanation of symbols]

Reference Signs List 1 photoelectric conversion unit (PD) 2 transfer switch (TX) 3 reset switch (RES) 4 source follower (SF) 5 select switch (SEL) 10 pixel 11, 14 horizontal scanning circuit unit 12 vertical scanning circuit unit 13 signal storage unit 15 Multiplexer 16 Amplifier circuit section 21 Solid-state imaging device (image sensor) 22 Clock circuit 23 A / D converter 24 Memory 101 Gate poly electrode 102 Selective oxide film 103 Source 104 Source-drain region 105 Drain 111 Column 113 N ⁺ layer 114 P ⁺ layer 1001 Barrier 1002 Lens 1003 Aperture 1004 Solid-state image sensor 1005 Image signal processing circuit 1006 A / D converter 1007 Signal processor 1008 Timing generator 1009 Overall control / arithmetic unit 1010 Memory unit 1011 Recording medium control Interface unit 1012 recording medium 1013 external interface unit

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4M118 AA05 AA10 AB01 BA14 CA02 DD12 FA06 FA33 FA50 5C024 AX01 CY42 CY47 GX03 GY31 5F049 MA02 MB03 NA04 NB05 RA08 SS03 UA07 UA14 5J022 AA01 AB07 BA02 BA06 CD02 CE01 CF08 CF10

Claims (7)

[Claims] 1. A solid-state imaging device having a scanning unit for reading out a signal from a pixel, wherein the scanning unit is formed on a hollow region formed in a well region. . 2. The apparatus according to claim 1, further comprising: a multiplexer configured to combine signals read from each pixel by the scanning unit; and an amplifier circuit configured to amplify the signals combined by the multiplexer. Solid-state imaging device. 3. The solid-state imaging device according to claim 2, wherein the multiplexer and the amplifier circuit are formed on a hollow region formed in a well region. 4. The solid-state imaging device according to claim 1, wherein at least the scanning unit is a field effect transistor. 5. The solid-state imaging device according to claim 1, a clock circuit that generates a clock signal for controlling an operation of a scanning unit of the solid-state imaging device, and an amplifier that is amplified by the amplification circuit unit. An analog-to-digital converter for converting the converted signal from an analog signal to a digital signal,
A memory for storing the signal converted by the analog-digital converter. 6. The solid-state imaging device according to claim 5, wherein the clock circuit, the analog-to-digital converter, and the memory are formed on a hollow area formed in a well area. 7. A solid-state imaging device according to claim 5, wherein:
A solid-state imaging system comprising: an optical system that forms an image of light on the solid-state imaging device; and a signal processing circuit that processes an output signal from the solid-state imaging device.