JP2002169548A - Instrument and method for rhythm playing - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a rhythm playing instrument and a method in which the type of reproduced performance pattern is changed according to the timing of switch operation while improving the memory utilizing efficiency. SOLUTION: When one of the rhythm blocks of fill-in A(n) to C(n) is designated according to the operation timing of fill-in switch 1c, each designated rhythm block is read from a rhythm block group RB and is copied to the pattern housing area of a RAM5. Since the designated fill-in pattern is formed and reproduced, it is made possible to change the type of reproduced performance pattern according to the timing of the switch operation while improving the memory utilizing efficiency.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a rhythm playing device and a rhythm playing method suitable for use in, for example, electronic musical instruments.

[0002]

2. Description of the Related Art Conventionally, a plurality of rhythm patterns are stored in advance for each of a plurality of rhythm types such as "rock", "pops" or "disco", and a desired rhythm type performance pattern is selected from the stored rhythm patterns. A rhythm playing device that automatically performs a rhythm according to a selected playing pattern is known. The performance pattern referred to here is composed of data representing the pitch, sounding timing, and the like of each sound to be played. An intro pattern corresponding to the introduction part of the normal pattern, a fill-in pattern inserted in the middle of the normal pattern,
There is an ending pattern added to the end of the normal pattern.

In a rhythm performance device that stores these performance patterns, a start / stop switch is usually operated to advance a rhythm performance according to a normal pattern, and, for example, the fill-in switch is changed at a timing when it is desired to change to a fill-in pattern. The performance pattern to be reproduced can be switched in accordance with a switch operation, such as changing from a normal pattern to a fill-in pattern by operating.

[0004]

By the way, in a conventional rhythm performance device, a performance pattern for each rhythm type is often stored in a memory. For this reason, different rhythm types may have exactly the same performance pattern as each other, and there is a problem that such a pattern duplication wastes memory. In addition, in the conventional rhythm performance device, since the type of the performance pattern to be reproduced is simply changed according to the switch operation, the type of the performance pattern to be reproduced cannot be changed according to the switch operation timing. There is also. Therefore, the present invention
In view of such circumstances, it is an object of the present invention to provide a rhythm playing device and a rhythm playing method capable of changing the type of a playing pattern to be reproduced according to a switch operation timing while improving memory use efficiency. And

[0005]

In order to achieve the above object, according to the first aspect of the present invention, a plurality of types of rhythm blocks each comprising pattern data representing at least a pitch and a sounding timing of each sound forming a music piece are stored. And a block address representing a storage position of a rhythm block stored in the first storage means.
A second storage unit for storing a plurality of types of rhythm patterns composed of rhythm blocks specified by a plurality of block addresses; and a plurality of types of rhythm patterns stored in the second storage unit in accordance with the timing at which reproduction is instructed. Pattern selecting means for selecting a predetermined rhythm pattern from the rhythm patterns, and a corresponding one of the first storage means according to the block address of each rhythm block constituting the rhythm pattern selected by the pattern selecting means. A pattern forming unit for designating each rhythm block, copying and transferring each designated rhythm block to a third storage unit, and forming pattern data corresponding to the selected rhythm pattern; Reproducing means for reproducing the pattern data stored in the third storage means. To.

According to the second aspect of the present invention, a plurality of types of rhythm blocks composed of pattern data representing at least the pitch and sounding timing of each sound forming the music are stored in the first storage means, A plurality of types of rhythm patterns, each of which is formed from a block address indicating a storage position of a rhythm block stored in the first storage means and is composed of each rhythm block specified by a plurality of block addresses, are stored in the second storage means. Storing a predetermined rhythm pattern from a plurality of types of rhythm patterns stored in the second storage means in accordance with the timing at which the reproduction is instructed; According to the block address of each rhythm block constituting the rhythm pattern selected in the above, from within the first storage means, Specify each rhythm block to respond,
A pattern forming step of copying and transferring each designated rhythm block to a third storage means to form pattern data corresponding to the selected rhythm pattern; and a third storage means in response to the reproduction instruction. And a reproducing process of reproducing the pattern data stored in the.

According to the present invention, a predetermined rhythm pattern is selected from a plurality of types of rhythm patterns stored in the second storage means in accordance with the timing at which the reproduction is instructed, and each of the rhythm patterns constituting the selected rhythm pattern is selected. According to the block address of the rhythm block, each corresponding rhythm block is designated from the first storage means, and each designated rhythm block is copied and transferred to the third storage means to correspond to the selected rhythm pattern. Since pattern data is formed and reproduced in response to a reproduction instruction, there is no need to prepare pattern data for each rhythm pattern.As a result, pattern duplication can be avoided, thereby improving memory use efficiency. However, it is possible to change the type of performance pattern to be reproduced according to the timing of a reproduction instruction (switch operation). To have.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A rhythm playing device according to the present invention
The present invention can be applied not only to a well-known electronic musical instrument having an automatic accompaniment function but also to a DTM device using a personal computer. Hereinafter, a rhythm playing device according to an embodiment of the present invention will be described as an example with reference to the drawings.

(1) Configuration FIG. 1 is a block diagram showing the configuration of an embodiment according to the present invention. In this figure, reference numeral 1 denotes a panel switch composed of various switches arranged on a console panel, and generates an event corresponding to each switch operation. This event is captured by a key scan of the CPU 3 described later. The switch types provided on the panel switch 1 include a power switch (not shown), a rhythm switch 1a for specifying a rhythm type (rhythm number),
There are a start / stop switch 1b for instructing start / stop of rhythm performance, and a fill-in switch 1c which is operated when a fill-in pattern is inserted in the middle of a normal pattern for rhythm performance.

Reference numeral 2 denotes an LCD provided on the console panel
A display unit comprising a panel (not shown) and a display driver (not shown) for controlling the display of the LCD panel in accordance with a display control signal supplied from the CPU 3, and operates in accordance with the operation of the panel switch 1. Display the status etc. on the screen. The CPU 3 executes various control programs stored in the ROM 4, and controls each unit of the apparatus in accordance with each switch operation (switch event) of the panel switch 1 captured by key scanning. Details will be described later.

The ROM 4 stores various control programs loaded on the CPU 3 and various performance patterns. Here, referring to FIG. 2 and FIG.
The data forms of the various performance patterns stored in the. 2, N types of rhythm blocks (1) to (N) are stored in the rhythm block group RB. These rhythm blocks are composed of basic elements constituting a rhythm pattern to be described later, that is, pattern data representing the pitch, sounding timing, and the like of each sound forming a musical piece for a predetermined bar. Rhythm patterns (1) to (N) corresponding to the rhythm numbers are stored in the rhythm pattern RP. In this embodiment, one rhythm pattern is formed from a normal pattern NP and a fill-in pattern FP to simplify the description.

Further, as shown in FIG. 3, the normal pattern NP is formed from normals A and B, and the fill-in pattern FP is formed from fill-ins A to C. In the present embodiment, the normal A is used repeatedly for performance, and the normal B is used immediately after the performance starts or immediately after the rhythm number is changed. The fill-ins A to C are selectively used in accordance with the operation timing of the fill-in switch 1c operated during the normal A performance, and details thereof will be described later. Now, such normals A and B and fill-ins A to C are each composed of a block address designating a rhythm block. For example, the normal A (1) of the rhythm pattern (1) is composed of addresses specifying the rhythm blocks (1) to (4) in the rhythm block group RB.

In short, the rhythm patterns (1) to (N) stored in the rhythm pattern RP correspond to, so to speak, an address map corresponding to a rhythm number. As will be described later, when a rhythm pattern having a desired rhythm number is designated in accordance with the operation of the rhythm change switch 1a, the rhythm corresponding to the designated rhythm pattern is referred to, that is, by referring to the block address. The block is read out from the rhythm block group RB, and is copied to a pattern storage area of the RAM 5 to be described later, so that the designated rhythm pattern (normal pattern NP
And a fill-in pattern FP).

Now, description of the configuration will be made with reference to FIG. 1 again. The RAM 5 has a work area for temporarily storing various register / flag data used for the processing of the CPU 3, and a rhythm block group RB of the ROM 4 according to a block address.
And a pattern storage area for storing a rhythm block copied from. This pattern storage area is used as a ring buffer in which the address at the head of the area and the address at the rear end of the area are continuous. Reference numeral 6 denotes a sound source configured by a well-known waveform memory reading method. The tone generator 6 has a plurality of simultaneous sounding channels, and sequentially reads out a rhythm pattern of each part assigned to each sounding channel from a pattern storage area of the RAM 5 in synchronization with a reproduction tempo, and reads the rhythm pattern from each sounding channel. Output as tone data of the specified rhythm tone. Reference numeral 7 denotes a sound system in which tone data output from the sound source 6 is subjected to D / A conversion, then amplified and sounded as a tone from the speaker SP.

(2) Operation Next, the operation of the embodiment will be described with reference to FIGS. Operation of Main Routine When the power is turned on, the CPU 3 reads out a predetermined control program from the ROM 4, loads it into itself, and executes the main routine shown in FIG. When the main routine is executed, the CPU 3 advances the processing to step SA1, and
Initialization for resetting various registers and flags stored in the work area 5 and setting initial values is performed. In step SA1, the sound source 7 is instructed to initialize various registers and flags.

After completion of the initialization, the CPU 3
Proceeds to step SA2, selects switch processing corresponding to the switch event generated by the panel switch 1, for example, selects a rhythm pattern to play a rhythm according to the operation of the rhythm switch 1a, and starts / selects the selected rhythm pattern. In addition to starting the performance by turning on the stop switch 1b, a process such as inserting a fill-in pattern while playing the normal pattern is performed by operating the fill-in switch 1c. Next, at step SA3, a performance process for reproducing a rhythm pattern in accordance with the reproduction tempo is executed, and at the subsequent step SA4, other processes such as, for example, displaying a device setting state and an operation state on a screen are executed. Thereafter, steps SA2 to SA4 described above are repeatedly executed until the power is turned off.

Operation of Switch Processing Routine Next, referring to FIGS. 5 to 8, each of the "rhythm switching switch processing routine", "start / stop processing routine" and "fill-in switch processing routine" which constitute the switch processing routine will be described. The operation will be described sequentially.

(A) Operation of Rhythm Changeover Switch Processing Routine Step SA2 of the main routine described above (see FIG. 3)
When the switch processing routine is executed via
3 executes the rhythm switch processing routine through step SB1 shown in FIG. 5, and executes step SC1 shown in FIG.
To determine whether the rhythm switch 1a has been turned on. By the way, the rhythm change switch 1a includes, for example, a key switch for counting up / down the rhythm number displayed on the display unit 2, although not shown. If the rhythm switch 1a is not turned on, the determination result is "N".
O ", the routine is completed without performing any processing. However, if the operation is turned on, the determination result becomes" YES ",
The process proceeds to Step SC2.

At step SC2, the rhythm number input in response to the ON operation of the rhythm switch 1a is stored in a register n (hereinafter, referred to as rhythm number n). When the rhythm number n is designated, the CPU 3 advances the process to step SC3, and sets the normal B (n) of the rhythm pattern (n).
In accordance with the block address stored in the rhythm block group RB. For example, rhythm number 1 is set by rhythm change switch 1a.
Is selected from the rhythm block group RB (see FIG. 3) according to the block address stored in the normal B (1) of the rhythm pattern (1). , (2),
(3) and (4) are specified.

In step SC 4, each designated rhythm block is read from the rhythm block group RB and copied to the pattern storage area of the RAM 5.
At the time of this copy, the address pointer AD is sequentially incremented to advance the write position. Thus, according to the ON operation of the rhythm change switch 1a,
When the rhythm pattern (n) corresponding to the rhythm number n is designated, the rhythm block constituting the normal B (n) of the rhythm pattern (n) is copied to the pattern storage area of the RAM 5, whereby the normal B (n) Pattern data is formed. This situation is illustrated in FIG. FIG. 10A is a map showing the pattern data of normal B (n) formed in the pattern storage area of the RAM 5 in chronological order, and the black triangles in the figure indicate the position of the address pointer AD. .

(B) Operation of Start / Stop Switch Processing Routine When the rhythm switch processing is completed, the CPU 3 executes the start / stop switch processing routine via step SB2 (see FIG. 5), and executes the steps shown in FIG. The process proceeds to SD1. In step SD1, it is determined whether or not the start / stop switch 1b has been turned on. If the start / stop switch 1b has not been turned on, the determination result is "NO", and this routine is completed. On the other hand, when the switch is turned on, the determination result is "YES", the process proceeds to step SD2, and the start flag ST stored in the register STF is set.
F is inverted. When the start flag STF is "1", the performance is started, and when it is "0", the performance is stopped. In other words, the start / stop switch 1b is a so-called toggle switch that sets a flag so as to alternately indicate start or stop each time the switch is turned on. Therefore, the value of the start flag STF is inverted each time the switch is turned on.

Then, in a step SD3, it is determined whether or not the inverted start flag STF is "1", that is, whether or not the rhythm performance is to be started. Here, if the start flag STF is “0”, the determination result is “N”.
"O", the process proceeds to step SD7, instructs the sound source 7 to mute all rhythm sounds, and completes this routine. On the other hand, if it is the state in which the start of the rhythm performance is instructed, the determination result is “YES”, and the process proceeds to Step SD4 where the rhythm block group is stored in accordance with the block address stored in the normal A (n) of the rhythm pattern (n). The corresponding rhythm block is designated from the RB. For example, when the rhythm pattern (1) of the rhythm number 1 is selected, the normal A of the rhythm pattern (1) is selected.
According to the block address stored in (1),
Rhythm blocks (1), (2), (3), and (4) are designated from the rhythm block group RB (see FIG. 3).

Next, at step SD5, each designated rhythm block is read from the rhythm block group RB and is sequentially copied to the pattern storage area of the RAM 5. At the time of this copy, the address pointer AD
Is incremented, and the writing position is sequentially advanced.
Thus, as shown in FIG.
When the pattern data of (n) is formed in the pattern storage area of the RAM 5, the CPU 3 proceeds to step SD6,
The address pointer AD is reset to the initial value "1", the rhythm pattern timing data is read from the pattern storage area of the RAM 5 according to the reset address pointer AD, and stored in the register T, after which this routine is completed.

(C) Operation of Fill-in Switch Processing Routine When the start / stop switch processing is completed, C
PU3 executes the fill-in switch processing routine via step SB3 (see FIG. 5), and proceeds to step SE1 shown in FIG. In step SE1, it is determined whether or not the fill-in switch 1c has been turned on. If not, the result of the determination is "NO", and this routine is completed. On the other hand, fill-in switch 1c
Is turned on, the determination result is "YES", the process proceeds to the next step SE2, and it is determined whether or not the flag STF is "1", that is, whether the rhythm performance has been started. If the performance is stopped, the determination result is "NO", and this routine is completed without performing any processing. However, if the performance is started, the determination result is "YES", and the process proceeds to the next step SE3.

At step SE3, it is determined whether or not the normal A (n) is being played. Where normal A
When the performance of (n) is not performed, the determination result is “NO”, and the ON operation of the fill-in switch 1c is invalidated. On the other hand, if the normal A (n) is being played, the determination result is “YES”, and the next step SE4
To determine the number of beats of the normal A (n) during the performance at which the fill-in switch 1c is turned on.

In the case of the first beat, the process proceeds to step SE5, and the corresponding rhythm block is designated according to the block address stored in the fill-in A (n) of the rhythm pattern (n). For example, when the normal A (1) of the rhythm pattern (1) is being played and the fill-in switch 1c is turned on at the first beat, the data is stored in the fill-in A (1) of the rhythm pattern (1). According to the block address, the rhythm blocks (5), (6),
(7) and (8) are specified.

In the case of the second beat, the process proceeds to step SE6, and the corresponding rhythm block is designated according to the block address stored in the fill-in B (n) of the rhythm pattern (n). For example, if normal A (1) of rhythm pattern (1) is being played and fill-in switch 1c is turned on at the second beat,
According to the block address stored in the fill-in B (1) of the rhythm pattern (1), the rhythm blocks (10),
(6), (7), and (8) are specified.

If it is the third or fourth beat, the process proceeds to step SE7, and the corresponding rhythm block is designated according to the block address stored in the fill-in C (n) of the rhythm pattern (n). For example, when the normal A (1) of the rhythm pattern (1) is being played and the fill-in switch 1c is turned on at either the third beat or the fourth beat, the fill-in of the rhythm pattern (1) is performed. According to the block address stored in C (1), the rhythm blocks (11), (6), (7),
(8) is designated.

In this manner, the fill-ins A (n) to C (n) correspond to the ON operation timing of the fill-in switch 1c.
When any of the rhythm blocks of (n) is specified, the process proceeds to step SE8, where the specified rhythm blocks are read from the rhythm block group RB and sequentially copied to the pattern storage area of the RAM 5. At the time of copying, the address pointer AD is incremented and the writing position is sequentially advanced. And step SE9
Then, in order to read out the fill-in pattern data formed in the pattern storage area of the RAM 5, the address pointer AD is set to one position before the head address of the designated block, and this routine is completed.

Operation of Performance Processing Routine Next, the operation of the performance processing routine will be described with reference to FIG. Step SA3 of the main routine described above
When the performance processing routine is executed via (see FIG. 3), the CPU 3 advances the processing to step SF1 shown in FIG. 9, and determines whether or not the rhythm performance has been started.
If the performance is stopped, the determination result is "NO", and this routine is completed without performing any processing. However, if the rhythm performance is started, the determination result is "YES", and the process proceeds to the next step SF2. Advance. In step SF2, it is determined whether or not a unit time according to the reproduction tempo has elapsed. That is, the CPU 3 performs a timer interrupt process (not shown).
Thus, a tempo clock corresponding to the reproduction tempo is generated, and it is determined whether or not the time (unit time) for one cycle of the tempo clock has elapsed.

If the unit time has not elapsed,
The determination result is "NO" and the routine is completed once, but when the unit time has elapsed, the determination result is "YES".
And the process proceeds to the next step SF3, where
Decrement the contents of. It should be noted that when the start of the rhythm performance is instructed in the above-mentioned start / stop switch processing routine, this register T is stored in step SD6.
(See FIG. 8) to store the timing data.

Next, in step SF4, it is determined whether or not the decremented value of the register T is "0", that is, whether or not the tone generation timing has been reached. If it is not the sounding timing, the determination result is "NO" and the routine is completed once. However, if it is the sounding timing, the determination result is "YES" and the process proceeds to the next step SF5. In step SF5, the address pointer A is read to advance the reading of the pattern data.
D is incremented and stepped. Subsequently, after step SF6, the incremented address pointer AD
In accordance with the read pattern data.

That is, if the read pattern data is the timing data representing the tone generation timing, the process proceeds to step SF7, where the timing data is stored in the register T, and this routine is once completed. If the read pattern data is the event data representing sound generation / muting, the process proceeds to step SF8, and after transmitting the event data to the sound source 7, the process returns to step SF5 described above. The read pattern data indicates the end of the pattern E
If the data is ND data, the process proceeds to step SF9, where the start address of the normal A (n) is reset in the address pointer AD, and the process returns to step SF6 described above.

Next, specific operations realized by the above-described switch processing and performance processing will be described with reference to FIGS. As described above, when the rhythm switch 1a is turned on, the normal B is turned on as shown in FIG.
The pattern data of (n) is formed in the pattern storage area of the RAM 5, and the start / stop switch 1b
Is turned on, the pattern data of the normal A (n) is formed in the pattern storage area of the RAM 5 and the address pointer AD as shown in FIG.
Is set to the head address of the normal B (n), and the rhythm performance starts.

When the rhythm performance starts, first, normal B (n) is reproduced, and when reproduction is completed, normal A (n) is reproduced. When the end of the pattern of the normal A (n) is reached, the start address of the normal A (n) is set in the address pointer AD in the above-described step SF9 (see FIG. 9). As a result, FIG.
As shown in FIG. 2, normal A (n) is repeatedly reproduced. By the way, in the process of reproducing the normal A (n), the fill-in switch 1 is output at the first beat of the normal A (n).
When c is turned on, the reproduction of the normal A (n) is stopped, and the pattern data of the fill-in A (n) is formed in the pattern storage area of the RAM 5 as shown in FIG. Playback of this fill-in A (n) is started. When the reproduction of fill-in A (n) is completed, as shown in FIG.
(N) is repeatedly reproduced.

When the fill-in switch 1c is turned on at the second beat of the normal A (n) while the normal A (n) is being reproduced, as shown in FIG. While the reproduction of n) is stopped, the pattern data of fill-in B (n) is formed in the pattern storage area of the RAM, and reproduction of this fill-in B (n) is started. When the reproduction of the fill-in B (n) is completed,
The normal A (n) is reproduced again. Further, when the fill-in switch 1c is turned on at either the third beat or the fourth beat of the normal A (n), FIG.
As shown in (b), while the reproduction of the normal A (n) is stopped, the pattern data of the fill-in C (n) is
Formed in the pattern storage area of AM, this fill-in C
Start playing (n). When the reproduction of the fill-in C (n) is completed, the normal A (n) is reproduced again.

As described above, according to the present embodiment, when a rhythm pattern having a desired rhythm number is designated according to the operation of the rhythm change switch 1a, the block address corresponding to the designated rhythm pattern is referred to. Read the corresponding rhythm block from the rhythm block group RB,
By copying it to the pattern storage area of the RAM 5, the designated rhythm pattern is formed, so that pattern duplication can be avoided and memory use efficiency can be improved. In the present embodiment, the fill-in A is set according to the operation timing of the fill-in switch 1c.
When any one of the rhythm blocks (n) to C (n) is designated, the designated fill-in pattern is read out from the rhythm block group RB and copied to the pattern storage area of the RAM 5. Is formed and reproduced, it is possible to change the type of performance pattern to be reproduced according to the switch operation timing while improving the memory use efficiency.

In the above-described embodiment, the operation of changing the rhythm number during the progress of the rhythm performance is not described. For example, as shown in FIG. 13A, the normal A (n) is reproduced. Rhythm switch 1
When "a" is turned on to switch to rhythm number m, reproduction of normal A (n) is interrupted and pattern data of normal B (m) is stored in the pattern storage area of the RAM as shown in FIG. It is also possible to reproduce this normal B (m). And normal B (m)
When the reproduction of the normal B (m) is completed, the pattern data of the normal A (m) is formed in the pattern storage area of the RAM as shown in FIG. When the reproduction of m) is completed, FIG.
As shown in (b), it is also possible to adopt a mode in which normal A (m) is repeatedly reproduced again.

[0039]

According to the first and second aspects of the present invention, a predetermined rhythm pattern is selected from a plurality of types of rhythm patterns stored in the second storage means in accordance with the timing at which the reproduction is instructed. According to the block address of each rhythm block constituting the selected rhythm pattern, each corresponding rhythm block is designated from the first storage means,
Each designated rhythm block is copied and transferred to the third storage means to form pattern data corresponding to the selected rhythm pattern, and the pattern data is reproduced according to the reproduction instruction. As a result, it is possible to avoid pattern duplication, thereby avoiding pattern duplication, thereby improving memory use efficiency, and changing the type of performance pattern to be reproduced according to the timing of a reproduction instruction (switch operation). Can be.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment according to the present invention.

FIG. 2 is a memory map for explaining a data form of a performance pattern stored in a ROM 4;

FIG. 3 is a memory map for explaining a data form of a performance pattern stored in a ROM 4;

FIG. 4 is a flowchart showing an operation of a main routine.

FIG. 5 is a flowchart showing an operation of a switch processing routine.

FIG. 6 is a flowchart showing the operation of a rhythm switch processing routine;

FIG. 7 is a flowchart showing an operation of a start / stop switch processing routine.

FIG. 8 is a flowchart showing an operation of a fill-in switch processing routine.

FIG. 9 is a flowchart showing the operation of a performance processing routine.

FIG. 10 is a time-series map showing pattern data formed in a pattern storage area of a RAM 5, and is a diagram for explaining a specific operation of the embodiment.

FIG. 11 is a time-series map showing pattern data formed in a pattern storage area of a RAM 5, and is a diagram for explaining a specific operation of the embodiment.

FIG. 12 is a time-series map showing pattern data formed in a pattern storage area of a RAM 5, and is a diagram for explaining a specific operation of the embodiment.

FIG. 13 is a time-series map illustrating pattern data formed in a pattern storage area of a RAM 5, and is a diagram for explaining an operation of a modified example.

FIG. 14 is a time-series map showing pattern data formed in a pattern storage area of a RAM 5, and is a diagram for explaining an operation of a modified example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Panel switch 2 Display part 3 CPU 4 ROM 5 RAM 6 Sound source 7 Sound system

Claims (2)

[Claims] 1. A first storage means for storing a plurality of types of rhythm blocks comprising pattern data representing at least a pitch and a sounding timing of each sound forming a tune, and a rhythm block stored in the first storage means A second storage means for storing a plurality of types of rhythm patterns formed from block addresses each representing a storage position of a plurality of rhythm blocks specified by a plurality of block addresses; A pattern selecting means for selecting a predetermined rhythm pattern from a plurality of rhythm patterns stored in the second storage means; and a block address of each rhythm block constituting the rhythm pattern selected by the pattern selecting means. Each corresponding rhythm block is designated from the first storage means, and each designated rhythm block is designated. Pattern forming means for copying and transferring the rhythm block to a third storage means to form pattern data corresponding to the selected rhythm pattern; and storing the rhythm block in the third storage means in response to the reproduction instruction. A rhythm playing device, comprising: reproducing means for reproducing pattern data. 2. A plurality of rhythm blocks each comprising pattern data representing at least a pitch and a sounding timing of each sound forming a music are stored in the first storage means, while a plurality of rhythm blocks are stored in the first storage means. A storage process of storing a plurality of types of rhythm patterns in the second storage means, which are formed from block addresses indicating storage positions of rhythm blocks to be stored, and composed of rhythm blocks specified by a plurality of block addresses; A pattern selection step of selecting a predetermined rhythm pattern from a plurality of types of rhythm patterns stored in the second storage means in accordance with the timing at which the rhythm pattern is selected. According to the block address of each rhythm block
Each corresponding rhythm block is designated from the first storage means, and each designated rhythm block is copied and transferred to the third storage means to form pattern data corresponding to the selected rhythm pattern. A rhythm playing method, comprising: a pattern forming step; and a reproduction step of reproducing pattern data stored in the third storage means in response to the reproduction instruction.