JP2002153055A - Switching power device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem of audible sounds which are generated now and then from a transformer so far, if frequency becomes low in a variable frequency type switching power source. SOLUTION: A switch 3 is connected in series to the primary winding of a transformer 2 to form a variable frequency type switching power device. A rectifying smoothing circuit 4 is connected to the secondary winding N2 of the transformer 2. A comparator 24 for deciding whether or not its switching frequency is an audible frequency, is provided. The on-time breadth of the switch 3 is narrowed, when the switching frequency is an audible frequency.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switching power supply device such as a variable frequency type DC-DC converter, an inverter, etc., whose switching frequency falls within or may fall within an audible frequency range.

[0002]

2. Description of the Related Art A typical DC-DC converter, which is one type of switching power supply, includes a series circuit of a DC power supply, a primary winding of a transformer connected between one end and the other end, and a switch. A rectifying / smoothing circuit connected to a secondary winding of a transformer, an output voltage detection circuit, a switch current detection circuit, and on / off control of a switch based on outputs of the output voltage detection circuit and the current detection circuit. Control circuit. The control circuit has a comparator, and the comparator compares the output of the current detection circuit with the reference voltage corrected by the output of the voltage detection circuit to determine the end point of the switch.

[0003]

By the way, when the load changes from the rated load or the normal load to the light load state, the output voltage rises. On the contrary, the reference voltage decreases, and the triangular current obtained from the current detecting circuit is reduced. The peak level of the wavy detection signal decreases, and the peak level of the current detection value falls below the lower limit of the dynamic range of the input of the comparator or does not reach the reference voltage irregularly. When the switch is turned on and off irregularly in this manner, the switching frequency, that is, the on / off repetition frequency of the switch is lowered, the number of times of switching per unit time is reduced, and the efficiency of the switching power supply device is improved. However, when the switching frequency becomes irregular and switching is performed in the audio frequency range, an audible sound is generated from the transformer, which gives the user discomfort. The same problem as described above also occurs when the switch is turned on and off intermittently in order to improve efficiency at light load.

Accordingly, a first object of the present invention is to provide a switching power supply capable of suppressing or suppressing audible sound. A second object of the present invention is to provide a switching power supply device capable of preventing or suppressing audible sound and greatly reducing loss under light load.

[0005]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems and to achieve the first object, the present invention intermittently interrupts a DC voltage supplied from a DC power supply to a transformer and a winding of the transformer. A switching power supply device having one or a plurality of switches for switching the switching frequency of the switch, and an output circuit connected to the transformer. Determining means for determining whether or not is an audible frequency; and when an output indicating the audible frequency is generated from the determining means, the amount of energy supplied to the transformer by one switching operation of the switch is set to a predetermined value. The present invention relates to a switching power supply having the following means.

It is possible to provide a means for controlling the product V1 Ton of the voltage V1 applied to the winding and the time width Ton to a predetermined value or less. V1 Ton above
Is desirably a value satisfying V1 Ton ≦ Ｖ (2EL). Here, E is the amount of energy supplied to the transformer by one turn of the switch, and is preferably 70 μJ (microjoule);
L is the inductance of the transformer winding. Further, a means for limiting the ON time width of the switch to a predetermined value or less can be provided. A preferred value of the predetermined value of the ON time width of this switch is 2 μs. Further, a means for limiting the peak value of the switch current to a predetermined value or less can be provided. It is desirable that the predetermined value of the peak value is √ (2E / L). In order to achieve the second object, the switching frequency may be higher than the audible frequency at the rated load, and the switching at the audible frequency may be performed only at a light load. Claim 6
As shown in (1), it can be configured such that intermittent oscillation occurs when the load is light.

[0007]

According to the present invention, when the switching frequency falls within the range of the audible frequency, the amount of energy supplied to the transformer is limited, so that the generation of the audible sound is prevented or suppressed. No more discomfort. According to the fifth and sixth aspects of the present invention, the switching frequency is reduced to the audible frequency range when the load is light, so that the switching frequency per unit time can be significantly reduced, and the efficiency can be improved. Generation of audible sound can be prevented or suppressed.

[0008]

Next, a variable frequency switching power supply according to an embodiment of the present invention will be described with reference to FIGS.

This switching power supply is a flyback type DC-DC converter, and is roughly divided into a DC power supply 1, a transformer 2, and a field effect transistor (FET).
, A rectifying / smoothing circuit 4, an output voltage detecting circuit 5, a current detecting resistor 6 as a current detector, and a switch control signal forming circuit 7.

To form a flyback type DC-DC converter circuit, a transformer 2 includes a primary winding N1 having a leakage inductance and a secondary winding N electromagnetically coupled to the primary winding N1.
And 2. A series circuit of the primary winding N1, the switch 3, and the current detecting resistor 6 is connected between one terminal 1a of the power supply 1 and the other terminal 1b.

The rectifying / smoothing circuit 4 comprises a rectifying diode D1 and a smoothing capacitor C1.
Are connected in parallel to a secondary winding N2 via a rectifier diode D1. A pair of output terminals 8a and 8b connected to the smoothing capacitor C1 are for connecting a load 9.

The output voltage detection circuit 5 includes a voltage detection resistor 1
0, 11, an error amplifier 12, a reference voltage source 13, and a light emitting diode 14. The resistors 10 and 11 detect the voltage between the output terminals 8 a and 8 b and send the detected voltage to one input terminal of the error amplifier 12. The error amplifier 12 outputs a difference value between the detection voltage and the reference voltage of the reference voltage source 13. The light emitting diode 14 is connected to the output terminal 8 a and the error amplifier 1.
2 to generate an optical output that varies in proportion to the output voltage.

The control signal forming circuit 7 includes a first comparator 15 and a reference voltage source 1 for generating a first reference voltage Es1.
6, a voltage dividing resistor 17, a phototransistor 18, a pulse generating circuit 19, an RS flip-flop 20,
It comprises an R gate 21, a drive circuit 22, an amplifier circuit 23, a second comparator 24, and a second reference voltage source 25 for generating a second reference voltage Es2.

One input terminal of the first comparator 15 is connected to a connection point between the current detecting resistor 6 and the switch 3. Therefore, a voltage value V proportional to the current Ia flowing through the current detection resistor 6 is applied to one input terminal of the comparator 15.
A current detection signal having a is provided. One end of the first reference voltage source 16 is connected to the ground terminal 1 b of the power supply 1, and the other terminal of the first reference voltage source 16 is connected to the resistor 17. The phototransistor 18 optically coupled to the light emitting diode 14 is connected between the resistor 17 and the ground terminal 1b. Accordingly, a voltage feedback control signal having a voltage value Vb corresponding to a voltage obtained by dividing the first reference voltage Es1 by the resistor 17 and the resistance of the phototransistor 18 is provided at a connection point 26 between the resistor 17 and the phototransistor 18. can get. The connection point 26 is connected to the other input terminal of the first comparator 15 and to one input terminal of the amplifier circuit 23 and one input terminal of the second comparator 24. The first comparator 15 compares the voltage value Va of the current detection signal with the voltage value Vb of the voltage feedback control signal as shown in FIG. 3B to generate an output shown in FIG.

The pulse generating circuit (OSC) 19 has first and second input terminals 19a and 19b and an output terminal 19c, and receives a rated load or a heavy load from the output terminal 19c as shown in FIG. And at the first light load, a narrow pulse is generated in the first period T1, and at the second light load, which is lighter than the first light load, a square wave whose high level period is longer than the low level period is generated. Occurs in a second period T2 longer than the first period T1. Details of the pulse generation circuit 19 will be described later.

The set terminal S of the RS flip-flop 20
Is connected to the output terminal 19c of the pulse generation circuit 19 via the NOT circuit 26, and the reset terminal R is connected to the first comparator 15. One input terminal of the NOR gate 21 is connected to the output terminal 19c of the pulse generating circuit 19, the other input terminal the inverted output terminal Q of the flip-flop 20 ^- is connected to the switch 3 and an output terminal through a driving circuit 22 Is connected to the control terminal, that is, the gate. The flip-flop 20 generates the signal shown in FIG. 3D, and the NOR gate 21 outputs the switch control signal shown in FIG.

The amplifier circuit 23 amplifies the voltage value Vb indicating the voltage feedback signal obtained at the connection point 26, and
f is generated and sent to the first input terminal 19a of the pulse generation circuit 19. The output frequency of the pulse generation circuit 19 changes in proportion to the frequency control signal Vf.

The second comparator 24 constitutes an audio frequency detecting means, that is, a judging means, together with a second reference voltage source 25. One input terminal of the second comparator 24 is a connection point 26.
The other input terminal is connected to the second reference voltage source 25, and the output terminal is connected to the second input terminal 19b of the pulse generation circuit 19. Second reference voltage source 25
Supplies the second reference voltage Es2 shown in FIG. The second reference voltage Es2 is the voltage value Vb of the voltage feedback control signal at the time of heavy load and the first light load.
And is set to be higher than the voltage value Vb of the voltage feedback control signal at the time of the second light load. Therefore,
The output voltage Vk of the second comparator 24 changes as shown in FIG. 3G, and outputs a low-level signal indicating an audio frequency when the condition of Vb <Es2 is satisfied. That is, when the load 9 enters the second light load state where the load 9 is extremely small, the output voltage increases, conversely, the voltage value Vb of the voltage feedback control signal decreases, and the output frequency of the pulse generation circuit 19 and the switching frequency of the switch 3 decrease. It falls to a value within the audible frequency range. The second comparator 24 compares the voltage value Vb of the voltage feedback control signal, which is proportional to the switching frequency, with the second reference voltage Es2, so that it is possible to determine whether the frequency is an audio frequency. Although it is possible to detect the audio frequency by directly detecting the output frequency of the pulse generation circuit 19 or the switching frequency of the switch 3, the audio frequency detection by the second comparator 24 in FIG. It has the feature that the configuration is simplified.

The pulse generating circuit 19 includes a voltage controlled oscillator (VCO) 31 and a sawtooth wave generating circuit 32 as shown in FIG.
And first and second pulse forming comparators 33, 3
4 and first and second pulse forming reference voltage sources 35, 3
6 and a selection circuit 37. First input terminal 19a
4 generates a clock pulse having an output frequency proportional to the voltage control signal supplied from the amplifier circuit 23 as shown in FIG. Trigger circuit 32. Sawtooth generating circuit 32
4A in response to the output pulse of the voltage controlled oscillator 31 generated at t1, t3, t5, t6, t8, etc. in FIG.
A triangular wave, that is, a sawtooth wave shown in FIG. The positive input terminal of the first pulse forming comparator 33 is a sawtooth wave generating circuit 3
2 and the negative input terminal is connected to the first pulse forming reference voltage source 35. Since the reference voltage Vr1 of the first pulse forming reference voltage source 35 is set at a level slightly lower than the peak value of the sawtooth voltage Vt as shown in FIG. A high-level pulse having a relatively narrow first pulse width W1 is generated as shown in a section between t2 and t3 and a section between t4 and t5. The positive input terminal of the second pulse forming comparator 34 is connected to the sawtooth wave generating circuit 32, and the negative input terminal is connected to the second pulse forming reference voltage source 36. As shown in FIG. 4B, the second pulse forming reference voltage source 36 supplies the first pulse forming reference voltage V.
A second pulse forming reference voltage Vr2 lower than r1 is generated. Since the reference voltage Vr2 is a level slightly higher than the lowest level of the sawtooth voltage Vt, the second pulse forming comparator 34 operates in the period from t7 to t8, the period from t9 to t10 as shown in FIG. Higher level relatively wide second
A pulse having a pulse width W2 is generated. Selection circuit 3
7 is the first and second selection switches 37a and 37b and NO
And a T circuit 37c. The first selection switch 37a is connected to the first pulse forming comparator 33 and the output terminal 19c.
And its control terminal is connected to a second input terminal 19.
b. The second selection switch 37b is
Is connected between the pulse forming comparator 34 and the output terminal 19c, and its control terminal is connected to the second input terminal 19b via the NOT circuit 37c. The second input terminal 19b has a comparator 2 shown in FIG.
4 is input. Therefore, when Vk is at a high level due to a heavy load or a first light load state as shown in FIG. 3 (G), the first selection switch 37a of FIG. 2 is turned on, and FIG. A pulse before time t5 is sent from the output terminal 19c, and when Vk goes low due to the second light load condition, the second selection switch 37b is turned on, and t6 in FIG. A pulse shown after the time point is transmitted from the output terminal 19c. As a result, a pulse that changes according to the change in load is generated from the output terminal 19c as shown in FIG.

[0020]

[Normal Mode Operation] In the normal mode shown before time t6 in FIG. 3, Vk in FIG. 3G is at a high level.
The first selection switch 37a in FIG. 2 is turned on. FIG.
A narrow pulse is generated from the pulse generation circuit 19 as shown in FIG. Set input terminal S of flip-flop 20
Is connected to the pulse generating circuit 19 via the NOT circuit 26, and is triggered in synchronization with the transition of the pulse from the high level to the low level in FIG. 3A, and t1 and t3 in FIG.
, T4, the flip-flop 20 at t6, etc. becomes a set state, the phase-inverting output terminal Q ^- is converted to a low level as shown in Figure 3 (D). The interval between t1 and t2 in FIG.
In the period from t4 to t5, both inputs of the NOR gate 21 become low level, so that the output of the NOR gate 21 is shown in FIG.
It goes to a high level as shown. The high level output of the NOR gate 21 becomes an ON control pulse of the switch 3. In the normal mode before t6 in FIG. 3, the pulse generation circuit 19 does not limit the ON time width of the switch 3. Therefore, the switch 3 continues to be turned on until the flip-flop 20 is reset. During the ON period of the switch 3, the current flowing through the primary winding N1, the switch 3, and the current detection resistor 6 increases in a triangular waveform due to the inductance of the primary winding N1, and is shown in FIG. The current detection signal Va is obtained. When the current detection signal Va reaches the voltage feedback control signal Vb at t2, t5, etc., the first
The pulse shown in FIG. 3 (C) is generated from the comparator 15 of FIG.
The outputs of the flip-flop 20 and the NOR gate 21 are inverted, and the ON period of the switch 3 ends. Since the level of the voltage feedback control signal Vb changes in proportion to the size of the load 9, the set time of the flip-flop 20 and the width of the output pulse of the NOR gate 21 change in proportion to the size of the load 9, and The ON / OFF repetition frequency of the switch 3 changes in inverse proportion to the size of the load 9.

[0021]

[Intermittent mode operation] In the second light load state shown after t7 in FIG. 3, the load 9 is sufficiently smaller than the heavy load and the first light load shown in t1 to t6. As shown, a section where the voltage feedback control signal Vb is lower than the second reference voltage Es2 occurs intermittently. In such a state, the output Vk of the second comparator 24 becomes low as shown at t7 to t11 in FIG. 3 (G), and the width of the high level pulse of the output Vosc of the pulse generation circuit 19 becomes as shown in FIG. As shown in FIG. 7A, the output Vosc is greatly widened, and the low-level sections t7 to t8 and t9 to t10 of the output Vosc are greatly narrowed. Since the switch 3 can be turned on only in the low-level section of Vosc in FIG.
The process ends before the current detection signal Va of (B) reaches the voltage feedback control signal Vb. As a result, the amount of energy supplied to the transformer 2 by one turn-on of the switch 3 is limited, and generation of an audible sound from the transformer 2 can be prevented or suppressed. That is, at the time of the second light load, the voltage feedback control signal Vb becomes significantly lower, so that the on / off period T2 of the switch 3 becomes significantly longer, and the switching frequency falls within the range of audible frequencies such as 20 kHz or less. However, since the energy supplied to the transformer 2 is reduced, the generation of an audible sound based on the vibration of the transformer 2 is prevented or suppressed. When the on-time Ton of the switch 3 is forcibly reduced as shown in a section between t7 and t11 in FIG. 3, the output voltage V0 between the output terminals 8a and 8b decreases. The decrease in the output voltage V0 is apparently an increase in the load, and the voltage feedback control signal Vb becomes higher than the second reference voltage Es2 as shown after t11 in FIG. As a result, after t11, FIG.
The same operation as before t6 occurs. However, if the size of the load 9 is the same as the section between t1 and t11, the load 9 is again set between t7 and t11
The same operation as in the section occurs. This voltage feedback control signal Vb
ON / OFF operation of the switch 3 depending on the intermittently occurs. Since the operation based on the voltage feedback control signal Vb intervenes during the operation in which the ON width is limited to prevent audible sound, the output voltage V0 can be kept almost at the target value.

The transformer 2 is turned on during one on-time Ton of the switch 3 during the second mode period from t7 to t11 in FIG.
It was experimentally confirmed that when the amount of energy E supplied to the device was set to 70 μJ (microjoule) or less, generation of audible sound could be effectively suppressed. The energy E supplied to the transformer 2 during the ON period of each switch 3
And the voltage V1 of the DC power supply 1 and the ON time width Ton of the switch 3
The following relational expression is established between the product and the product V1 Ton. E = (V1 Ton) ² / (2L) (1) where L is the inductance of the primary winding N1. The following equation is established based on the above equation (1). V1 Ton = {(2EL) (2) If E in equation (2) is set to 70 μJ or less, the audible sound of the transformer 2 can be suppressed, so the value of V1 Ton is set to {2 (70 μJ) L} or less. Then, audible noise prevention is achieved. Generally, since the power supply voltage V1 does not change much, it is desirable to change the on-time Ton. The following equation is established between Ton and E. Ton = {(2EL} / V1 (3) The width of the on-time Ton is desirably 2 μs or less in consideration of the switching frequency and the intermittent oscillation.

When the power supply voltage V1 is constant and the inductance L of the primary winding N1 is constant, the gradient of the current Ia is constant. Assuming that the peak value of the current Ia is Ip, the energy that can be supplied to the transformer 2 by turning on the switch 3 once can be expressed by the following equation. E = (1/2) LIp ² (4) From this equation (4), Ip can be expressed by the following equation. Ip = {(2E / L) (5) In order to suppress audible sound, it is desirable that E be 70 μJ or less. Therefore, the peak value Ip of the current Ia is set to a value of {2 (70 μJ) / L} or less. If it is limited, the audible sound of the transformer 2 can be suppressed.

According to this embodiment, the switching frequency can be lowered to the audible sound range at light load,
The number of times of switching of the switch 3 per unit time can be greatly reduced and efficiency can be improved. Further, even if the switching frequency is lowered to the audible sound range, the switch 3
Since the energy supplied to the transformer 2 is limited by one turn on, the generation of an audible sound due to the vibration of the transformer 2 can be suppressed, and the noise can be reduced. After the audible frequency range is detected and the on-time Ton of the switch 3 is limited, the control of the on-time Ton by the voltage feedback control signal Vb is resumed, and the output voltage Von
0 is controlled to a constant value. As a result, a stable voltage can be supplied to the load 9 despite the provision of a period for forcibly shortening the on-time Ton of the switch 3 in order to suppress the audible sound. In addition, since the switching frequency is increased to the audible frequency, the variable range of the load 9 can be greatly increased.

[0025]

Second Embodiment Next, a switching power supply according to a second embodiment will be described with reference to FIGS. However, in FIG. 5, substantially the same parts as those in FIG. 1 are denoted by the same reference numerals, and the description thereof will be omitted.

The switching power supply shown in FIG. 5 does not include the current detection resistor 6 and the first comparator 15 in the circuit shown in FIG. 1, and is provided with an ON width control circuit 40 instead. It was done. The output line 40a of the ON width control circuit 40 in the modified control signal forming circuit 7a of FIG. 5 is connected to the reset terminal of the flip-flop 20 similarly to the first comparator 15 of FIG. To determine the start time of turning on the switch 3, NOR
The output line 21 a of the gate 21 is connected to the ON width control circuit 40. This ON width control circuit 40 is connected to the switch 3
A signal indicating the end point of the ON period of FIG.
Of the flip-flop 2 in the same manner as the output of the comparator 15 of FIG.
Reset 0.

The ON width control circuit 40 has a series circuit of a phototransistor 42 and a capacitor 43 connected between a power supply terminal 41 and the ground, as shown in FIG. The phototransistor 42 is optically coupled to the light emitting diode 14 similarly to the phototransistor 18 of FIG. Therefore,
The capacitor 43 is charged at a rate proportional to the output voltage V0. A discharge switch 44 composed of a transistor is connected in parallel with the capacitor 43 to discharge the capacitor 43. The control terminal of the discharge switch 44 is NOT
Output line 21a of NOR gate 21 via circuit 45
, Is turned on during the off period of the main switch 3 to prohibit charging of the capacitor 43. The positive input terminal of the comparator 46 is connected to the capacitor 43, and the negative input terminal is connected to the reference voltage source 47. Accordingly, when the sawtooth voltage V43 of the capacitor 43 reaches the voltage Vr1 of the reference voltage source 47 as shown in FIG.
6 generates a pulse shown in FIG. 7B, the flip-flop 20 in FIG. 5 is reset, and the ON period of the switch 3 ends. The charging speed of the capacitor 43 is the output voltage V0
Therefore, the length of time to reach the reference voltage Vr1 changes as shown by the broken line in FIG. 7 due to the change in the output voltage V0, and the ON time width of the switch 3 in FIG. 5 changes.

The second embodiment is different from the first embodiment in the method of determining the switch-on end time of the switch 3, and is otherwise the same as the first embodiment. The same effect can be obtained.

[0029]

[Modifications] The present invention is not limited to the above-described embodiment, and for example, the following modifications are possible. (1) A well-known half-bridge type DC-DC converter or inverter that alternately supplies power to a transformer by two switches, or a bridge-type DC-DC converter or inverter that alternately supplies power to a transformer by four switches. The present invention can also be applied to the present invention. In short, the present invention can be applied to any variable frequency switching power supply having at least one switch and a transformer. (2) The control circuit for controlling the ON time width of the switch 3 and the control circuit for starting the ON of the switch 3 can be variously modified. (3) The switch 3 can be a semiconductor switch such as a bipolar transistor. (4) light emitting diode 14 and phototransistor 18,
The part of the optical coupling with 42 can be an electrical coupling circuit. (5) Whether the frequency is an audible frequency can be determined by counting the ON / OFF control pulse of the switch 3 or the frequency detection circuit. For example, the control pulse of the switch 3 is measured by a counter, and when the number of pulses per predetermined time becomes equal to or less than a predetermined value, it can be determined that the frequency is in the audible frequency range. (6) The switching frequency can be changed stepwise by changing the size of the load 9. (7) In the switching power supply of the embodiment, the switching frequency is changed by judging the size of the load based on the detection of the output voltage V0. However, the switching frequency is changed in conjunction with the size of the load 9. be able to. (8) A well-known resonance circuit for reducing switching loss when the switch 3 is turned on and off can be added. (9) The NOT circuit 26 can be omitted.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a switching power supply according to a first embodiment of the present invention.

FIG. 2 is a block diagram illustrating a pulse generation circuit of FIG. 1 in detail;

FIG. 3 is a waveform chart showing a state of each unit in FIG. 1;

FIG. 4 is a waveform chart showing states of respective parts of the pulse generation circuit of FIG. 2;

FIG. 5 is a circuit diagram illustrating a switching power supply device according to a second embodiment.

FIG. 6 is a circuit diagram showing an ON width control circuit of FIG. 5;

FIG. 7 is a waveform diagram showing a state of each unit in FIG. 6;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 DC power supply 2 Transformer 3 Switch 4 Rectifier smoothing circuit 5 Output voltage detection circuit 6 Current detection resistor 7 Switch control signal formation circuit 15 First comparator 19 Pulse generation circuit 20 Flip-flop 24 Second comparator

Claims (6)

[Claims] An output circuit connected to the transformer, wherein the transformer has one or more switches for interrupting a DC voltage supplied from a DC power supply to a winding of the transformer, and an output circuit connected to the transformer. A switching power supply device formed so as to be capable of changing a switching frequency of a switch, wherein a determining unit that determines whether a switching frequency of the switch is an audible frequency, and an audible frequency from the determining unit. Means for limiting the amount of energy supplied to the transformer to a predetermined value or less by one switching operation of the switch when an output indicating the following is generated. 2. The apparatus according to claim 1, further comprising: a transformer, one or more switches for interrupting a DC voltage supplied from a DC power supply to a winding of the transformer, and an output circuit connected to the transformer. A switching power supply device formed so as to be capable of changing a switching frequency of a switch, wherein a determining unit that determines whether a switching frequency of the switch is an audible frequency, and an audible frequency from the determining unit. Means for limiting the value of the product of the voltage applied to the winding of the transformer and the time width by the switching operation of the switch when an output indicating the value is generated to a predetermined value or less. Switching power supply. 3. A power supply, comprising: a transformer; one or more switches for interrupting a DC voltage supplied from a DC power supply to a winding of the transformer; and an output circuit connected to the transformer. A switching power supply device formed so as to be capable of changing a switching frequency of a switch, wherein a determining unit that determines whether a switching frequency of the switch is an audible frequency, and an audible frequency from the determining unit. Means for limiting the on-time width of the switch to a predetermined value or less when an output is generated. 4. A power supply system comprising: a transformer; one or more switches for intermitting a DC voltage supplied from a DC power supply to a winding of the transformer; and an output circuit connected to the transformer. A switching power supply device formed so as to be capable of changing a switching frequency of a switch, wherein a determining unit that determines whether a switching frequency of the switch is an audible frequency, and an audible frequency from the determining unit. Means for limiting a peak value of the current of the switch to a predetermined value or less when an output indicating the following is generated. 5. The switch is turned on and off at a switching frequency higher than an audio frequency at a rated load, and is turned on and off at a switching frequency corresponding to an audio frequency at a load lighter than the rated load. The switching power supply device according to any one of claims 1 to 4, wherein 6. The switching power supply according to claim 5, wherein the switching power supply oscillates intermittently under the light load.