JP2002151639A5 - - Google Patents

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JP2002151639A5
JP2002151639A5 JP2001252275A JP2001252275A JP2002151639A5 JP 2002151639 A5 JP2002151639 A5 JP 2002151639A5 JP 2001252275 A JP2001252275 A JP 2001252275A JP 2001252275 A JP2001252275 A JP 2001252275A JP 2002151639 A5 JP2002151639 A5 JP 2002151639A5
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【発明の名称】電子機器およびその製造方法 INDUSTRIAL APPLICABILITY The title of the invention: an electronic device and a method for manufacturing the same .

【0004】
本発明の目的は、Pbフリーはんだ、例えばSn−Ag−Bi系のPbフリーはんだによって、半導体装置と実装基板が高信頼性を有して接続された電子機器を提供することである。
0004
An object of the present invention is to provide an electronic device in which a semiconductor device and a mounting substrate are connected with high reliability by Pb-free solder, for example, Sn-Ag-Bi-based Pb-free solder.

【0005】
【課題を解決するための手段】
上記目的を達成するために、本願で開示される発明の一例は次の通りである。
基板と、Cu系リードを有し、前記Cu系リード上に表面層としてSn―Bi系層が直接形成され、前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である半導体装置と、前記基板と前記半導体装置を接続する鉛フリーはんだにより形成された半田接続部と、を有することを特徴とする電子機器である。
また、基板と、Fe―Ni系合金リードを有し、前記Fe―Ni系合金リード上にSnにBiを1重量%以上4重量%未満含有させたSn―Bi系層が形成され、前記Fe―Ni系合金リードと前記Sn―Bi系層の間には他の金属層が形成されていない半導体装置と、前記基板と前記半導体装置を接続する鉛フリーはんだにより形成された半田接続部と、を有することを特徴とする電子機器である。また、基板と、Fe―Ni系合金リードを有し、前記Fe―Ni系合金リード上にCu層が形成され、前記Cu層上に表面層としてSn―Bi系層が形成され、さらに前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である半導体装置と、前記基板と前記半導体装置を接続する鉛フリーはんだにより形成された半田接続部と、を有することを特徴とする電子機器である。
0005
[Means for solving problems]
An example of the invention disclosed in the present application in order to achieve the above object is as follows.
It has a substrate and a Cu-based lead, and a Sn—Bi-based layer is directly formed as a surface layer on the Cu-based lead, and the Bi content in the Sn—Bi-based layer is 1% by weight or more and less than 4% by weight. It is an electronic device characterized by having a semiconductor device and a solder connecting portion formed of lead-free solder connecting the substrate and the semiconductor device.
Further, a Sn—Bi-based layer having a substrate and a Fe—Ni-based alloy lead and containing 1% by weight or more and less than 4% by weight of Bi in Sn is formed on the Fe—Ni-based alloy lead, and the Fe is formed. -A semiconductor device in which no other metal layer is formed between the Ni-based alloy lead and the Sn-Bi-based layer, and a solder connection portion formed of lead-free solder connecting the substrate and the semiconductor device. It is an electronic device characterized by having. Further, it has a substrate and a Fe—Ni alloy lead, a Cu layer is formed on the Fe—Ni alloy lead, a Sn—Bi layer is formed as a surface layer on the Cu layer, and the Sn—Bi layer is further formed. -It is characterized by having a semiconductor device having a Bi content of 1% by weight or more and less than 4% by weight in the Bi-based layer, and a solder connecting portion formed of lead-free solder connecting the substrate and the semiconductor device. It is an electronic device to be used.

【0024】
【実施例3】
本発明の電極構成は基板上の電極にも適用することができる。例えば、基板のはんだ付け性を向上させるためにはんだコートが効果的であるが、従来はSn−Pbはんだ、特にSn−Pb共晶はんだ等のPbを含んだはんだを使用している。このため、コート用はんだのPbフリー化として、本発明のSn−Bi層を用いることができる。また、通常、基板の電極はCuで形成されているため、Sn−Ag−Bi系はんだを使用した場合に十分な接続強度を得ることができる。この構成を適用した例を示すが、回路基板であるガラスエポキシ基板上のCuパッド(Cu電極)に約5μm程度のSn−8Bi層をローラーコートで作成した。このはんだ層を形成したために基板に対するぬれ性が向上し、且つ、接続強度も向上させることができた。
上記で説明した本発明にかかる実施例によれば、Pbフリー材料として優れるSn−Ag−Bi系はんだに適する電極構造を実現することができる効果を奏する。また、本発明にかかる実施例によれば、リードフレーム等の電極に対して毒性の少ないSn−Ag−Bi系のPbフリーはんだ合金を用いて十分な接続強度を有し、且つ安定な接続界面を得ることができるPbフリーはんだ接続構造体を実現することができる効果を奏する。また、本発明にかかる実施例によれば、毒性の少ないSn−Ag−Bi系のPbフリーはんだ合金を用いて、電子部品、基板間の熱膨張係数の差、はんだ付け後の割基板作業、或いはプロービングテスト時の基板の反り、ハンドリング等によってはんだ接続部に発生する応力に耐え得る十分な接続強度を有し、且つ経時的にも安定な界面を得ることができるPbフリーはんだ接続構造体を備えた電子機器を実現することができる効果を奏する。
また、本発明にかかる実施例によれば、毒性の少ないSn−Ag−Bi系のPbフリーはんだ合金を用いて、例えば220〜240℃での十分なぬれ性を確保して十分なフィレットを形成して十分な接続強度を有し、また耐ウィスカー性等も確保することができる。また、本発明にかかる実施例によれば、電子部品をSn−Ag−Bi系はんだではんだ付けすることにより、十分な接続強度を有する界面が得られ、且つ、実用上十分なぬれ性も確保することができる。またウィスカー性についても問題無い。従って、環境にやさしいPbフリーの電気製品を従来 と同じ設備、プロセスを使用して実現することができる効果を奏する。
0024
[Example 3]
The electrode configuration of the present invention can also be applied to electrodes on a substrate. For example, solder coating is effective for improving the solderability of the substrate, but conventionally, Sn-Pb solder, particularly solder containing Pb such as Sn-Pb eutectic solder is used. Therefore, the Sn-Bi layer of the present invention can be used as the Pb-free coating solder. Further, since the electrodes of the substrate are usually formed of Cu, sufficient connection strength can be obtained when Sn-Ag-Bi-based solder is used. An example in which this configuration is applied is shown. A Sn-8Bi layer having a size of about 5 μm was formed by roller coating on a Cu pad (Cu electrode) on a glass epoxy board which is a circuit board. Since this solder layer was formed, the wettability with respect to the substrate was improved, and the connection strength could also be improved.
According to the embodiment of the present invention described above, it is possible to realize an electrode structure suitable for Sn-Ag-Bi-based solder, which is excellent as a Pb-free material. Further, according to the embodiment of the present invention, a Sn-Ag-Bi-based Pb-free solder alloy having low toxicity to electrodes such as a lead frame is used to have sufficient connection strength and a stable connection interface. It is possible to realize a Pb-free solder connection structure capable of obtaining a Pb-free solder connection structure. Further, according to the embodiment of the present invention, using a Sn-Ag-Bi-based Pb-free solder alloy having less toxicity, the difference in thermal expansion coefficient between electronic parts and substrates, the split substrate work after soldering, Alternatively, a Pb-free solder connection structure having sufficient connection strength to withstand the stress generated in the solder connection portion due to warpage of the substrate during the probing test, handling, etc., and capable of obtaining a stable interface over time. It has the effect of realizing an electronic device equipped with it.
Further, according to the embodiment of the present invention, a Sn-Ag-Bi-based Pb-free solder alloy having low toxicity is used to secure sufficient wettability at, for example, 220 to 240 ° C. to form a sufficient fillet. Therefore, it has sufficient connection strength and can secure whisker resistance and the like. Further, according to the embodiment of the present invention, by soldering the electronic component with Sn-Ag-Bi-based solder, an interface having sufficient connection strength can be obtained, and sufficient wettability for practical use can be ensured. can do. There is also no problem with whiskers. Therefore, it is possible to realize an environment-friendly Pb-free electric product by using the same equipment and process as before.

【0025】
本発明によれば、Pbフリーはんだ、例えばSn−Ag−Bi系のPbフリーはんだと高信頼性を有する接続が得られる半導体装置を提供することができる。
本発明によれば、Pbフリーはんだ、例えばSn−Ag−Bi系のPbフリーはんだによって、半導体装置と実装基板が高信頼性を有して接続された電子機器を提供することができる。
0025.
According to the present invention, it is possible to provide a semiconductor device capable of obtaining a highly reliable connection with Pb-free solder, for example, Sn-Ag-Bi-based Pb-free solder.
According to the present invention, it is possible to provide an electronic device in which a semiconductor device and a mounting substrate are connected with high reliability by using Pb-free solder, for example, Sn-Ag-Bi-based Pb-free solder.

Claims (41)

基板と、A substrate,
Cu系リードを有し、前記Cu系リード上に表面層としてSn―Bi系層が直接形成され、前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である半導体装置とが、前記Sn―Bi系層と異なる部材である鉛フリーはんだを用いて接続されたことを特徴とする電子機器。A semiconductor device having a Cu-based lead, wherein a Sn-Bi-based layer is directly formed as a surface layer on the Cu-based lead, and a Bi content in the Sn-Bi-based layer is 1% by weight or more and less than 4% by weight An electronic device characterized in that it is connected using a lead-free solder which is a member different from the Sn-Bi-based layer.
基板と、A substrate,
Cu系リードを有し、前記Cu系リード上にSn―Bi系層が1層形成され、前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である半導体装置とが、前記Sn―Bi系層と異なる部材である鉛フリーはんだを用いて接続されたことを特徴とする電子機器。A semiconductor device having a Cu-based lead, wherein one Sn-Bi-based layer is formed on the Cu-based lead, and the Bi content in the Sn-Bi-based layer is 1% by weight or more and less than 4% by weight; An electronic device characterized in that it is connected using lead-free solder which is a member different from the Sn-Bi-based layer.
基板と、A substrate,
Cu系リードを有し、前記Cu系リード上に表面層としてSn―Bi系層が直接形成され、前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である半導体装置と、A semiconductor device having a Cu-based lead, wherein a Sn-Bi-based layer is directly formed as a surface layer on the Cu-based lead, and a Bi content in the Sn-Bi-based layer is 1% by weight or more and less than 4% by weight ,
前記基板と前記半導体装置を接続する鉛フリーはんだにより形成された半田接続部と、を有することを特徴とする電子機器。An electronic device comprising: a solder connection portion formed of lead-free solder for connecting the substrate and the semiconductor device.
基板と、A substrate,
Cu系リードを有し、前記Cu系リード上にSnにBiを1重量%以上4重量%未満含有させたSn―Bi系層が形成され、前記Cu系リードと前記Sn―Bi系層の間には他の金属層が形成されていない半導体装置と、A Sn-Bi-based layer having a Cu-based lead and containing Bi in an amount of 1% by weight or more and less than 4% by weight is formed on the Cu-based lead, and between the Cu-based lead and the Sn-Bi-based layer A semiconductor device on which no other metal layer is formed,
前記基板と前記半導体装置を接続する鉛フリーはんだにより形成された半田接続部と、を有することを特徴とする電子機器。An electronic device comprising: a solder connection portion formed of lead-free solder for connecting the substrate and the semiconductor device.
基板と、A substrate,
Fe―Ni系合金リードを有し、前記Fe―Ni系合金リード上に表面層としてSn―Bi系層が直接形成され、前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である半導体装置とが、前記Sn―Bi系層と異なる部材である鉛フリーはんだを用いて接続されたことを特徴とする電子機器。It has a Fe-Ni based alloy lead, and a Sn-Bi based layer is directly formed as a surface layer on the Fe-Ni based alloy lead, and the Bi content in the Sn-Bi based layer is 1 wt% to 4 wt%. An electronic apparatus characterized in that a semiconductor device having a length smaller than the semiconductor device is connected using a lead-free solder which is a member different from the Sn-Bi-based layer.
基板と、A substrate,
Fe―Ni系合金リードを有し、前記Fe―Ni系合金リード上にSn―Bi系層が1層形成され、前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である半導体装置とが、前記Sn―Bi系層と異なる部材である鉛フリーはんだを用いて接続されたことを特徴とする電子機器。It has a Fe-Ni based alloy lead, one Sn-Bi based layer is formed on the Fe-Ni based alloy lead, and the Bi content in the Sn-Bi based layer is 1% by weight or more and less than 4% by weight An electronic apparatus characterized in that a semiconductor device is connected using lead-free solder which is a member different from the Sn-Bi-based layer.
基板と、A substrate,
Fe―Ni系合金リードを有し、前記Fe―Ni系合金リード上に表面層としてSn―Bi系層が直接形成され、前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である半導体装置と、It has a Fe-Ni based alloy lead, and a Sn-Bi based layer is directly formed as a surface layer on the Fe-Ni based alloy lead, and the Bi content in the Sn-Bi based layer is 1 wt% to 4 wt%. A semiconductor device which is less than
前記基板と前記半導体装置を接続する鉛フリーはんだにより形成された半田接続部と、を有することを特徴とする電子機器。An electronic device comprising: a solder connection portion formed of lead-free solder for connecting the substrate and the semiconductor device.
基板と、A substrate,
Fe―Ni系合金リードを有し、前記Fe―Ni系合金リード上にSnにBiを1重量%以上4重量%未満含有させたSn―Bi系層が形成され、前記Fe―Ni系合金リードと前記Sn―Bi系層の間には他の金属層が形成されていない半導体装置と、A Sn—Bi based layer having an Fe—Ni based alloy lead and containing Bi in an amount of 1% to 4% by weight on Sn is formed on the Fe—Ni based alloy lead, and the Fe—Ni based alloy lead A semiconductor device in which another metal layer is not formed between the first and second Sn—Bi based layers;
前記基板と前記半導体装置を接続する鉛フリーはんだにより形成された半田接続部と、を有することを特徴とする電子機器。An electronic device comprising: a solder connection portion formed of lead-free solder for connecting the substrate and the semiconductor device.
基板と、A substrate,
Fe―Ni系合金リードを有し、前記Fe―Ni系合金リード上にCu層が形成され、前記Cu層上に表面層としてSn―Bi系層が形成され、さらに前記SnIt has a Fe-Ni based alloy lead, a Cu layer is formed on the Fe-Ni based alloy lead, a Sn-Bi based layer is formed on the Cu layer as a surface layer, and the Sn ―Bi系層におけるBi含有量が1重量%以上4重量%未満である半導体装置とが、前記Sn―Bi系層と異なる部材である鉛フリーはんだを用いて接続されたことを特徴とする電子機器。The semiconductor device having a Bi content in the Bi-based layer of 1% by weight or more and less than 4% by weight is connected using a lead-free solder which is a member different from the Sn-Bi-based layer. machine.
基板と、A substrate,
Fe―Ni系合金リードを有し、前記Fe―Ni系合金リード上にCu層とSn―Bi系層が形成され、前記Cu層は前記Sn―Bi系層で覆われ、さらに前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である半導体装置とが、前記Sn―Bi系層と異なる部材である鉛フリーはんだを用いて接続されたことを特徴とする電子機器。It has a Fe-Ni based alloy lead, a Cu layer and a Sn-Bi based layer are formed on the Fe-Ni based alloy lead, the Cu layer is covered with the Sn-Bi based layer, and further the Sn-Bi based layer. An electronic device comprising: a semiconductor device having a Bi content in a system layer of 1% by weight or more and less than 4% by weight, and a lead-free solder which is a member different from the Sn—Bi system layer.
基板と、A substrate,
Fe―Ni系合金リードを有し、前記Fe―Ni系合金リード上にCu層が形成され、前記Cu層上に表面層としてSn―Bi系層が形成され、さらに前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である半導体装置と、It has a Fe-Ni based alloy lead, a Cu layer is formed on the Fe-Ni based alloy lead, a Sn-Bi based layer is formed as a surface layer on the Cu layer, and further, in the Sn-Bi based layer A semiconductor device having a Bi content of 1% by weight or more and less than 4% by weight;
前記基板と前記半導体装置を接続する鉛フリーはんだにより形成された半田接続部と、を有することを特徴とする電子機器。An electronic device comprising: a solder connection portion formed of lead-free solder for connecting the substrate and the semiconductor device.
基板と、A substrate,
Fe―Ni系合金リードを有し、前記Fe―Ni系合金リードの上にSnにBiを1重量%以上4重量%未満含有させたSn―Bi系層が形成され、さらに前記Fe―Ni系合金リードと前記Sn―Bi系層の間にCu層が形成された半導体装置と、A Sn-Bi-based layer having an Fe-Ni-based alloy lead and containing Bi in an amount of 1% by weight or more and less than 4% by weight on Sn is formed on the Fe-Ni-based alloy lead. A semiconductor device in which a Cu layer is formed between an alloy lead and the Sn-Bi based layer;
前記基板と前記半導体装置を接続する鉛フリーはんだにより形成された半田接続部と、を有することを特徴とする電子機器。An electronic device comprising: a solder connection portion formed of lead-free solder for connecting the substrate and the semiconductor device.
請求項1から12のいずれか1項に記載の電子機器であって、前記Sn―Bi系層はめっき層であることを特徴とする半導体装置。The electronic device according to any one of claims 1 to 12, wherein the Sn-Bi based layer is a plating layer. 請求項1から12のいずれか1項に記載の電子機器であって、前記Sn―Bi系層はディップによって形成された層であることを特徴とする電子機器。The electronic device according to any one of claims 1 to 12, wherein the Sn-Bi based layer is a layer formed by dipping. 請求項1から14のいずれか1項に記載の電子機器であって、前記鉛フリーはんだはBiを含有することを特徴とする電子機器。The electronic device according to any one of claims 1 to 14, wherein the lead-free solder contains Bi. 請求項1から14のいずれか1項に記載の電子機器であって、前記鉛フリーはんだはSn−Ag−Bi系の鉛フリーはんだであることを特徴とする電子機器。The electronic device according to any one of claims 1 to 14, wherein the lead-free solder is a Sn-Ag-Bi lead-free solder. 請求項1から14のいずれか1項に記載の電子機器であって、前記鉛フリーはんだはSnを主成分として、Bi、Ag、Cuを含有することを特徴とする電子機器。The electronic device according to any one of claims 1 to 14, wherein the lead-free solder contains Sn as a main component and contains Bi, Ag, and Cu. 請求項17に記載の電子機器であって、前記鉛フリーはんだはSnを主成分として、Biを5重量%以上25重量%以下、Agを1.5重量%以上3重量%以下、Cuを1重量%以下含有することを特徴とする電子機器。The electronic device according to claim 17, wherein the lead-free solder contains Sn as a main component, 5 wt% to 25 wt% of Bi, 1.5 wt% to 3 wt% of Ag, and 1 Cu. An electronic device characterized by containing at most weight percent. 請求項1から18のいずれか1項に記載の電子機器であって、前記半導体装置がTSOP型半導体装置であることを特徴とする電子機器。The electronic device according to any one of claims 1 to 18, wherein the semiconductor device is a TSOP type semiconductor device. 請求項1から18のいずれか1項に記載の電子機器であって、前記半導体装置がQFP型半導体装置であることを特徴とする電子機器。The electronic device according to any one of claims 1 to 18, wherein the semiconductor device is a QFP type semiconductor device. 基板と、A substrate,
Cu系リードを有し、前記Cu系リード上に表面層としてSn―Bi系層が直接形成され、前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である半導体装置とを、前記Sn―Bi系層と異なる部材である鉛フリーはんだを用いて接続することを特徴とする電子機器の製造方法。A semiconductor device having a Cu-based lead, wherein a Sn-Bi-based layer is directly formed as a surface layer on the Cu-based lead, and a Bi content in the Sn-Bi-based layer is 1% by weight or more and less than 4% by weight And a lead-free solder which is a member different from the Sn-Bi-based layer.
基板と、A substrate,
Cu系リードを有し、前記Cu系リード上にSnにBiを1重量%以上4重量%未満含有させたSn―Bi系層が形成され、前記Cu系リードと前記Sn―Bi系層の間には他の金属層が形成されていない半導体装置とを、前記Sn―Bi系層と異なる部材である鉛フリーはんだを用いて接続することを特徴とする電子機器の製造方法。A Sn-Bi-based layer having a Cu-based lead and containing Bi in an amount of 1% by weight or more and less than 4% by weight is formed on the Cu-based lead, and between the Cu-based lead and the Sn-Bi-based layer A method of manufacturing an electronic device, comprising: connecting a semiconductor device having no other metal layer formed thereon using a lead-free solder which is a member different from the Sn—Bi based layer.
基板と、Cu系リードを有する半導体装置を半田付け接続する電子機器の製造方法であって、A method of manufacturing an electronic device, in which a substrate and a semiconductor device having a Cu-based lead are connected by soldering.
前記基板と、前記Cu系リード上に表面層としてSn―Bi系層が直接形成され、かつ前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である前記半導体装置を、前記基板の電極と前記Sn―Bi系層の両方に鉛フリーはんだを接触させて半田付け接続することを特徴とする電子機器の製造方法。In the semiconductor device, a Sn—Bi based layer is directly formed as a surface layer on the substrate and the Cu based lead, and the Bi content in the Sn—Bi based layer is 1% by weight or more and less than 4% by weight. A method of manufacturing an electronic device, wherein a lead-free solder is brought into contact with both the electrode of the substrate and the Sn-Bi-based layer for soldering connection.
基板と、Cu系リードを有する半導体装置を半田付け接続する電子機器の製造方法であって、A method of manufacturing an electronic device, in which a substrate and a semiconductor device having a Cu-based lead are connected by soldering.
前記基板と、前記Cu系リード上にSnにBiを1重量%以上4重量%未満含有させたSn―Bi系層が1層形成された半導体装置を、前記基板の電極と前記Sn―Bi系層の両方に鉛フリーはんだを接触させて半田付け接続することを特徴とする電子機器の製造方法。An electrode of the substrate and the Sn-Bi-based semiconductor device, wherein the substrate and the Sn-Bi-based layer in which 1% by weight or more and 4% by weight or less of Bi are contained in Sn are formed on the substrate and the Cu-based lead A method of manufacturing an electronic device, wherein lead-free solder is brought into contact with both layers and soldered and connected.
半導体装置と前記半導体装置を実装する基板を準備する工程と、Preparing a semiconductor device and a substrate for mounting the semiconductor device;
前記半導体装置と前記基板を接続する鉛フリーはんだを準備する工程と、Preparing a lead-free solder connecting the semiconductor device and the substrate;
前記基板と前記半導体装置を前記鉛フリーはんだで半田付け接続する工程を有し、Solder-connecting the substrate and the semiconductor device with the lead-free solder;
前記半田付け工程では、In the soldering process,
前記基板と、Cu系リード上に表面層としてSn―Bi系層が直接形成され、かつ前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である前Before the Sn-Bi-based layer is directly formed as a surface layer on the substrate and the Cu-based lead, and the Bi content in the Sn-Bi-based layer is 1% by weight or more and less than 4% by weight 記半導体装置とを、前記基板の電極と前記Sn―Bi系層の両方に前記鉛フリーはんだを接触させて半田付け接続することを特徴とする電子機器の製造方法。A method of manufacturing an electronic device, wherein the lead-free solder is brought into contact with both the electrode of the substrate and the Sn-Bi-based layer of the semiconductor device, and the semiconductor device is connected by soldering.
基板と、A substrate,
Fe―Ni系合金リードを有し、前記Fe―Ni系合金リード上に表面層としてSn―Bi系層が直接形成され、前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である半導体装置とを、前記Sn―Bi系層と異なる部材である鉛フリーはんだを用いて接続することを特徴とする電子機器の製造方法。It has a Fe-Ni based alloy lead, and a Sn-Bi based layer is directly formed as a surface layer on the Fe-Ni based alloy lead, and the Bi content in the Sn-Bi based layer is 1 wt% to 4 wt%. A method of manufacturing an electronic device, comprising: connecting a semiconductor device having a length smaller than the semiconductor device using a lead-free solder which is a member different from the Sn-Bi-based layer.
基板と、A substrate,
前記Fe―Ni系合金リード上にはSnにBiを1重量%以上4重量%未満含有させたSn―Bi系層が形成され、前記Fe―Ni系合金リードと前記Sn―Bi系層の間には他の金属層が形成されていない前記半導体装置とを、On the Fe-Ni alloy lead is formed a Sn-Bi-based layer containing Bi in an amount of 1% by weight or more and less than 4% by weight to Sn, and between the Fe-Ni-based alloy lead and the Sn-Bi-based layer And the semiconductor device in which no other metal layer is formed on the
前記Sn―Bi系層と異なる部材である鉛フリーはんだを用いて接続することを特徴とする電子機器の製造方法。A method of manufacturing an electronic device comprising: connecting using a lead-free solder which is a member different from the Sn-Bi-based layer.
基板と、Fe―Ni系合金リードを有する半導体装置を半田付け接続する電子機器の製造方法であって、A method of manufacturing an electronic device, in which a substrate and a semiconductor device having an Fe-Ni based alloy lead are connected by soldering.
前記基板と、前記Fe―Ni系合金リード上に表面層としてSn―Bi系層が直接形成され、かつ前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である前記半導体装置を、前記基板の電極と前記Sn―Bi系層の両方に鉛フリーはんだを接触させて半田付け接続することを特徴とする電子機器の製造方法。The semiconductor described above, wherein a Sn—Bi based layer is directly formed as a surface layer on the substrate and the Fe—Ni based alloy lead, and the Bi content in the Sn—Bi based layer is 1% by weight or more and less than 4% by weight A method of manufacturing an electronic device, wherein a device is soldered by bringing a lead-free solder into contact with both the electrode of the substrate and the Sn—Bi based layer.
基板と、Fe―Ni系合金リードを有する半導体装置を半田付け接続する電子機器の製造方法であって、A method of manufacturing an electronic device, in which a substrate and a semiconductor device having an Fe-Ni based alloy lead are connected by soldering.
前記基板と、前記Fe―Ni系合金リード上にSnにBiを1重量%以上4重量%未満含有させたSn―Bi系層が1層形成された半導体装置を、前記基板の電極と前記Sn―Bi系層の両方に鉛フリーはんだを接触させて半田付け接続するAn electrode of the substrate and the Sn in the semiconductor device, wherein the substrate and the Sn-Bi-based layer in which 1 wt% to 4 wt% of Bi is contained in Sn are formed on the Fe-Ni alloy lead. -Connect lead-free solder to both Bi-based layers and connect them by soldering ことを特徴とする電子機器の製造方法。A method of manufacturing an electronic device characterized in that.
半導体装置と前記半導体装置を実装する基板を準備する工程と、Preparing a semiconductor device and a substrate for mounting the semiconductor device;
前記半導体装置と前記基板を接続する鉛フリーはんだを準備する工程と、Preparing a lead-free solder connecting the semiconductor device and the substrate;
前記基板と前記半導体装置を前記鉛フリーはんだで半田付け接続する工程を有し、Solder-connecting the substrate and the semiconductor device with the lead-free solder;
前記半田付け工程では、In the soldering process,
前記基板と、Fe―Ni系合金リード上に表面層としてSn―Bi系層が直接形成され、かつ前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である前記半導体装置とを、前記基板の電極と前記Sn―Bi系層の両方に前記鉛フリーはんだを接触させて半田付け接続することを特徴とする電子機器の製造方法。The semiconductor device, wherein a Sn—Bi based layer is directly formed as a surface layer on the substrate and the Fe—Ni based alloy lead, and the Bi content in the Sn—Bi based layer is 1% by weight or more and less than 4% by weight And a lead-free solder is brought into contact with both the electrode of the substrate and the Sn-Bi-based layer for solder connection.
基板と、A substrate,
Fe―Ni系合金リードを有し、前記Fe―Ni系合金リード上にCu層が形成され、前記Cu層上に表面層としてSn―Bi系層が形成され、さらに前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である半導体装置とを、前記Sn―Bi系層と異なる部材である鉛フリーはんだを用いて接続することを特徴とする電子機器の製造方法。It has a Fe-Ni based alloy lead, a Cu layer is formed on the Fe-Ni based alloy lead, a Sn-Bi based layer is formed as a surface layer on the Cu layer, and further, in the Sn-Bi based layer A method of manufacturing an electronic device, comprising connecting a semiconductor device having a Bi content of 1% by weight or more and less than 4% by weight using a lead-free solder which is a member different from the Sn—Bi based layer.
基板と、A substrate,
Fe―Ni系合金リードを有し、前記Fe―Ni系合金リード上にCu層とSn―Bi系層が形成され、前記Cu層は前記Sn―Bi系層で覆われ、さらに前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である半導体装置とを、前記Sn―Bi系層と異なる部材である鉛フリーはんだを用いて接続することを特徴とする電子機器の製造方法。It has a Fe-Ni based alloy lead, a Cu layer and a Sn-Bi based layer are formed on the Fe-Ni based alloy lead, the Cu layer is covered with the Sn-Bi based layer, and further the Sn-Bi based layer. Manufacture of an electronic device characterized in that a semiconductor device having a Bi content in the base layer of 1% by weight or more and less than 4% by weight is connected using a lead-free solder which is a member different from the Sn-Bi base layer. Method.
基板と、Fe―Ni系合金リードを有する半導体装置を半田付け接続する電子機器の製造方法であって、A method of manufacturing an electronic device, in which a substrate and a semiconductor device having an Fe-Ni based alloy lead are connected by soldering.
前記基板と、前記Fe―Ni系合金リード上にCu層が形成され、前記Cu層上に表面層としてSn―Bi系層が形成され、さらに前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である前記半導体装置を、前記基板の電極と前記Sn―Bi系層の両方に鉛フリーはんだを接触させて半田付け接続することを特徴とする電子機器の製造方法。A Cu layer is formed on the substrate and the Fe-Ni alloy lead, an Sn-Bi-based layer is formed on the Cu layer as a surface layer, and a Bi content in the Sn-Bi-based layer is 1 weight A method of manufacturing an electronic device, wherein the semiconductor device having a% or more and less than 4% by weight is soldered by bringing a lead-free solder into contact with both the electrode of the substrate and the Sn—Bi based layer.
基板と、Fe―Ni系合金リードを有する半導体装置を半田付け接続する電子機器の製造方法であって、A method of manufacturing an electronic device, in which a substrate and a semiconductor device having an Fe-Ni based alloy lead are connected by soldering.
前記基板と、前記Fe―Ni系合金リードの上にSnにBiを1重量%以上4重量%未満含有させたSn―Bi系層が形成され、さらに前記Fe―Ni系合金リードと前記Sn―Bi系層の間にはCu層が形成された前記半導体装置を、前記基板の電極と前記Sn―Bi系層の両方に鉛フリーはんだを接触させて半田付け接続することを特徴とする電子機器の製造方法。An Sn-Bi-based layer in which Bi is contained in an amount of 1% by weight or more and less than 4% by weight is formed on the substrate and the Fe-Ni-based alloy lead, and further, the Fe-Ni-based alloy lead and the Sn-- Electronic device characterized in that the semiconductor device having a Cu layer formed between Bi-based layers is connected by soldering lead-free solder in contact with both the electrode of the substrate and the Sn-Bi-based layer. Manufacturing method.
半導体装置と前記半導体装置を実装する基板を準備する工程と、Preparing a semiconductor device and a substrate for mounting the semiconductor device;
前記半導体装置と前記基板を接続する鉛フリーはんだを準備する工程と、Preparing a lead-free solder connecting the semiconductor device and the substrate;
前記基板と前記半導体装置を前記鉛フリーはんだで半田付け接続する工程を有し、Solder-connecting the substrate and the semiconductor device with the lead-free solder;
前記半田付け工程では、In the soldering process,
前記基板と、Fe―Ni系合金リード上にCu層が形成され、前記Cu層上に表面層としてSn―Bi系層が形成され、さらに前記Sn―Bi系層におけるBi含有量が1重量%以上4重量%未満である前記半導体装置を、前記基板の電極と前記Sn―Bi系層の両方に鉛フリーはんだを接触させて半田付け接続することを特徴とする電子機器の製造方法。A Cu layer is formed on the substrate and the Fe-Ni alloy lead, a Sn-Bi-based layer is formed on the Cu layer as a surface layer, and a Bi content in the Sn-Bi-based layer is 1% by weight A method of manufacturing an electronic device, wherein the semiconductor device having a content of less than 4% by weight is connected by soldering a lead-free solder in contact with both the electrode of the substrate and the Sn—Bi based layer.
請求項21から35のいずれか1項に記載の電子機器の製造方法であって、前記Sn―Bi系層はめっき層であることを特徴とする電子機器の製造方法。The method of manufacturing an electronic device according to any one of claims 21 to 35, wherein the Sn-Bi based layer is a plating layer. 請求項21から35のいずれか1項に記載の電子機器の製造方法であって、前記A method of manufacturing an electronic device according to any one of claims 21 to 35, wherein Sn―Bi系層はディップによって形成された層であることを特徴とする電子機器の製造方法。A method of manufacturing an electronic device, wherein the Sn—Bi based layer is a layer formed by dipping. 請求項21から37のいずれか1項に記載の電子機器の製造方法であって、前記鉛フリーはんだはBiを含有することを特徴とする電子機器の製造方法。The method of manufacturing an electronic device according to any one of claims 21 to 37, wherein the lead-free solder contains Bi. 請求項21から37のいずれか1項に記載の電子機器の製造方法であって、前記鉛フリーはんだはSn−Ag−Bi系の鉛フリーはんだであることを特徴とする電子機器の製造方法。The method of manufacturing an electronic device according to any one of claims 21 to 37, wherein the lead-free solder is a Sn-Ag-Bi lead-free solder. 請求項21から37のいずれか1項に記載の電子機器の製造方法であって、前記鉛フリーはんだはSnを主成分として、Bi、Ag、Cuを含有することを特徴とする電子機器の製造方法。The method of manufacturing an electronic device according to any one of claims 21 to 37, wherein the lead-free solder contains Sn, as a main component, and contains Bi, Ag, and Cu. Method. 請求項40に記載の電子機器の製造方法であって、前記鉛フリーはんだはSnを主成分として、Biを5重量%以上25重量%以下、Agを1.5重量%以上3重量%以下、Cuを1重量%以下含有することを特徴とする電子機器の製造方法。41. A method of manufacturing an electronic device according to claim 40, wherein the lead-free solder contains Sn as a main component, 5% by weight or more and 25% by weight or less of Bi, and 1.5% by weight or more and 3% by weight or less of Ag. A method of manufacturing an electronic device comprising 1% by weight or less of Cu.
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