JP2002141831A - Receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve a problem that power consumption is great in a matched filter. SOLUTION: A delay profile estimator 103 estimates a delay profile from the output of a matched filter 100 and while using the estimated delay profile information, an observation time window width decider 104 decides the time window of the matched filter 100.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a receiving apparatus for estimating a delay profile.

[0002]

2. Description of the Related Art In a radio system called the W-CDMA system, identification between cells is performed using a long code (long-period code) unique to a cell, and identification of a communication person in a cell is performed using a short code (a symbol period). (Short-period code). In order for the mobile station to quickly identify a long code (long-period code) unique to each cell, there is a reference signal for specifying the phase of the long code. The downlink long code from the base station is masked at a fixed interval, and a short code common to all cells (short period code of the symbol period) is embedded in the masked portion. The structure is easy to identify.

There are two situations in which a mobile station must actually identify a long code: an initial cell search and a peripheral cell search. The initial cell search is a case where the long code of the serving cell must be identified before the mobile station communicates with the base station, such as when the power is turned on. In addition, the peripheral cell search is a case where the long code of the handover destination base station must be identified prior to the handover in the case of inter-cell movement.

[0004] In both the initial cell search and the peripheral cell search, the mobile station has, as a replica, a short code common to all cells, which is embedded in the long code at fixed intervals. A correlation operation is performed using a matched filter, and a maximum correlation peak is detected as a long code mask timing.

The correlation calculator is roughly classified into a sliding correlator and a matched filter. In the case of a sliding correlator, it is calculated by multiplying a spread sequence and a received signal by a chip rate and integrating the result in a symbol section. In the case of a matched filter, all or a partial sequence of the spread sequence is multiplied by a received signal of the same length at a chip rate to calculate a sum.

Therefore, a matched filter is advantageous when high-speed synchronization is required or when the propagation environment changes rapidly due to high-speed movement or the like. However, the amount of calculation of the matched filter is twice the correlation length as compared with the sliding correlator, and the power consumption also increases.

Next, a conventional system will be described with reference to a configuration diagram used for identification of a long code. FIG. 5 shows a downlink frame configuration using a long code mask used in the W-CDMA system. In the same frame configuration, a short code common to all cells for specifying the phase of the long code is embedded at a position of the long code mask symbol shown in FIG. The long code is divided into 15 equal parts. This short code is common in any of the 15 positions.

Accordingly, the mobile station has a short code common to all cells as a replica, and as a result of the correlation operation, detects the maximum of the correlation peak as the long code timing, thereby setting the long code phase at 15 points in the long code period. It becomes possible to narrow down to. FIG. 6 shows a state in which 15 correlation peaks are output at regular intervals of the slot length.

A conventional configuration example of the initial synchronization acquisition will be described with reference to FIG. In the figure, reference numeral 700 denotes a matched filter for performing a correlation operation on a received signal, and has a short code common to all cells as a replica. 701 is an energy detector for detecting the energy of the output signal of the matched filter, and 702 is an integrator for averaging the detected energy, and has a function of performing a cyclic integration at regular intervals of a normal slot length. .

As for the energy of the cyclically integrated correlation value, the delay profile estimator 703 stores the correlation peak position and number.

Next, a group to which the received long code belongs is determined. FIG. 5 shows the judgment of this group.
The group code embedded at the position of the long code mask symbol is used.

The spreading code generator 705 starts outputting a plurality of group codes at each of the plurality of correlation positions estimated by the delay profile estimator 703. The plurality of group codes are provided by a plurality of sliding correlators 70.
6 and a plurality of sliding correlators 706 are
The correlation between the plurality of group codes and the received signal is output. The output from each sliding correlator 706 is
The energy detector 707 detects the correlation energy, and the integrator 708 performs integration processing for a predetermined period.

A long code identification determining unit 709 determines which group code is embedded in each of the fifteen long code mask symbols in FIG. 5 from a plurality of integration results. From this determination result, it can be determined to which group the long code belongs, and further, from the pattern of the 15 group codes, it can be determined which of the 15 long code mask symbols is the head position of the long code.

On the basis of the head position of the long code determined in this way and the position and number of correlation peaks of the delay profile information estimated by the delay profile estimator 703, a plurality of spread code generators Are output, and are input to the plurality of sliding correlators 706.

The output from each sliding correlator 706 is correlated energy detected by an energy detector 707 and integrated by an integrator 708 for a predetermined period. A plurality of integration results are output to the long code identifier 70
9 and are compared with each other, and a long code corresponding to a value equal to or greater than a predetermined threshold value and a phase are used as a long code identification result.

[0016]

However, in the above-described conventional circuit for searching for a short code common to all cells, a short code common to all cells is held in a replica at the receiving side, and a correlation process is performed by a matched filter 700 to reduce the delay profile. Since the search circuit is generated, the search circuit must be operated for a certain period every time the initial cell search and the peripheral cell search are performed, and an increase in power consumption by the matched filter has been a serious problem.

Conventionally, since the time window of the matched filter is fixed in order to search for the short code timing common to all cells, a huge amount of power is consumed every time the search is performed. When using the terminal in a mobile environment, battery consumption was a major problem.

[0018]

In order to achieve the above object, the present invention provides a matched filter for performing a correlation operation, an estimating means for estimating a delay profile from the output of the matched filter, and an estimated delay profile. An observation time window determining means for determining a time window of the matched filter using the information is provided. With such a configuration, the time window for searching for a short code common to all cells by the matched filter is made variable according to the contents of the delay profile, and the minimum required time observation window is provided to reduce the power consumption of the matched filter. Plan.

Also, a case where a sliding correlator is used in place of a matched filter is used. In this case, the number of sliding correlators introduced in a search for a short code common to all cells is made variable. , Similar effects can be expected.

[0020]

FIG. 1 is a diagram showing a configuration of a receiving apparatus according to an embodiment of the present invention related to the present application. The device is used in a DS-CDMA (Direct Spread-Code Division Multiple Access) system.

In FIG. 1, first, a correlation operation is performed on a received signal by a matched filter 100 having a short code common to all cells as a replica. After the energy is extracted by the energy detector 101, the received signal subjected to the correlation operation is subjected to an averaging process by the integrator 102. In the averaging process, cyclic integration is performed at regular intervals of the slot length.

The energy of the cyclically integrated correlation value is calculated by a delay profile estimator 103 to obtain a correlation peak position,
The number is stored. Here, the delay profile information is
At the same time as being passed to the spreading code generator 105, it is output to the observation time window determiner 104.

The observation time window determiner 104 calculates a delay spread, which is a dispersion measure of the correlation peak, from the delay profile information, and changes the observation time window of the matched filter 100 according to the magnitude of the delay spread. The method of calculating the delay spread is conventionally known, and will not be described in detail here. According to the time window determined by the observation time window determiner 104, the matched filter 100
Perform a correlation operation.

On the other hand, the plurality of spread code generators 105 to which the delay profile information has been input start outputting a plurality of group codes based on the position and number of correlation peaks. The plurality of group codes are input to a plurality of sliding correlators 106, and the plurality of sliding correlators 106 output correlations between the plurality of group codes and a received signal. The output from each sliding correlator 106 has its energy detected by an energy detector 107 and is integrated by an integrator 108 for a predetermined period.

The long code identification determiner 109 determines which group code is embedded in each of the 15 long code mask symbols of FIG. 5 from the plurality of integration results. From this determination result, it can be determined to which group the long code belongs, and further, from the pattern of the 15 group codes, it can be determined which of the 15 long code mask symbols is the head position of the long code.

Based on the head position of the long code determined in this way and the position and number of correlation peaks of the delay profile information estimated by the delay profile estimator 103, a plurality of spread code generators 105 Output of multiple long codes belonging to
It is input to a plurality of sliding correlators 106. Here, the delay profile estimator 103 uses the matched filter 1 with the time window width determined by the observation time window width determiner 104.
The delay profile is estimated on the basis of the correlation output obtained in step S00.

The output from each sliding correlator 106 is correlated energy detected by an energy detector 107 and integrated by an integrator 108 for a predetermined period. A plurality of integration results are obtained by the long code identifier 1
In step 09, the long code is compared with each other, and the long code corresponding to a value equal to or greater than a predetermined threshold value is used as a long code identification result.

Next, regarding the observation time window determiner 104,
This will be described in detail with reference to FIGS. FIG. 2 shows an example of a result of performing a path search for a fixed period (single slot time). The horizontal axis represents the slot time length, and the vertical axis represents the magnitude of the correlation value.

In the figure, the positions where the multipaths appear are adjacent to each other (when the delay spread σ is small), and even if the path search is performed with the observation time window of the matched filter reduced, Low probability of failing to search for a path. Therefore, the observation time window width determiner 104 calculates
The matched filter 100 is controlled so that the observation time window width is set small. When the observation time window width is reduced, the power consumed by the matched filter 100 decreases,
Power consumption can be reduced as compared with the case where the observation time window width is fixed.

In this manner, observation window width determiner 104 determines the observation time window width based on the delay spread obtained from the delay profile, and the match and filter 100 determine the correlation between the determined observation time window width. Is set to be output, the long code can be determined with low power consumption.

On the other hand, FIG. 3 shows an example of the result of performing a path search for a fixed period (single slot time) as in FIG. 2, but the locations of the multipaths are greatly dispersed in time, and the delay spread σ Is large. In this case, it is no longer possible to reduce the observation time window of the matched filter, and the observation time window width determiner 104 may increase the time window width as much as possible to eliminate multipath. Filter 1
00 is controlled. As a result, the power consumed by the matched filter becomes relatively large.

FIG. 8 is a diagram showing the configuration of the matched filter 100. In the figure, first, a baseband received signal is divided into N correlators 80 at a chip rate.
, 802, and 802. The output of each correlator is the following LPF 803, 804,.
05. The outputs of the low-pass filters are output as matched filters by the parallel-serial converter 806.

On the other hand, the time window width setting register 807
Correlators 800-802, LPFs 803-805, PS
It is connected to a converter 806. Observation time window width determiner 1
04 sets the time window width setting value in the time window width setting register 8
07, N correlators and N LPs
Decide how many of the F will be used. The unused correlator and LPF stop the clock or stop the power supply in response to a signal from the time window width setting register 807 in order to reduce power consumption. The PS converter 806 performs parallel-to-serial conversion of the LPF corresponding to the time window width set value set in the time window width setting register 807, and outputs the result as a matched filter output.

Next, details of the correlators 800 to 802 will be described with reference to FIG. In the figure, a baseband reception signal is sequentially multiplied by a multiplier 200 with an output of a spreading code generation circuit 201 at a chip rate. The spreading code generating circuit 201 has a function of outputting a replica of the short code common to all cells. The spreading code generation circuits of the correlators 800 to 802 generate the spreading codes at a timing shifted by one chip each. The multiplication result is transferred as a correlation output at a chip rate to a subsequent LPF.

The multiplier 200 and the spreading code generating circuit 20
1 operates or is stopped by the time window setting register 807.

Further, details of the LPFs 803 to 805 will be described with reference to FIG. In FIG.
0, the addition value storage register 301 at the chip rate
And the result is added to the addition value storage register 3.
01 is stored. Here, cumulative addition is performed for the number of chips corresponding to the spreading code length or the symbol length, and the correlation integration output is performed.

Therefore, the spreading code included in the received signal,
If the phase of the output from the spreading code generator 201 in FIG. 9 matches, the correlation integral output increases, and if the phase shifts, the value becomes relatively small.

Whether the adder 300 and the added value storage register 301 operate or stop the operation is set by a time window setting register 807.

FIG. 11 visualizes the entire operation. The overall operation will be described below with reference to FIG. For simplicity, the spreading code length is 7 PN code. Therefore, in this case, the total number of correlators and LPFs is seven each. In the figure, the received signal is represented by 4-0,
P that is "-1, -1, + 1, -1, + 1, + 1, -1"
N series.

On the other hand, the output of the 0th spreading code generating circuit 201 is represented by 4-1 and is a sequence delayed by one chip on the time axis as compared with the received sequence. 4-2 is 0
This is the output of the correlation integration, and the value after one cycle of the spreading sequence is "-1" (the hatched portion in the figure).

After one cycle, the contents of the added value storage register 301 in FIG. 10 are initialized to "0", and the correlation operation is restarted.

Similarly, the output value of the first spread code generation circuit 201 that outputs a sequence delayed by two chips from the received sequence is 4-3, and the output of the first correlation integral after one cycle is 4 -4 is shown in the shaded area.

The output of the sixth spreading code generation circuit is 4-5
Which is completely in phase with the received signal. Therefore, in 4-6, which is the output value of the sixth correlation integration, the value after one cycle of the correlation integration is "7", which is equal to the correlation value "-1" when other phases are not matched. In comparison, it has a relatively large value. Therefore, a phase synchronization point can be extracted based on the magnitude of these correlation values.

In FIG. 11, the correlation integral value in the hatched portion is time-compressed by the parallel-serial converter 806 in FIG. 8, and is serially output by the number of operating correlation integrals.

As described above, the matched filter function can be realized by operating the correlation integrators in parallel with the number corresponding to the spreading code length.

The matched filter 100 capable of changing the observation time window width is described in “Study on Low Power Consumption of DS-CDMA Matched Filter” at the 1997 IEICE Fundamental Society Conference. A matched filter for DS-CDMA may be used.

As described above, by setting the observation time window width to the minimum value required for the path search using the delay profile estimation result, it is possible to reduce the power consumed by the matched filter when performing the path search. Can be expected.

FIG. 4 is a diagram showing the configuration of a DS-CDMA signal receiving apparatus according to the second embodiment of the present invention. The differences from the signal receiving apparatus of FIG. 1 will be described.

In the figure, reference numeral 400 denotes a plurality of sliding correlators, and an observation time window width determiner 404 determines the minimum necessary number of correlators operated for path search instead of the observation time window width. It has a function of determining based on information of the delay profile estimator 403. Therefore, power consumption can be reduced by operating the minimum number of correlators necessary for path search according to the magnitude of the delay spread.

[0050]

As described above, the time window width of the matched filter or the number of the sliding correlators for performing the correlation operation processing on the received signal based on the delay profile information is used for performing the path search. , It is possible to expect an extremely important power consumption reduction effect in mobile applications.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a configuration example of a DS-CDMA signal receiver embodying the present invention.

FIG. 2 is a diagram illustrating an example of a delay profile when a delay spread is small.

FIG. 3 is a diagram illustrating an example of a delay profile when a delay spread is large.

FIG. 4 is a diagram illustrating a configuration example of a second DS-CDMA signal receiver embodying the present invention.

FIG. 5 is a diagram illustrating a downlink frame configuration using a long code mask adopted in the W-CDMA system.

FIG. 6 is a diagram showing a correlation peak value appearing within one long code cycle.

FIG. 7 is a diagram illustrating a configuration example of a conventional DS-CDMA signal receiver.

FIG. 8 is a diagram showing a configuration example of a matched filter used in a receiver embodying the present invention.

FIG. 9 is a diagram showing a correlator.

FIG. 10 is a diagram showing an LPF.

FIG. 11 is a diagram illustrating an operation of a matched filter used in a receiver embodying the present invention.

[Explanation of symbols]

 REFERENCE SIGNS LIST 100 Matched filter with variable time window 101 Energy detector 102 Integrator 103 Delay profile estimator 104 Observation time window width determiner 105 Multiple spreading code generators 106 Multiple correlators 107 Multiple energy detectors 108 Multiple integration Device 109 Long code identification judgment device

Claims (4)

[Claims] 1. A matched filter means, an estimating means for estimating a delay profile from an output of the matched filter means, and a determining means for determining a time window of the matched filter means using estimated delay profile information. A receiving device comprising: 2. A reception method for estimating a delay profile by using a matched filter, wherein a delay profile is estimated from an output of the matched filter, and a time window of the matched filter is estimated by using the estimated delay profile information. A receiving method. 3. Using a sliding correlation unit, an estimation unit for estimating a delay profile from an output of the sliding correlation unit, and the estimated delay profile information,
A receiving apparatus comprising: determining means for determining the number of correlation means for estimating the delay profile. 4. A receiving method for estimating a delay profile using a sliding correlator, wherein a delay profile is estimated from an output of the sliding correlator, and a time window of the sliding correlator is estimated using the estimated delay profile information. A receiving method.