JP2002140895A5 - - Google Patents
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- Publication number
- JP2002140895A5 JP2002140895A5 JP2001198513A JP2001198513A JP2002140895A5 JP 2002140895 A5 JP2002140895 A5 JP 2002140895A5 JP 2001198513 A JP2001198513 A JP 2001198513A JP 2001198513 A JP2001198513 A JP 2001198513A JP 2002140895 A5 JP2002140895 A5 JP 2002140895A5
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- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001198513A JP2002140895A (ja) | 2000-08-21 | 2001-06-29 | 半導体記憶装置 |
US09/971,697 US6584022B2 (en) | 2000-08-21 | 2001-10-09 | Semiconductor memory device with simultaneous data line selection and shift redundancy selection |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000-249463 | 2000-08-21 | ||
JP2000249463 | 2000-08-21 | ||
JP2001198513A JP2002140895A (ja) | 2000-08-21 | 2001-06-29 | 半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2002140895A JP2002140895A (ja) | 2002-05-17 |
JP2002140895A5 true JP2002140895A5 (zh) | 2008-07-17 |
Family
ID=26598143
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2001198513A Pending JP2002140895A (ja) | 2000-08-21 | 2001-06-29 | 半導体記憶装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2002140895A (zh) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3788966B2 (ja) * | 2002-09-25 | 2006-06-21 | 株式会社東芝 | 半導体記憶装置 |
KR100558050B1 (ko) * | 2004-11-19 | 2006-03-07 | 주식회사 하이닉스반도체 | 데이터 출력 모드를 변경할 수 있는 메모리 장치 |
JP4519786B2 (ja) * | 2006-02-24 | 2010-08-04 | 株式会社東芝 | 半導体記憶装置 |
US7902855B1 (en) | 2010-03-03 | 2011-03-08 | Altera Corporation | Repairable IO in an integrated circuit |
US9236864B1 (en) | 2012-01-17 | 2016-01-12 | Altera Corporation | Stacked integrated circuit with redundancy in die-to-die interconnects |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3874556B2 (ja) * | 1998-07-23 | 2007-01-31 | 富士通株式会社 | 半導体記憶装置およびシフト冗長方法 |
JP2000105994A (ja) * | 1998-09-29 | 2000-04-11 | Matsushita Electric Ind Co Ltd | 半導体記憶装置 |
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2001
- 2001-06-29 JP JP2001198513A patent/JP2002140895A/ja active Pending