JP2002134694A - Current output type da converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a current output type DA converter which enables to reduce a placement location dependency of a current source and to output analog signals corresponding to the number of added current power supplies with stability. SOLUTION: The current output type DA converter includes a unit current source array wherein a plurality of unit current sources respectively generating an unit amount of electricity are arranged along with directions crossing each other respectively in a common semiconductor chip 2 and a non-active area wherein at least either of a non-active current source or a non-active interconnection pattern is placed is arranged in a periphery of an actual active region where the actual active unit current sources are arranged. A width of the non-active region, at least the width in a portion corresponding to a long side facing each other in the actual active area is configured to have the 0.1A-2A width to the maximum length A in the short side direction of the arrangement area of the actual active unit current source. All actual active unit sources 1 can be arranged in the area where the placement location dependency is small, and the stability and linearity of the analog output characteristics can be obtained by this configuration.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current output type DA converter (digital-analog converter) in which a plurality of unit current sources each generating a unit electric quantity are arranged in a common semiconductor chip. It is possible to stably convert a digital input signal to an analog output and extract it.

[0002]

2. Description of the Related Art A current output type DA converter outputs an analog signal based on an output current value obtained by sequentially adding currents of unit current sources. At this time, it is necessary that the added current source current is constant in order to obtain an expected output analog signal from the input digital signal.

For example, in a current output type D / A converter used in a video device or the like, the output current value of each target unit current source is ± 10% of the target current value.
It is required to fit within.

The unit current source 1 constituting this current output type DA converter is, for example, each a p-channel type MIS transistor (insulated gate type field effect transistor) as shown in a circuit diagram of an example in FIG. It has first to fourth transistors PMIS1 to PMIS4, and third and fourth transistors PMIS3 and PMIS3.
The MIS4 has one turned off when one is turned on, and the other turned on when one is turned off. In this configuration, the first and second transistors PMIS
The current drawn by PMIS2 and 1 causes a unit current I to be drawn from its output terminal t when, for example, the third PMIS3 is turned on by an input digital signal.

In a conventional current output type D / A converter, as shown in FIG. 6, two crossing directions are provided in a common semiconductor chip 2, and in FIG. As schematically shown by the arrangement of the open grids, a plurality of actual operation unit current sources 1, which are used for actual operations, respectively, are arranged. In this example, the first and second units in each of which a number of unit current sources 1 are arranged in the same semiconductor chip 2 are shown.
Are formed side by side in the figure.

[0006] In these first and second blocks 101 and 102, a non-actual operating current source 1D that is not actually operated is surrounded by a grid on a dark background (not outlined). A non-operation area 40 is provided as schematically shown. In this way, consideration is given so that the actual operation unit current source 1 is not affected by the situation such as the surrounding circuit arrangement.

However, in a DA converter formed by a semiconductor integrated circuit in which a DRAM (dynamic random access memory) and a logic circuit are mounted on the same semiconductor chip, a plurality of unit current sources shown in FIG. 6 are arranged. The current source array configuration
An analog signal extracted by adding a plurality of current source currents is output as an analog signal that does not correspond to the number of added current sources.

That is, in a current output type DA converter, as shown in FIG. 7, the relationship between the analog output current value and the number of current sources obtained by adding the output currents is ideally as shown by a broken line. , A straight line of simple increase. However, in the current output type D / A converter having the configuration of FIG. 6, for example, as shown by a solid line curve in FIG.

The present inventors have found that such a phenomenon is due to the location dependency of the current source, and this location dependency depends on the arrangement area of these current sources, ie, the arrangement block of the current sources. When the current source located in the peripheral part has a larger current value than the current source located in the central part, and when there are a plurality of arrangement blocks, the current located in the peripheral part in the region including these blocks as a whole Since the current value of the current source is larger than that of the current source located at the center, the added current source current depends on the location of the current source. I determined that a signal was output.

According to the present invention, based on this finding, the current output type DA capable of reducing the dependence on the location of the current source and outputting an analog signal corresponding to the number of the current sources stably added is provided. It constitutes a converter.

[0011]

That is, in the current output type D / A converter according to the present invention, a plurality of unit current sources for respectively generating unit electric quantities are provided in a common semiconductor chip in two directions crossing each other. A current output type D / A converter having a plurality of unit current source arrays, wherein a non-actual operation not used for an actual operation is provided around an actual operation area where an actual operation unit current source used for the actual operation is arranged. A non-actual operation area is provided in which at least one of a current source and a non-actual operation wiring pattern not used for actual operation is arranged. In the present invention, in particular, the width W of at least a portion of the non-actual operation region corresponding to the opposite long side of the actual operation region is the maximum length A in the short side direction of the arrangement region of the actual operation unit current source. For
It is configured to have a width W of 0.1A to 2A.

As described above, the width W of the non-actual operation region of at least one of the non-actual operation current source or the wiring pattern disposed outside the long side of the portion where the actual operation unit current source is disposed.
Can be kept within the range of ± 10% of the target unit current I for all the unit current sources by selecting the above-mentioned specific width.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In a current output type DA converter according to an embodiment of the present invention, as shown in FIG. 1, an example layout is shown in FIG. The first and second unit current source array (array) blocks 21 and 22 in which are arranged are formed side by side in the figure. In these blocks 21 and 22, a plurality of actual operation unit current sources 1 are respectively arranged in X and Y directions orthogonal to each other, as schematically shown by white grids.

Each of these unit current sources 1 can be configured by, for example, the first to fourth p-channel MIS transistors PMIS1 to PMIS4 described with reference to FIG.

In the present invention, both blocks 2
1 and 22, a non-actual operation so-called dummy current source 1D or a non-actual operation wiring pattern schematically shown by a dark grid is arranged around an actual operation region 30 in which an actual operation unit current source is arranged. An actual operation area 40 is provided. The non-actual operation area 40 is formed over the entire actual operation area 30, that is, in the example of FIG.
Alternatively, assuming that the maximum length in the short side direction of the actual operation area 30 is A in the upper and lower regions in at least the figure corresponding to the longer side, 0.1A to 2A, preferably 0.5A to 2A.
A, more preferably with a width W in the range of 1.0A to 2.0A.

The non-operating current source 1D constituting the non-operating region 40 has the same configuration as the actual operating unit current source 1, or has the same polarity transistor configuration.

In the example of FIG. 1, in the first unit current source array block 21, the actual operation unit current source 1 is arranged such that the first column from the top in FIG. Then, 2I is arranged, the second row is arranged with one column (ie, one), ie, 1I, and the third and subsequent rows are arranged with 16 columns (ie, 16), ie, 16I. . Also, in the second unit current source array block 22, the actual operation unit current source 1 is similarly arranged in the actual operation 30 in the first row from the top in FIG. And 2
In the row, four columns (that is, four), that is, 4I are arranged, and in the third and subsequent rows, 16 columns (that is, sixteen), that is, 16I are arranged. Also, in the actual operation area 30, the non-operation current sources 1D are respectively shown in rows and columns other than the actual operation unit current source 1 described above, as schematically shown by shaded dark grids. It is arranged and formed.

In the example of FIG. 1, a non-operating region 40 is provided all around the actual operating region 30. In FIG. 1, five rows of non-operating current sources 1D are arranged on the upper side, and Arrangement of ten rows of non-operating current sources 1D was performed.

In this configuration, the range enclosed by the elliptical line a in FIG. 1 is a range showing a deviation from the target value of ± 30% or less, and the range enclosed by the line b is the range from the target value. It was confirmed that the deviation was within ± 20%, and the range surrounded by line c was within ± 10% of the target value intended in the present invention. That is, with the configuration of FIG. 1, the total unit current source 1 used for actual operation can be set to ± 10% or less.

Incidentally, in FIG. 6 as well, the ranges indicated by the elliptical lines b and c are the ranges indicating 20% or less and 10% or less, respectively, and in the configuration of FIG. It can be seen that they deviate from these ranges.

FIG. 2A shows a deviation from a target value with respect to the number of added current sources in the current output type DA converter according to the configuration of the present invention, that is, when each ideal value of the straight line shown in FIG. B shows the deviation of the analog output from the target value. FIG. 6B shows the case where the configuration shown in FIG. 6 is not used according to the present invention. We can see that we can do it.

FIG. 3 shows another example of the current output type D / A converter according to the present invention. The same reference numerals are given to the parts corresponding to those in FIG. 1 and the duplicated explanation will be omitted.
And the second unit current source array blocks 21 and 22 are entirely surrounded, and the non-operating current sources 1D corresponding to the rows or columns of the current sources on the opposite sides of the blocks 21 and 22 are respectively provided on the outer sides thereof. Are arranged in a non-operating current source array block 23a, 23b, 23c, 23d, 23e, 2
In this case, the non-operating area 40 is formed by arranging non-operating current source arrangement blocks 23g, 23h, 23i, and 23j in which the non-operating current sources 1D are similarly arranged at the four corner positions. . Also in this case, the arrangement width in which the non-operation current source arrangement blocks 23a to 23j are arranged is selected to be 0.1A to 2A of the maximum length A on the short side of the actual operation area 30 as described above. .

FIG. 4 shows a current output type D according to the present invention.
In still another example of the A converter, parts corresponding to those in FIG. 1 are denoted by the same reference numerals, and redundant description is omitted. Also in this example, the non-operating region 40 is formed by arranging the non-operating current sources 1D so as to entirely surround the first and second unit current source array blocks 21 and 22. In this example, The non-operation area 4 corresponding to the long side of the actual operation area 30
Only with respect to the width W of 0, the maximum length A of the short side of the actual operation area 30 is selected to be 0.1 A to 2 A. In this case as well, the deviation from the target value within the range surrounded by the curve a is ± 30. %, The deviation from the target value is within ± 20% within the range surrounded by the curve b, and the deviation from the target value is within ± 10% within the range surrounded by the curve c. All the unit current sources 1 fall within ± 10% of the deviation from the target value.

According to the configuration of the present invention described above, in a current output type DA converter in which a large number of unit current sources 1 are arranged, the variation of each current source 1 close to a predetermined target value, that is, ± 10% or less. In the range. This effect is obtained by the above-described non-operation area 40.
Is 0.1 A, which is the maximum length A of the short side of the actual operation area 30.
When the above is achieved, a stable effect occurs, and when it exceeds 2A,
It was found that only an increase in the area did not result in a significant effect. And this width W is 0.5A
When the value is 1.0 or more, the variation can be further reduced and the stability can be further improved.

In each of the above-described examples, the actual operation surrounding area 30 is used.
This is the case where a non-operating current source is arranged around, but for example, by arranging a wiring pattern with the same pattern as the wiring pattern in the actual operating unit current source, almost the same as the case where the non-operating current source is arranged The effect of can also be obtained.

Further, in the above-described example, the configuration is such that the two current source array blocks 21 and 22 are arrayed. However, various configurations such as one block or an array of three or more arrays are possible. Can be modified.

The current output type D applied to the device of the present invention
The unit current source and the non-operating current source of the A-converter are not limited to the example shown in FIG. 5, and it goes without saying that, for example, an n-channel MIS transistor configuration or other various unit current source configurations may be used. Absent.

[0028]

As described above, according to the present invention, in a current output type DA converter in which a large number of unit current sources 1 are arranged, each unit current source 1 is close to a predetermined target value, that is, for example, Since the variation can be kept within a range of ± 10% or less, for example, when used in a current output type D / A converter of a video device, it is possible to avoid color unevenness of a video, variation in brightness, generation of a stripe pattern, and the like.
A high-quality video device can be configured.

Further, by improving the variation of the analog output, the provision of a correction circuit for the analog output can be avoided. Alternatively, the correction circuit can be simplified. By avoiding the correction circuit, the structure can be simplified, the cost can be reduced, and the power consumption can be reduced.

Incidentally, in the case of the conventional structure, since the analog output greatly differs for each current output type D / A converter, it is actually difficult to perform correction by the correction circuit. Manufacturing yield is reduced. On the other hand, according to the configuration of the present invention,
Since a stable current output type DA converter can be obtained, the yield can be improved, and the cost can be reduced.

[Brief description of the drawings]

FIG. 1 is a layout diagram of an example of a current output type DA converter according to the present invention.

2A is a diagram showing a deviation of an analog output of a current output type DA converter according to the present invention from a target value, and FIG. 2B is a diagram showing a deviation of an analog output of a conventional current output type DA converter from a target value. It is.

FIG. 3 is a layout diagram of another example of a current output type DA converter according to the present invention.

FIG. 4 is a layout diagram of still another example of the current output type DA converter according to the present invention.

FIG. 5 is a circuit diagram of an example of a unit power source in a current output type DA converter.

FIG. 6 is a layout diagram of a conventional current output type DA converter.

FIG. 7 is an explanatory diagram of a relationship between an analog output current value and the number of current sources.

[Explanation of symbols]

1 unit current source, 1D non-operating current source, 2 ...
A semiconductor chip, 21, 101 ... a first unit current source array block, 22, 102 ... a second unit current source array block, 23 (23a to 23j) ... a non-operating current source array block, 30 ... actual operation area, 40 ... non-actual operation area

Continued on the front page (72) Inventor Katsuya Abeda 1883-43 Tsukuha-cho, Isahaya-shi, Nagasaki F-term (reference) in Sony Nagasaki Corporation 5F038 BH19 CA03 DF03 DF05 EZ20 5J022 AB06 BA06 CB06 CF04 CG01

Claims (6)

[Claims] A current output type DA converter having a plurality of unit current source arrays in each of which a plurality of unit current sources respectively generating unit electric quantities are arranged in two directions crossing each other in a common semiconductor chip. At least one of a non-actual operation current source not used for actual operation and a non-actual operation wiring pattern not used for actual operation is provided around the actual operation area where the actual operation unit current source used for actual operation is arranged. Is provided, and the width W of at least a portion of the non-actual operation region corresponding to the opposite long side of the actual operation region is a short side of the arrangement region of the actual operation unit current source. For the maximum length A in the direction,
A current output type DA converter having a width W of 0.1 A to 2 A. 2. The current output type DA converter according to claim 1, wherein the width W is arranged with a width of 0.5 A to 2 A with respect to the maximum length A in the short side direction. . 3. The current output type DA converter according to claim 1, wherein the width W is arranged with a width of 1.0 A to 2 A with respect to the maximum length A in the short side direction. . 4. The current output type D / A converter according to claim 1, wherein the non-actual operation current source has the same structure as the actual operation unit current source. 5. The current output type according to claim 1, wherein the transistor constituting the non-actual operation current source is constituted by a transistor having the same polarity as the transistor constituting the actual operation unit current source. DA converter. 6. The current output type D / A converter according to claim 1, wherein the non-actual operation wiring pattern is the same pattern as a wiring pattern of an actual operation unit current source.