JP2002118498A - Method and apparatus for synchronous acquisition - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten a time required for synchronous acquisition a code with higher accuracy than that in prior art to synchronously acquire a diffusion signal and a code row. SOLUTION: A matched filter 1 has the same diffusion code as that at a transmission side set as its tap coefficient. The filter 1 inputs a reception signal spread spectrum by the diffusion signal, and repeatedly detects the correlation between the reception signal and the code for a plurality of periods of the code. A maximum value selector 4 detects offset timing for giving the maximum correlation value for each period of the code. An offset timing comparator 5 decides that there is a synchronizing point at the offset timing when a prescribed number of coincidences of the offset timing output from the selector 4, and outputs a signal indicating the synchronous acquisition.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and an apparatus for synchronizing a received signal spread spectrum by a spread code and a spread code generated on the receiving side, and a code sequence having a predetermined code pattern having a periodicity. The present invention relates to a synchronization acquisition method and apparatus for synchronizing a periodically inserted reception signal with the same code string generated on the reception side.

[0002]

2. Description of the Related Art In a direct spread spectrum communication system (DS-SS) receiver used in mobile communication and the like, a received signal spread with a spreading code and a spreading code generated on a receiving side are used. Must be synchronized (synchronization acquisition).
FIG. 10 shows a direct spread spectrum spread communication system (DS-S
It is a block diagram in S) which shows the 1st example of the conventional synchronous acquisition apparatus. 1 is a matched filter
er), which is correlated with the spread spectrum received signal. The matched filter 1 uses the same spreading code as the transmitting-side spreading code as a tap coefficient. As the tap coefficients, codes of +1, −1 are generally used corresponding to the spreading codes of 1, 0. 41 is a maximum value selection and threshold value comparison unit. The received spread spectrum signal r (t) is a signal obtained by quadrature demodulating a received digital modulation signal and frequency-converting it into a baseband band and passing through a band-pass filter. It is input to the matched filter 1 as an output.

FIG. 11 is a first explanatory diagram of the synchronization acquisition method in the prior art shown in FIG. The length (the number of taps) of the matched filter 1 is equal to the spreading code period. As the spreading code, for example, a binary PN (Pseudo Noise) code is used, and the transmission signal is modulated by the PN code, for example, BP.
It is SK modulated. The output of the matched filter 1 is the received spectrum spread signal over one cycle of the spread code.
The correlation value between r (t) and the PN code is output to the maximum value selection and threshold value comparison unit 41 for each chip cycle or for each cycle in which the chip cycle is oversampled.

A maximum value selection / threshold comparing section 41 observes the correlation values output from the matched filter 1, and extracts a code phase offset timing having the maximum value from the correlation values. When the maximum value exceeds a predetermined threshold, the offset timing is determined as a synchronization point, and a signal indicating synchronization acquisition is output. If the threshold value is not exceeded, the correlation value output from the matched filter 1 is observed again for one cycle of the spreading code.
Repeat that.

In a fading environment, if the threshold is fixed in advance, it is impossible to cope with fluctuations in the received power level. Therefore, if the adaptive control threshold during operation, as an example, an average value of the output of the matched filter 1 during the observation period, there is a method of the gamma ₁ multiplied by the coefficient gamma ₀ on the average value with a threshold. However, γ ₀ determines an optimum value in advance by simulation. Alternatively, a matched filter using a code orthogonal to the spreading code as a coefficient is separately prepared, and a coefficient γ ₂
There is a method of a threshold gamma ₃ multiplied by. Also in this case, γ ₂ is fixedly set in advance. In addition, the output of the matched filter 1 may be subjected to synchronous addition (also referred to as in-phase addition or ensemble averaging) with the period of the spreading code as one unit over the time of a plurality of periods of the spreading code. Since the time averaging process of the correlation value is performed, the influence of the correlation value due to fading distortion and noise is reduced, and the SN ratio is improved.

In the synchronization acquisition mode, when the threshold value is exceeded, the process shifts to the next confirmation mode. When the threshold value is not exceeded, the synchronization acquisition mode is restarted. In the confirmation mode, a correlation output is obtained by multiplying and integrating the received spread spectrum signal and the spread code on the receiver side by the synchronization timing determined in the acquisition mode by the sliding correlator. The integration time is set to one or several periods when the spreading code is a short code, and is set to a predetermined fraction of one period when the spreading code is a long code. This correlation detection is repeated a plurality of times. If the number of times the correlation value exceeds a certain threshold value is equal to or more than a predetermined number, the synchronization point is determined to be correct and the mode shifts to a normal reception operation mode (operation mode). If not, start over from capture mode. The threshold in this confirmation mode is also made variable according to the power level of the received signal.

FIG. 12 is a second explanatory diagram of the synchronization acquisition method in the prior art shown in FIG. The illustrated example shows a synchronization acquisition method suitable when the length of the matched filter 1 is shorter than the period of the spreading code. In this case, a part of the spread code is used as a coefficient of the matched filter 1. In the illustrated example, the code of the number of chips corresponding to the length of the matched filter is extracted from the rear part of the spread code, but may be extracted anywhere. In this case as well, the output of the matched filter 1 is observed in units of a chip period or a period obtained by oversampling the chip period over one period of the spreading code, as in the synchronization acquisition method shown in FIG. Capture can be performed.

FIG. 13 is a block diagram showing a second example of a conventional synchronous acquisition device using a matched filter in direct spread spectrum communication (DS-SS). In the figure,
21 _{0 to} 21 _J-1 are a plurality of matched filters,
A received spread spectrum signal r (t), which has been spread spectrum by a spread code, is input in common, and correlation detection is performed in parallel. Reference numeral 51 denotes a maximum value selection and threshold value comparison unit. This prior art employs a plurality of matched filters 21 ₀
This is a method of selecting the maximum value from ２１21 _J−1 , which is suitable for detecting a correlation with a long code spreading code, and can shorten the synchronization acquisition time by a factor of the number of divisions (1 / J).

FIG. 14 is a second explanatory diagram of the synchronization acquisition method in the prior art shown in FIG. The spreading code is equally divided into the number corresponding to the matched filter 21 ₀ ~21 _J-1 number (J). Equal split the J each divided spreading codes, respectively, and matched filter 21 ₀ through 21 _J-1 factor. Further portion of each divided spreading code at this time, is taken out in the same way by the same length, or each of them as coefficients of the matched filter 21 ₀ ~21 _J-1. The length of 21 _{0 to} 21 _J-1 of each matched filter is further reduced. Figure 14 is a matched filter 21 _0-21 length of _J-1 indicates a shorter than divided spreading codes.

In the case of this synchronization acquisition method, the outputs of all the matched filters 21 _{0 to} 21 _J-1 are observed over a period of 1 / J of the spreading code period, at every chip period or every period in which the chip period is oversampled. And from among them,
The matched filter with the maximum value and its offset timing are extracted. And if it exceeds the threshold,
The divided spreading code corresponding to the matched filter having the maximum value determines that there is a synchronization point at the offset timing of the matched filter having the maximum correlation value, and outputs a signal indicating synchronization acquisition. In the illustrated example, the output of the matched filter 21 _1, the maximum value is detected and exceeds a threshold value. Note that synchronous addition can also be performed. For example, stores the total output over time of 1 / J of the spreading code period of the matched filter 21 ₀ in the memory,
In the time of the next spreading code period of 1 / J, taking into account the proceeds of the received signal, the value stored in the memory described above, adds synchronization output of the next matched filter 21 _1. In the next spreading code period time of 1 / J of the subject of the synchronous addition is further an output of the following matched filter 21 _2.

In a communication system such as mobile communication,
In addition to the above-described acquisition of the spread spectrum code, there is a type in which a code sequence having a predetermined code pattern is periodically inserted at a predetermined time period (frame period) and transmitted.
That is, a known pattern to be used for initial synchronization acquisition or channel estimation during communication (path estimation) is periodically inserted as a preamble. The above-described code synchronization acquisition technique can be applied to synchronous acquisition of a code string having such a predetermined code pattern. Note that the code string having the above-described predetermined code pattern is not always a PN code.

FIG. 15 is an explanatory diagram showing a conventional synchronous acquisition method using a matched filter in a communication system in which preambles are periodically inserted. In this case, in order to detect the above-mentioned known code pattern and capture the frame synchronously, a configuration similar to the spread code shown in FIG. 10 can be used. In this case, a code string having a predetermined code pattern may be used as a coefficient of the matched filter 1 in FIG. The illustrated example is an example in which a code string having a predetermined code pattern is a preamble, and frame synchronization is captured using a matched filter having the code string of the preamble as a coefficient.

In any of the above-mentioned prior arts,
A threshold is set for the level of the correlation value, and the maximum value exceeding the threshold is determined.
It is determined that there is a synchronization point at the offset timing to be taken.
You. Since this threshold follows the fading environment,
The average value of the matched filter output at
The average value of the power level₀Multiplied γ₁Or
Is a matched field whose coefficient is a code orthogonal to the spreading code.
The average value of the output of the filter is γ _TwoMultiplied γ_Three, Refer to the threshold
Had been decided. However, the coefficient γ₀, Γ_TwoBeforehand
The value must be determined by simulation and fixed.
No. However, the coefficient γ₀, Γ_TwoIs the signal-to-noise ratio at that time
(SNR) changes the optimum value. Therefore, increase the performance
To obtain the coefficient γ by the signal-to-noise ratio at that time₀, Γ_Two
Should be changed. However, the signal-to-noise ratio estimation
In order to be able to
So this is not possible. Therefore, the coefficient γ₀, Γ_TwoIs
Relatively characteristic over the expected signal-to-noise ratio
A compromise must be made to choose the best one. for that reason
Even if the threshold is set, the detection of the offset timing does not
There is a problem that the sound is weak.

In the synchronization acquisition mode, when the threshold value is exceeded, the process shifts to the next confirmation mode. When the threshold value is not exceeded, the synchronization acquisition mode is restarted. If the setting of the threshold value is too low, the mode shifts to the next confirmation mode, and then the synchronization point is found to be wrong and the synchronization acquisition mode is restarted, so that the overall synchronization acquisition time becomes longer. Conversely, if the threshold value is set too high, the maximum value at that time is output as the synchronization point if the number of times of re-synchronization acquisition reaches the limit, even if the threshold value is not exceeded. That is, this is the same as when no threshold is provided. There is no guarantee that the maximum value at this time is a correct synchronization point. If not, as in the case described above, the mode shifts to the confirmation mode, and the synchronization acquisition mode is restarted.

As described above, in the prior art, it is necessary to set a threshold value for the output level of the correlation value in order to detect the maximum value. However, in practice, it is difficult to set the threshold value optimally, so that the probability of erroneous acquisition of synchronization due to noise or the like is high. On the other hand, the synchronous addition described above is effective as a measure for substantially lowering the signal-to-noise ratio.
When the synchronous addition is performed over a plurality of cycles, the peak waveform of the maximum value becomes steep. However, if the synchronization addition is continued for too long, the synchronization acquisition time increases. Then, not only does it take time until the operation mode is set, but also in mobile communication, the propagation environment changes. That is, the optimum path of the multipath changes or the optimum base station changes. In such a situation, the data that has been synchronously added up to that point is not only wasted, but rather harmful to the new environment.

[0016]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and has high accuracy in synchronously acquiring a spread spectrum code or a code string having a predetermined code pattern. It is an object of the present invention to provide a synchronization acquisition method and apparatus capable of reducing the time required for acquisition.

[0017]

According to the first aspect of the present invention, in the synchronization acquisition method, correlation detection between a part or all of a spread code and a received signal spectrum-spread by the spread code is performed. It repeats over a plurality of cycles of the spreading code, detects an offset timing that gives the maximum correlation value in each cycle, and determines that there is a synchronization point when the offset timings match a predetermined number. Therefore, it is possible to acquire the spread spectrum code synchronously with high accuracy by using the information in the time axis direction of the correlation output having less variation than the level variation of the correlation output. Since the probability of returning to the capture mode from the confirmation mode or the like is reduced, the time required for synchronous capture can be reduced as a result.

According to a second aspect of the present invention, in the synchronization acquisition method, the detection of the correlation between a part or all of the spread code and the received signal spectrum-spread by the spread code is performed by a plurality of spread codes. The synchronous addition is performed over a period, and the synchronous addition is repeated. In each of the synchronous additions, an offset timing that gives a maximum correlation value is detected. Things. Therefore, it is possible to acquire the spread spectrum code synchronously with high accuracy by using the information in the time axis direction of the correlation output having less variation than the level variation of the correlation output. As a result, it is possible to shorten the time required for synchronously acquiring the spread code. Since the signal-to-noise ratio is improved by the synchronous addition,
Furthermore, synchronization acquisition can be performed with high accuracy.

According to a third aspect of the present invention, in the synchronization acquisition method, a part or all of each of the divided spread codes obtained by dividing the spread code by J, and the reception spread by the spread code. Correlation detection with signal
It repeats over a period that is a multiple of 1 / J of the period of the spread code, and detects a part or all of the divided spread code that gives the maximum correlation value and an offset timing in each of the divided periods. Then, some or all of the divided spreading codes that provide the maximum correlation value change with the progress of the received signal, and when there is a predetermined number of coincidences of the offset timing, there is a synchronization point. It is to judge. Therefore, it is possible to acquire the spread spectrum code synchronously with high accuracy by using the information in the time axis direction of the correlation output having less variation than the level variation of the correlation output. As a result, it is possible to shorten the time required for synchronously acquiring the spread code. Since the code for synchronous detection is divided, the code length for correlation detection is reduced. As a result, the number of taps of the matched filter used for correlation detection can be reduced, and the processing load and circuit scale are reduced.

According to a fourth aspect of the present invention, in the synchronization acquisition method, a part or all of the divided spread codes obtained by dividing the spread code by J and the reception signal spread spectrum by the spread code. Correlation detection with signal
It is performed by synchronous addition over a period that is a multiple of 1 / J of the period of the spread code, and the synchronous addition is repeated. In each of the synchronous additions, a part of the divided spread code that gives the maximum correlation value or All the codes and the offset timing are detected, and some or all of the divided spreading codes that give the maximum correlation value change with the progress of the received signal, and the coincidence of the offset timing is a predetermined number. At some point, it is determined that there is a synchronization point. Therefore, using the information in the time axis direction of the correlation output having less variation than the level variation of the correlation output,
Synchronous acquisition of a spread spectrum code can be performed with high accuracy. As a result, it is possible to shorten the time required for synchronously acquiring the spread code. Since the code for synchronous detection is divided, the code length for correlation detection is reduced. Therefore, the processing load and the circuit scale are reduced. Since the signal-to-noise ratio is improved by the synchronous addition, synchronous acquisition can be performed with higher accuracy.

According to a fifth aspect of the present invention, in the synchronous acquisition method, a part or all of the code sequence having a predetermined code pattern and the code sequence having the predetermined code pattern are defined in units of frames. The correlation detection with the periodically inserted received signal is repeated over a plurality of periods of the frame, and in each frame, an offset timing that gives a maximum correlation value is detected. , It is determined that there is a synchronization point. Therefore, it is possible to acquire a code sequence having a predetermined code pattern with high accuracy by using the information in the time axis direction of the correlation output having less variation than the level variation of the correlation output. As a result, it is possible to reduce the time required for synchronous acquisition of a code string having a predetermined code pattern.

According to a sixth aspect of the present invention, in the synchronous acquisition method, a part or all of the code sequence having a predetermined code pattern and the code sequence having the predetermined code pattern are defined in units of frames. The correlation detection with the periodically inserted received signal is performed by synchronous addition over a plurality of periods of the frame, and the synchronous addition is repeated,
In each of the synchronous additions, an offset timing that gives the maximum correlation value is detected, and when there is a predetermined number of coincidences of the offset timings, it is determined that there is a synchronization point. Therefore, it is possible to acquire a code sequence having a predetermined code pattern with high accuracy by using the information in the time axis direction of the correlation output having less variation than the level variation of the correlation output. As a result, it is possible to reduce the time required for synchronous acquisition of a code string having a predetermined code pattern. Since the signal-to-noise ratio is improved by the synchronous addition, synchronous acquisition can be performed with higher accuracy.

According to a seventh aspect of the present invention, there is provided a synchronization acquisition apparatus having a correlation detector for inputting a received signal spectrum-spread by a spread code, and a determiner for receiving an output of the correlation detector as an input. In the correlation detector, a part or all of the spread code is set, and the correlation detection between the received signal and a part or all of the spread code is performed over a plurality of cycles of the spread code. The determiner repeatedly detects an offset timing that gives the maximum correlation value in each of the periods, and determines that there is a synchronization point when the offset timings match a predetermined number. Therefore, the invention described in claim 1 can be realized as an apparatus, and the same operation as the invention described in claim 1 is achieved.

According to an eighth aspect of the present invention, there is provided a synchronization acquisition apparatus having a correlation detector for inputting a received signal spectrum-spread by a spread code, and a determiner for receiving an output of the correlation detector as an input. In the correlation detector, a part or all of the spread code is set, and the correlation detection is performed between the received signal and a part or all of the spread code. Synchronous addition is repeated over a plurality of cycles of the spreading code, and in each of the synchronous additions, an offset timing that gives a maximum correlation value is detected, and when there is a predetermined number of coincidences of the offset timing, it is determined that there is a synchronization point. is there.
Therefore, the invention described in claim 2 can be realized as an apparatus, and the same operation as the invention described in claim 2 is achieved.

According to the ninth aspect of the present invention, there is provided a synchronization apparatus comprising: a plurality of correlation detectors for inputting a received signal spectrum-spread by a spread code; and a determiner for receiving outputs of the plurality of correlation detectors. In the acquisition device, each of the correlation detectors is configured to set a part or all of a divided spread code obtained by dividing the spread code by J, and to set one of the received signal and one of the divided spread codes. The detection of correlation with all or all the codes is performed by dividing the period of the spread code by 1 / J.
Repeated over a plurality of periods of the division period, the determiner compares the correlation values of the correlation detectors in each of the division periods, and a part or all of the divided spread code that gives the maximum correlation value When the code and the offset timing are specified, part or all of the divided spreading codes that give the maximum correlation value change together with the received signal, and when there is a predetermined number of coincidences of the offset timing. , It is determined that there is a synchronization point. Therefore, the invention described in claim 3 can be realized as an apparatus, and the same operation as the invention described in claim 3 is achieved.

According to a tenth aspect of the present invention, there is provided a synchronization apparatus comprising: a plurality of correlation detectors for inputting a received signal spectrum-spread by a spread code; and a determination unit for receiving outputs of the plurality of correlation detectors. A capture device,
In each of the correlation detectors, a part or all of each of the divided spread codes obtained by dividing the spread code by J is set, and the received signal and a code of some or all of each of the divided spread codes are set. The determination unit repeats synchronous addition over a period that is a multiple of 1 / J of the period of the spreading code, and in each synchronous addition, the correlation value of each correlation detector By comparing the partial spreading code that gives the maximum correlation value and all or part of the code and the offset timing, the partial spreading code that gives the maximum correlation value is part or all of the code It is determined that there is a synchronization point when it changes with the received signal and when there is a predetermined number of matches of the offset timing. Therefore, the invention described in claim 4 can be realized as an apparatus, and the same operation as that of the invention described in claim 4 is achieved.

[0027] According to the eleventh aspect of the present invention, a correlation detector for inputting a received signal in which a code sequence having a predetermined code pattern is periodically inserted in units of frames, and an output of the correlation detector is provided. A synchronous acquisition device having a determiner as an input, wherein the correlation detector is configured such that a part or all of a code sequence having the predetermined code pattern is set, and the reception signal and the predetermined code are set. Repeat the correlation detection with a part or all of the code string having a pattern over a plurality of cycles of the frame,
The determiner detects an offset timing that gives a maximum correlation value in each of the frames, and determines that there is a synchronization point when the offset timings match a predetermined number. Therefore, the invention described in claim 5 can be realized as an apparatus, and the same operation as that of the invention described in claim 5 is achieved.

According to the twelfth aspect of the present invention, a correlation detector for inputting a received signal in which a code sequence having a predetermined code pattern is periodically inserted in units of frames, and an output of the correlation detector is provided. A synchronous acquisition device having a determiner as an input, wherein the correlation detector is configured such that a part or all of a code sequence having the predetermined code pattern is set, and the reception signal and the predetermined code are set. The correlation detector detects a correlation with a part or all of a code string having a pattern, and the determiner repeats synchronous addition over a plurality of cycles of the frame, and in each of the synchronous additions, an offset timing that gives a maximum correlation value. Is detected, and when there is a predetermined number of matches of the offset timing, it is determined that there is a synchronization point. Therefore,
The invention according to claim 6 can be realized as an apparatus, and has the same operation as the invention according to claim 6.

[0029]

FIG. 1 is a block diagram of a first embodiment of the present invention. In the figure, the same parts as those in FIG. 10 are denoted by the same reference numerals, and description thereof will be omitted. Reference numeral 3 denotes a determiner having a maximum value selecting unit 4 and an offset timing comparing unit 5. In the matched filter 1, the same spreading code as that of the transmitting side is set as the tap coefficient. A received signal subjected to spectrum spreading by a spread code is input, and correlation detection between the received signal and the spread code is repeated over a plurality of cycles of the spread code. The maximum value selector 4 detects an offset timing that gives the maximum correlation value in each cycle of the spreading code. When a predetermined number of offset timing matches exist, the offset timing comparing unit 5 determines that there is a synchronization point at the offset timing, and outputs a signal indicating that synchronization has been captured. The above-mentioned predetermined number is, for example, two times, and when the offset timing coincides twice, it is determined that there is a synchronization point at the offset timing. Alternatively, the number of cycles for continuously observing the correlation value is also set, and during that time, when the number of times the offset timings match is equal to or greater than a predetermined number,
It may be determined that there is a synchronization point at the offset timing.

FIG. 2 is an explanatory diagram showing a specific example of the synchronization acquisition method in the embodiment shown in FIG. The matched filter 1 outputs a correlation value for each chip cycle or every cycle in which the chip cycle is oversampled. The maximum value detector 4 observes the output of the matched filter over one cycle of the spread code, for example, twice. The offset timing comparing section 5 compares the offset timing at which the output of the matched filter 1 becomes maximum at each time. The comparison of each offset timing is performed based on the phase (code phase offset # 0, # 1) from the start of observation in each cycle to the offset timing. If they match, it is determined that synchronization has been achieved with the offset timing as the synchronization point. Compared to one maximum value selection,
More reliable judgment is possible.

If they do not match, the trust cannot be established.
Start over. That is, the output of the matched filter is observed again over one cycle of the spreading code, the offset timing is compared with the previous offset timing, and if they match, it is determined that synchronization has been achieved. If they do not match, the matched filter output is again set to 1
Observation is performed over a period and the same judgment is made. It is desirable to limit the number of times of correlation detection again in advance. When it is determined that synchronization has been achieved, the mode shifts to the next confirmation mode as in the related art. However, in this synchronization acquisition mode, if the synchronization detection error rate is sufficiently small, the operation mode may be immediately shifted to the operation mode.

The comparison of the offset timing described above is as follows.
In that correlation detection is performed over a plurality of observation periods, there is one common to the conventional synchronous addition. However, in the conventional synchronous addition, the noise component is reduced by averaging the output level of the correlation value, that is, the power level of the correlation value. On the other hand, the semi-invention has found that the fluctuation of the correlation output in the time axis direction is small, and based on this finding,
The offset timing is compared. As a result of the comparison, if the offset timings match a plurality of times, it is determined that the offset timing has a correct synchronization point.

In the above description, all the chips of the spread code are used as the tap coefficients of the matched filter 1.
However, as described with reference to FIG. 12, a partial correlation may be detected. In this case, as a tap coefficient of the matched filter 1, a part of a spread code, for example, a rear code sequence may be used. .

FIG. 3 is a block diagram of a second embodiment of the present invention. In the figure, the same parts as those in FIG. 10 and FIG. The determiner 12 has a synchronous addition memory 11, synchronously adds the output of the matched filter 1 and outputs the result to the maximum value selection unit 4. This embodiment is obtained by applying the synchronous addition technique to the first embodiment shown in FIG. The synchronous addition memory 11 performs synchronous addition over a plurality of periods of the spread code, and repeats this synchronous addition. The maximum value selector 4 detects an offset timing that gives the maximum correlation value from the correlation values stored in the synchronous addition memory for each synchronous addition. The offset timing comparing unit 5 compares the offset timings output by the maximum value selecting unit 4, and when there is a predetermined number of coincidences of the above-described offset timings, determines that there is a synchronization point at the offset timings, and acquires synchronization. And outputs a signal indicating that the operation has been performed.

More specifically, the synchronous addition memory 11
In the first cycle of the spreading code, the matched filter 1
Stores the correlation value output for each unit cycle (chip cycle or oversampled cycle), and stores the correlation value of the next spread code.
In the cycle, the correlation value newly input from the matched filter 1 is added to the correlation value stored for each unit cycle for each unit cycle, and is stored again at the same position (address) for each unit cycle. is there. Such a storage operation is performed over a plurality of predetermined cycles, and the result is output to the maximum value selection unit 4 to clear the storage contents and perform the next synchronous addition.

In each of the synchronous additions, the number of periods of the spread code to be synchronously added is determined in advance, but need not always be set to the same predetermined number, and may be different each time. Further, the above-mentioned predetermined number is not limited to two consecutive times, and may be two or more consecutive times. Also, the synchronous addition is performed a predetermined number of B times, and during the B times, the offset timing is A times or more. If so, it may be determined that there is a synchronization point. Also in this embodiment, the tap coefficients of the matched filter 1 include a part of the spread code,
For example, partial correlation detection may be performed using the code sequence at the rear.

FIG. 4 is a block diagram of a third embodiment of the present invention. In the figure, the same parts as those in FIG. Reference numeral 22 denotes a determiner, which includes a maximum value selecting unit 23, a divided spreading code and an offset timing comparing unit 24. In this embodiment, as in the conventional technique described with reference to FIG. 13, correlation detection is performed using a divided spreading code. Each of the matched filters 21 _{0 to} 21 _J-1 is set as a tap coefficient using each of the equal-length divided spreading codes obtained by equally dividing the spreading code into J pieces. A signal is input, and a correlation between a received signal and each divided spreading code is detected in a unit cycle (a chip cycle or an oversampled chip cycle) over a cycle that is a multiple of 1 / J of the spreading code cycle. It is repeated in parallel for each cycle). The maximum value selection unit 23 sets each matched filter 21 _{0 to} 21 _{J-1 for} each unit period in each division period.
Are compared, and one matched filter that outputs the maximum correlation value and the offset timing are specified.

The split spreading code and offset timing comparing section 24 specifies a split spreading code that outputs the maximum correlation value from the tap coefficients of the specific matched filter output by the maximum value selecting section 23 for each splitting period. . At the same time, when the specified matched filter and the specified divided spreading code move with the progress of the received signal and the offset timings match, it is determined that they match, and the match is determined by a predetermined number. At some point, it is determined that there is a synchronization point.

FIG. 5 is an explanatory diagram showing a specific example of the synchronization acquisition method in the embodiment shown in FIG. When the matched filters 21 _{0 to} 21 _J−1 detect the correlation over a period of 1 / J of the spreading code period, a synchronization point synchronized with the spreading code is detected. The maximum value selector 23, the first observation period (1 / J period of the spread code), and observing the output of all of the matched filter 21 ₀ ~21 _J-1, the offset timing value from the is maximum Take out. In the illustrated example, in the matched filter 21 ₀ offset timing (code phase offset # 0), it is assumed that the maximum value is found. Over the next observation period, again, observing the output of all of the matched filter 21 ₀ ~21 _J-1, takes out the offset timing value from its maximum. In the illustrated example, in the matched filter 21 ₁ offset timing (code phase offset # 1), it is assumed that the maximum value is found.

One observation period (1 / J cycle of spreading code)
Each time is passed, the input received signal is spread by a code following the division period, so that the original spread code is equally divided and created from the 0th to the J-th.
In the first plurality of divided spreading codes, the correlation value with the next divided spreading code becomes the maximum. A plurality of divided spreading codes from the 0 th to the J-1 th, respectively, so assigned as coefficients of the matched filter 21 ₀ through 21 _J-1 in order, when they are properly synchronized, 1
Every time one observation period (1 / J cycle of the spreading code) elapses, the order of the matched filter that outputs the maximum correlation value also advances by one.

Therefore, the split spreading code and offset timing comparing section 24 determines not only the coincidence of the offset timings but also the order of the matched filters that output the maximum value, in other words, the order of the split spreading codes that output the maximum value. , Are consecutive, and if these orders are consecutive, it is determined that there is a synchronization point. In the illustrated example, the second observation interval of the correlation detection, since the matched filter 21 ₁ is outputting the maximum value, the order is continuous. Therefore, if the offset timings match (the code phase offsets # 0 and # 1 match) during the two observation periods of correlation detection, it is determined that synchronization has been acquired.

The above-described offset timing is an offset timing based on the phase of the divided spreading code.
This is a value that is repeated in the division cycle. Therefore, in other words, the offset timing based on the phase of the original spreading code (indicated by a value repeated in the spreading cycle), in other words, the offset timing obtained in each observation period depends on the progress of the input received signal. When it is changing, it is equivalent to determining that synchronization has been acquired.

In this embodiment, the same partial correlation as in the first embodiment may be performed. As the tap coefficients of each matched filter 21 ₀ ~21 _J-1, a portion of each divided spreading codes, for example, a rear portion of the code sequence of each divided spreading codes. In this case, the lengths of the code sequences extracted from the respective divided spreading codes are made the same. In addition, the extraction method from each divided spreading code is the same. If the extraction method is made different, for example, if the rear code sequence is extracted from one divided spread code and the former code sequence is extracted from another divided spread code, the order between the extracted code sequences The coincidence of the offset timings may be determined according to the phase difference.

FIG. 6 is a block diagram of a fourth embodiment of the present invention. In the figure, the same parts as those in FIGS. 13 and 4 are denoted by the same reference numerals, and description thereof will be omitted. 31 is a decision unit, 3
Reference numeral 2 denotes a switching selector, and reference numerals 33 _{0 to} 33 _J-1 denote synchronous addition memories. This embodiment is obtained by applying the synchronous addition technique to the third embodiment described with reference to FIGS. Matched filter 21 ₀ through 21 _J-1, respectively, are set to the divided spreading codes obtained a spreading code and J divided as the tap coefficients. A received signal that has been spectrum-spread by a spreading code is input, and correlation detection between the received signal and each of the divided spreading codes is performed in a unit cycle (over a unit period (1 / J of the spreading code cycle) over a plurality of observation periods). It is repeatedly performed in parallel for each chip cycle or a cycle in which it is oversampled.

The switching selecting portion 32, in order to perform the synchronous addition, each time a divided period mentioned above elapses, synchronization addition memory 33 ₀ ~ 33 _J-1 is ₀ matched filter 21 supplied with the correlation value ~ Switch 21 _J-1 to the next order. That is, each time the division cycle elapses,
It is spread by a code following the division period. Therefore, every time the above-described division period elapses, the output of the matched filter using the code following the code in time as a tap coefficient is added to the output of the original matched filter stored in the synchronous addition memory to obtain the correlation. Remember the value.

This will be described more specifically. Similarly to the third embodiment, the 0th to J-1st divided spreading codes created by dividing the original spreading code are
It is assumed that tap coefficients of the matched filters 21 _{0 to} 21 _J−1 are sequentially assigned. In the first cycle of the observation period, the synchronous addition memory 33 ₀ ~33 _J-1, respectively, receives the output of the matched filter 21 ₀ ~21 _J-1. In the next cycle, the synchronous addition memories 33 _{0 to} 33 _J-1
Inputs the output of the matched filter _{21 1 ~21 J-1, 21} 0. In the next cycle, the synchronous addition memory 33
_{0 to} 33 _J-1 are matched filters 212 to 2 respectively.
Input the outputs of 1 _J−1 , 21 ₀ , 21 ₁ . In this way, the switching selection unit 32 is added together with the number of times of synchronous addition.
Switches the input destination to the next matched filter.

The synchronous addition memories 33 _{0 to} 33 _J-1 perform synchronous addition over a plurality of multiples in units of divisional periods as the received signal progresses, and the synchronous addition itself is repeated a plurality of times. The maximum value selecting section 23 sets the synchronous addition memory 33 at the end of each single synchronous addition.
By comparing the correlation values stored in _{0 to} 33 _J−1 , a specific synchronous addition memory that gives the maximum correlation value and an offset timing are detected. The division spreading code and offset timing comparison unit 24 outputs a value from a specific matched filter output by the maximum value selection unit 23 every time the synchronization addition is completed.
The split spreading code that outputs the maximum correlation value is specified, and its offset timing is stored. For each synchronous addition, the specified matched filter, that is, the specified divided spreading code changes with the progress of the received signal,
When the offset timings match, it is determined that they match. Further, when there is a predetermined number of matches of the offset timing, it is determined that there is a synchronization point.

Here, the above-mentioned predetermined number is equal to the above-mentioned second number.
Similarly to the above embodiment, the present invention is not limited to two consecutive times, and may be two or more consecutive times, and if the offset timing matches A times or more during B times of synchronous addition,
It may be determined that there is a synchronization point. However, at this time, the fact that the synchronous addition memory that outputs the maximum value moves with the progress of the received signal is also added to the determination condition. In addition, in each of the synchronous additions, the number of the cycles to be synchronously added may be arbitrary, and the number of the cycles to be synchronously added may be different for each synchronous addition. In this embodiment, the same partial correlation as in the third embodiment may be performed. In the above description, the switching selection unit 32 is provided to switch the output destinations of the matched filters 21 _{0 to} 21 _J−1 . However, without providing the switching selection unit 32, the matched filter 21 ₀
The tap coefficients of ２１21 _J−1 may be switched.

FIG. 7 is an explanatory diagram schematically showing the operation of the embodiment shown in FIG. The spread code is equally divided into J = 4, and the divided spread codes are G ₀ , G ₁ , G ₂ , and G _3, and each divided spread code is composed of codes having the same number of chips. Synchronous addition is performed over a period twice as long as the division period, and offset timings in the two synchronous additions are compared. The upper row shows the code sequence of the received spread spectrum signals arranged so that the time progresses to the right. To simplify the explanation, the transmission information data is +
Since it is 1, the spread code appears as it is in the received spread spectrum code. 4 blocks the lower represents the matched filter 21 _{0-21 3} schematically, divided spreading codes described above is used as the coefficient of each matched filter 21 _{0-21 3.}

[0050] This figure with the progress of the observation period, while the matched filter 21 _{0-21 3} moves to the right,
7 schematically shows a state in which a code sequence of a received spread spectrum signal immediately above is taken in and a correlation detection operation is performed. While the observation period elapses a quarter period of the spreading code period,
One division spread code G ₀ ~G ₃ a respective matched filter 21 _{0-21 3} coefficients, there is a timing at which the received spread spectrum signal matches. In the first cycle of the observation period, the received signal and the divided spreading code G ₁ is the initial phase from the code phase offset phi ₀ elapsed offset timing (hereinafter, simply referred to as the offset timing phi ₀₎ coincides with. At this time, among the matched filters 21 _{0 to} 21 ₃ , the matched filter 2 having the divided spreading code G ₁ as a coefficient
Correlation value output of 1 ₁ is maximized. The output of the matched filter 21 ₁ (indicated as MF1 in FIG. 7) through the switching selection portion 32, a synchronous addition memory 33 _1, are stored for each chip period.

In the second cycle of the observation period, since the received signal is in progress, the received signal and the next divided spread code G
₂ and matches the initial phase offset timing phi _0. Since the code phase is considered to be one division cycle, the phase returns to the initial phase every time one division cycle elapses. At this time, in the matched filter 21 _{0-21 3,}
Correlation values matched filter 21 ₂ outputs to the divided spreading code G ₂ and the coefficient (referred to as MF2) is maximized. Switching selector 32, since the switches to select the next matched filter, the output of the matched filter 21 ₂ (MF2) is via the switching selecting portion 32 is output to the synchronization addition memory 33 _1. In the synchronous addition memory 33 ₁ , the output (MF 2) of the matched filter 21 ₂ is added to the stored output (MF 1) of the matched filter 21 ₁ every chip cycle and stored again.

Thus, the first synchronous addition is completed, and the maximum value
The selection unit 23 includes a synchronous addition memory 33 ₀~ 33_ThreeIn the
Offset timing φ₀At the maximum correlation output.
Synchronous addition memory 33 to remember₁To identify. At this time,
Split spreading code G_TwoOffset timing φ₀Has a sync point
is there. Synchronous addition memory 33₀~ 33_ThreeIs erased
It is.

In the third period of the observation period, the received signal and the next divided spreading code G ₃ match at the offset timing φ ₀ from the initial phase. At this time, in the matched filter 21 _{0-21 3,} divided spreading code correlation values matched filter 21 ₃ outputs a G ₃ a coefficient (M
F3) is the largest. The output of the matched filter 21 ₃ through the switching selection portion 32, a synchronous addition memory 33 _1, are stored for each chip period. In the fourth cycle of the observation period, the received signal and the next divided spreading code G ₀ are offset from the initial phase by an offset timing φ _0.
Matches. At this time, the matched filters 21 _{0 to} 21 ₃
Among correlation values matched filter 21 ₀ outputs of the divided spreading code G ₀ and the coefficient (referred to as MF0) is maximized. The output of the matched filter 21 ₀ (MF0) is
Through the switching selection portion 32, it is output to the synchronization addition memory 33 _1. In synchronous addition memory 33 _1, the output of the matched filter 21 ₃ stored the output of the matched filter _{21 0 (MF0) (MF3)} , stored again by adding every chip period.

With the above, the second synchronous addition is completed, and the maximum value
The selection unit 23 includes a synchronous addition memory 33 ₀~ 33_ThreeIn the
Offset timing φ₀At the maximum correlation output.
Synchronous addition memory 33 to remember₁To identify. At this time,
Split spreading code G₀Offset timing φ₀Has a sync point
is there. Synchronous addition memory 33₀~ 33_ThreeIs erased
It is.

The divided spreading code and offset timing comparing section 24 calculates the offset timing φ ₀ of the divided spreading code G ₂ having the maximum correlation value in the first synchronous addition and the correlation value in the second synchronous addition. There is compared with the offset timing of the divided spreading code G ₀ to the maximum value. Since the progress of the received signal from the end of the first synchronous addition to the end of the second synchronous addition was for two periods of the observation period, the change of the divided spreading code having the maximum correlation value is due to the change of the received signal. Consistent with progress. And are consistent because the offset timing both is phi _0.
As a result, the divided spreading code and offset timing comparing section 24 outputs a signal indicating synchronization acquisition. At this time, it can be seen that the synchronization point is at the position of the offset timing φ ₀ of the divided spreading code G ₀ .

As described above, the first spread spectrum receiving signal is inputted, and the first spread code synchronous acquisition is performed.
As in the fourth to fourth embodiments, it is possible to input a received signal into which a code string having a predetermined code pattern is periodically inserted, and perform synchronous acquisition of a code string having a predetermined code pattern. For this purpose, the “spreading code” in the first to fourth embodiments may be simply replaced with “a code sequence having a predetermined code pattern” and applied.
Hereinafter, two application examples in which a code sequence having a predetermined code pattern is used as a preamble as a pilot signal will be described again as fifth and sixth embodiments.

FIG. 8 is an explanatory diagram showing a specific example of the synchronization acquisition method according to the fifth embodiment of the present invention. The frame format has the same configuration as the conventional one shown in FIG. As the block configuration, the one shown in FIG. 1 is used, and the code of the above-described preamble is used as the coefficient of the matched filter 1. As in FIG. 15, the length of the matched filter is equal to the code length of the preamble. In FIG. 1, a matched filter 1 receives a received signal in which a preamble code is periodically inserted at the beginning of one frame, repeats correlation detection over a period of a plurality of frames, and outputs one correlation value per unit period. . The maximum value selection unit 4 detects an offset timing that gives the maximum correlation value in each frame period, and the offset timing comparison unit 5 determines that there is a synchronization point with the preamble code when a predetermined number of offset timing matches exist. Is determined.

In FIG. 8, the maximum value selecting section 4 sets the offset timing at which the maximum correlation value is provided in the first frame period of two consecutive frames from the initial phase at the start of observation to the code phase offset # 0. Detect in position. In the next frame period, detection is performed at the position of code phase offset # 1 from the initial phase at the start of observation. When the offset timings match twice consecutively, the offset timing comparison unit 5 determines that there is a synchronization point at the offset timing, and outputs a signal indicating synchronization acquisition.

Next, as a sixth embodiment, on the premise of the above-described fifth embodiment, a synchronous addition technique using the block configuration of the second embodiment described with reference to FIG. Can be applied. That is, in FIG. 3, the matched filter 1 detects the correlation between the received signal and the preamble code by synchronous addition over a plurality of frame periods, and the maximum value selector 4 determines the maximum correlation value in each synchronous addition. The offset timing to be given is detected, and the offset timing comparing section 5 determines that there is a synchronization point when the offset timings match a predetermined number.
The number of frames to be synchronously added is arbitrary, and the number of frames to be synchronously added in each of the plurality of synchronous additions does not necessarily need to be the same. In the fifth and sixth embodiments described above, the above-described predetermined number of coincident offset timings is not limited to two consecutive times, but may be a plurality of consecutive times.
It may be performed B times, and if the offset timings match A times or more during the B times, it may be determined that there is a synchronization point.

FIG. 9 is a block diagram of the present invention using the divided spreading code.
FIG. 14 is a diagram illustrating the synchronization acquisition characteristics evaluated by computer simulation for the third embodiment in which synchronous addition is not performed. The PN code has a code length N of 32768, spread spectrum is performed by BPSK, the number of matched filters J is eight, and the tap length (code length) of the matched filter is 64. FIG. 9A shows the synchronization point detection error rate (SNR (Signal-to-Noise Ratio)) under the Gaussian noise and FIG. 9B shows the seven-wave selective fading environment.
alse acquisition). A model in which the average signal power of each fading path exponentially decreases from the leading path was used. For comparison, the conventional method (γ ₀ =
The synchronization acquisition characteristic of 16) is shown by the dotted line. However, the number of times of re-capture mode was limited to 20 times. In either environment, the method of the present invention shows superior characteristics to the conventional method. It can be seen that the synchronization acquisition method of the present invention is superior to the synchronization acquisition method according to the prior art, particularly in a place where the SNR is good (−5 dB or more).

In the above description, the case where the matched filter is operated with the chip period of the spreading code as a unit has been described. On the other hand, there is an oversampling operation for operating the matched filter at a time interval equal to one (a) (integer) of the chip period. In each of the embodiments of the present invention, an oversampling operation can be performed.
Offset timing determination, including correlation detection, maximum value detection, and offset timing comparison, is performed at an integer multiple of the chip timing of the spread code, and it is determined that the offset timing matches when the offset timing is within a predetermined range. You may make it.

Specifically, the number of stages of the matched filter is a
(Integer) times, tap outputs are taken out at one-chip intervals, and correlation detection is performed. The correlation output is a
Since the output is performed at a time interval of 1/1, the maximum value detection is also performed at this interval. As for the maximum value detection, the code phase offset can be known at a time interval of 1 / a (integer) of the chip timing. Therefore, there are two determination methods for comparing the offset timing. The first method is to check for coincidence at a time interval of 1 / a (integer) of the chip timing. The second method is a method in which if the offset timing deviation is within a predetermined range, for example, within a predetermined range of less than one chip, it is determined that they match. In this example, when a = 4 times, ±
If the difference is equal to or less than two timings, it is considered that they match.

In the above description, correlation detection was performed using a matched filter. Examples of the matched filter include an analog or digital transversal filter, a matched filter using a surface acoustic wave element (SAW), and a filter having a function equivalent to a matched filter using a SAW convolver. Alternatively, the correlation can be detected using a sliding correlator. However, the synchronization acquisition time becomes significantly longer, and the control of selecting a spreading code to be given to the sliding correlator from the memory becomes complicated.

[0064]

According to the present invention, as is apparent from the above description, a correlation output with a small variation in the time axis direction is used in place of a threshold value for a correlation value having a large variation as in the prior art. The offset timing at which the matched filter outputs the maximum value is determined using the timing information. Accordingly, there is an effect that the accuracy of synchronously capturing a spread spectrum code or a code string having a predetermined code pattern is higher than in the past. As a result, the time required for these synchronization acquisitions can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram of a first embodiment of the present invention.

FIG. 2 is an explanatory diagram showing a specific example of a synchronization acquisition method in the embodiment shown in FIG.

FIG. 3 is a block diagram of a second embodiment of the present invention.

FIG. 4 is a block diagram of a third embodiment of the present invention.

FIG. 5 is an explanatory diagram showing a specific example of a synchronization acquisition method in the embodiment shown in FIG.

FIG. 6 is a block diagram of a fourth embodiment of the present invention.

FIG. 7 is an explanatory diagram schematically showing an operation in the embodiment shown in FIG. 6;

FIG. 8 is an explanatory diagram showing a specific example of a synchronization acquisition method according to a fifth embodiment of the present invention.

FIG. 9 is a diagram illustrating the synchronization acquisition characteristics of the third embodiment of the present invention evaluated by computer simulation.

FIG. 10 is a block diagram illustrating a first example of a conventional synchronization acquisition device in a direct spread spectrum communication system.

11 is a first explanatory diagram of the synchronization acquisition method in the related art shown in FIG.

12 is a second explanatory diagram of the synchronization acquisition method in the conventional technique shown in FIG.

FIG. 13 is a block diagram showing a second example of a conventional synchronization acquisition device in a direct spread spectrum communication system.

FIG. 14 is a second explanatory diagram of the synchronization acquisition method in the conventional technique shown in FIG.

FIG. 15 is an explanatory diagram showing a conventional synchronization acquisition method in a communication system in which a preamble is periodically inserted.

[Explanation of symbols]

1,21 ₀ -21 _J-1 ... matched filter, 3, 12, 2
2, 31 ... determiner, 4, 23 ... maximum value selector, 5 ... offset timing comparator, 11 ... synchronous addition memory, 24 ...
Division spreading code and offset timing comparing section, 32
... switching selecting portion, 33 ₀ ~33 _J-1 ... synchronous addition memory

Continued on the front page F term (reference) 5K022 EE01 EE24 EE33 EE36 5K047 AA02 BB01 BB05 CC01 GG27 HH15 LL06 MM03 MM13 MM24 MM33 MM36

Claims (12)

[Claims] 1. A part or all of a spreading code,
The correlation detection with the spread spectrum received signal by the spread code is repeated over a plurality of periods of the spread code, and in each of the periods, an offset timing that gives a maximum correlation value is detected, and the coincidence of the offset timing is a predetermined number. At one time,
Determining that there is a synchronization point. 2. A part or all of a spreading code,
Correlation detection with the spread spectrum received signal by the spread code is performed by synchronous addition over a plurality of periods of the spread code, and the synchronous addition is repeated, and in each of the synchronous additions, an offset timing that gives a maximum correlation value is detected. And when there is a predetermined number of matches of the offset timing,
Determining that there is a synchronization point. 3. A method of detecting a correlation between a part or all of each divided spreading code obtained by dividing a spreading code by J and a received signal spectrum-spread by the spreading code, by detecting a period of the spreading code. It repeats over a period that is a multiple of the 1 / J division period, and in each of the division periods, detects a part or all of the divided spreading code that gives the maximum correlation value and an offset timing; A part or all of the divided spreading codes that give values change with the progress of the received signal, and when there is a predetermined number of matches of the offset timing, it is determined that there is a synchronization point. Synchronous acquisition method. 4. A method for detecting a correlation between a part or all of each divided spreading code obtained by dividing a spreading code by J and a received signal spectrum-spread by the spreading code, by detecting a period of the spreading code. Performed by synchronous addition over a period that is a multiple of the 1 / J division period, and the synchronous addition is repeated,
In each of the synchronous additions, a part or all of the divided spreading code that gives a maximum correlation value and an offset timing are detected, and a part or all of the divided spreading code that gives the maximum correlation value is detected. And determining that a synchronization point exists when the reception signal changes with the progress of the received signal and the offset timing coincides with a predetermined number. 5. A method for detecting a correlation between a part or all of a code sequence having a predetermined code pattern and a received signal in which the code sequence having the predetermined code pattern is periodically inserted in units of frames. Iterating over a plurality of cycles of the frame, detecting an offset timing that gives a maximum correlation value in each frame, and when there is a predetermined number of matches of the offset timing,
Determining that there is a synchronization point. 6. A method for detecting a correlation between a part or all of a code sequence having a predetermined code pattern and a received signal in which the code sequence having the predetermined code pattern is periodically inserted in units of frames. Performing by synchronous addition over a plurality of cycles of the frame, repeating the synchronous addition, detecting an offset timing that gives the maximum correlation value in each of the synchronous additions, and when there is a predetermined number of matches of the offset timing,
Determining that there is a synchronization point. 7. A synchronization acquisition device comprising: a correlation detector for inputting a received signal spread spectrum by a spreading code; and a decision unit for receiving an output of the correlation detector as an input, wherein the correlation detector comprises: A part or all of the spreading code is set, and the correlation between the received signal and the part or all of the spreading code is repeatedly detected over a plurality of cycles of the spreading code. In each period, an offset timing that gives a maximum correlation value is detected, and when there is a predetermined number of coincidences of the offset timings, it is determined that there is a synchronization point. 8. A synchronization acquisition device comprising: a correlation detector for inputting a received signal spread spectrum by a spreading code; and a decision unit for receiving an output of the correlation detector as an input, wherein the correlation detector comprises: A part or all of the spreading code is set, and a correlation between the received signal and a part or all of the spreading code is detected.The determiner performs synchronous addition over a plurality of cycles of the spreading code. A synchronization acquisition device that detects an offset timing that gives a maximum correlation value in each of the synchronous additions, and determines that there is a synchronization point when the offset timings match a predetermined number. 9. A synchronization acquisition device comprising: a plurality of correlation detectors for inputting a received signal spectrum-spread by a spreading code; and a determiner for receiving outputs of the plurality of correlation detectors as inputs. In the correlation detector, a part or all of the divided spread codes obtained by dividing the spread code by J are set,
The received signal and the detection of the correlation between a part or all of the divided spreading codes are repeated over a period that is a multiple of 1 / J of the period of the spreading code. In each division cycle, the correlation values of the correlation detectors are compared, and a part or all of the divided spread codes that give the maximum correlation value and the offset timing are specified, and the maximum correlation value is given. When a part or all of the divided spreading codes change together with the received signal, and when there is a predetermined number of matches of the offset timing, it is determined that there is a synchronization point. . 10. A synchronization acquisition device, comprising: a plurality of correlation detectors for inputting a received signal spectrum-spread by a spreading code; and a determiner for receiving outputs of the plurality of correlation detectors as inputs. The correlation detector is configured to set a part or all of the divided spread codes obtained by dividing the spread code by J, and to determine the relationship between the received signal and a part or all of the divided spread codes. The correlation detector repeats synchronous addition over a period that is a multiple of 1 / J of the period of the spreading code, and compares the correlation value of each correlation detector in each synchronous addition. Then, to specify a part or all codes of the divided spreading code that gives the maximum correlation value and the offset timing,
Some or all of the divided spreading codes that give the maximum correlation value change with the received signal, and
When there is a predetermined number of matches of the offset timing,
Determining that there is a synchronization point. 11. A synchronization device comprising: a correlation detector for inputting a received signal in which a code sequence having a predetermined code pattern is periodically inserted in units of frames; and a determiner for receiving an output of the correlation detector as an input. An acquisition device, wherein the correlation detector is configured such that a part or all of a code string having the predetermined code pattern is set, and the received signal and a part of a code string having the predetermined code pattern are provided. Or, the correlation detection with all the code strings is repeated over a plurality of periods of the frame, and the determiner detects an offset timing that gives a maximum correlation value in each of the frames. Determining that there is a synchronization point. 12. A synchronization apparatus comprising: a correlation detector for inputting a received signal in which a code sequence having a predetermined code pattern is periodically inserted in units of frames; and a determiner for receiving an output of the correlation detector as an input. An acquisition device, wherein the correlation detector is configured such that a part or all of a code string having the predetermined code pattern is set, and the received signal and a part of a code string having the predetermined code pattern are provided. Or, performing correlation detection with all the code strings, the determiner repeats synchronous addition over a plurality of periods of the frame, in each of the synchronous additions, detects an offset timing that gives a maximum correlation value, When there is a predetermined number of matches, it is determined that there is a synchronization point.