JP2002112455A - Power supply reinforcing circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reinforce a power supply in an operating circuit block by effectively using a decoupling capacitor in a stopping circuit block. SOLUTION: In a semiconductor device having at least two circuit blocks, a path transistor connected between power lines of the first and second circuit blocks, and a controlling circuit controlling to turn the path transistor on/off in response to a power down signal, are provided. Each circuit block is supplied with the same voltage from the same power supply via each exclusive power line, and switched between a normal operating mode in which the circuit operates and a power down mode in which the circuit stops in response to the power down signal. The path transistor turns on and electrically connects the power lines of the first and the second circuit blocks when at least the first or the second circuit block becomes the power down mode.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply reinforcing circuit for reinforcing a power supply of a circuit block in operation by utilizing a circuit block in operation in a semiconductor device having a plurality of circuit blocks mounted thereon. .

[0002]

2. Description of the Related Art In a semiconductor device having a plurality of circuit blocks, power may be supplied to each circuit block via a dedicated power supply line. For example, in the case of an analog circuit, a dedicated power supply is required. In the case of a digital circuit, in order to prevent power supply noise generated in a high-speed operating circuit block from adversely affecting other circuit blocks, FIG. As shown in (1), power is supplied to each circuit block via a dedicated power supply line.

FIG. 2 is a schematic view of an example of a conventional semiconductor device. The illustrated semiconductor device 20 includes two circuit blocks 1 and 2 formed on a semiconductor chip. These circuit blocks 1 and 2 are circuit-independent and independently operable. The circuit block 1 is supplied with power via a dedicated power line VDD1 to the circuit block 1, and is supplied to the circuit block 2. , Power is supplied to the circuit block 2 via a dedicated power line VDD2.

[0004]

As shown in FIG. 2, in a semiconductor device in which a plurality of circuit blocks are formed, all the circuit blocks may operate at the same time, but the operation of some of the circuit blocks is stopped. In some cases, only the remaining circuit blocks are operated. For example, in an analog circuit,
Since a direct current flows constantly during operation, the power consumption is reduced by interrupting the path of the direct current while the operation is stopped.

Incidentally, in a circuit block or the like that operates at high speed, a capacitance component called a decoupling capacitor for suppressing power supply noise is provided therein. This capacitance component occupies 30 to 40% of the area of the circuit block, depending on the operation speed of the circuit block. However, as described above, when the operation of the circuit block is stopped, there is a problem that the capacitance component of the circuit block during the operation stop does not contribute to the purpose of noise reduction and is wasted.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems of the prior art, and to effectively utilize a decoupling capacitor of an inactive circuit block to reinforce the power of an inactive circuit block. It is to provide a reinforcement circuit.

[0007]

In order to achieve the above object, according to the present invention, electric power of the same power supply voltage is supplied via a dedicated power supply line, and a circuit operation is performed in response to a power down signal. In a semiconductor device having at least two circuit blocks that operate by switching between a normal operation mode and a power down mode in which circuit operation is stopped, a power supply line of a first circuit block of the at least two circuit blocks and a A pass transistor connected between the power supply line of the second circuit block and a control circuit that controls on / off of the pass transistor in response to the power-down signal, wherein the pass transistor includes at least the The first circuit block is turned on when one of the first and second circuit blocks enters the power down mode; It is to provide a power supply reinforcing circuit, characterized in that operative to electrically connect the power line and a power supply line of said second circuit block.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a power supply reinforcing circuit according to the present invention will be described in detail based on preferred embodiments shown in the accompanying drawings.

FIG. 1 is a schematic diagram showing a configuration of an embodiment of a semiconductor device to which a power supply reinforcing circuit according to the present invention is applied. The semiconductor device 10 shown in FIG. 1 includes two circuit blocks 1 and 2 formed on a semiconductor chip. These circuit blocks 1 and 2 are circuit independent units that can operate independently, and the circuit blocks 1 and 2 have dedicated power supply lines VDD1 and VDD2 for each of the circuit blocks 1 and 2.
, Power of the same power supply voltage is supplied.

A power supply line VDD1 dedicated to the circuit block 1
A decoupling capacitor C1 for reducing power supply noise is provided between the ground and the ground. Similarly, a decoupling capacitor C2 is provided between the power supply line VDD2 dedicated to the circuit block 2 and the ground. This decoupling capacitor may be configured using, for example, a parasitic capacitance of a power supply line, or may be configured by connecting a gate capacitance of a MOS transistor or the like to the power supply line.

The circuit blocks 1 and 2 each have an input terminal PD for switching between a normal operation mode in which the circuit operation is performed and a power down (low power consumption) mode in which the circuit operation is stopped. PD1, P
D2 has been input. In the case of the illustrated example, for example, when the power down signal PD1 becomes high level, the circuit block 1
Becomes a power down mode, and its circuit operation is stopped. The same applies to the circuit block 2. In addition, electric power is always supplied.

As shown in the center of FIG. 1, the power supply reinforcing circuit 12 of the present invention includes a pass transistor Tr connected between a power supply line VDD1 of the circuit block 1 and a power supply line VDD2 of the circuit block 2, 14 is provided.

The pass transistor Tr electrically connects / disconnects the power supply line VDD1 of the block 1 and the power supply line VDD2 of the block 2 (that is, the decoupling capacitors C1 and C2). , PMOS) and an N-type MOS transistor (hereinafter, referred to as NMOS). The pass transistor Tr preferably has a smaller on-resistance, and preferably has a resistance of, for example, about 2 to 3Ω.

The control circuit 14 outputs a power down signal PD
1, which controls the on / off of the pass transistor Tr in accordance with the state of the PD2. In the illustrated example, the pass transistor Tr includes a NOR gate 16 and an inverter 18. The power-down signals PD1 and PD2 are input to the NOR gate 16, and the output signal is a PMOS signal of the pass transistor Tr.
And an inverted signal of the inverted signal is input to the NMOS gate of the pass transistor Tr via the inverter 18.

In the illustrated semiconductor device 10, when the power down signals PD1 and PD2 are both at the low level,
In other words, when the circuit blocks 1 and 2 are both in the normal operation mode, the output signal of the NOR gate 16 is at the high level,
The output signal of the inverter 18 becomes low level, and the pass transistor Tr is turned off under the control of the control circuit 14. Therefore, the circuit blocks 1 and 2 are connected to the power supply line VDD.
1 and the power supply line VDD2 operate in a state of being electrically disconnected.

Subsequently, power down signals PD1, PD2
From the low level state to the power down signal PD1.
Becomes high level, that is, when the circuit block 1 changes from the normal operation mode to the power down mode while the circuit block 2 remains in the normal operation mode, the operation of the circuit block 1 is stopped. At this time, the output signal of the NOR gate 16 becomes low level and the output signal of the inverter 18 becomes high level, and the pass transistor Tr is turned on under the control of the control circuit 14.

At this time, power is supplied to the circuit block 2 not only from the power supply line VDD2 but also from the power supply line VDD1 via the pass transistor Tr. Also,
The decoupling capacitors C1,
C2 is electrically connected via the pass transistor Tr and synthesized. Thereby, the power supply of the circuit block 2 during the circuit operation is reinforced by utilizing the circuit block 1 during the operation stop, and the power supply noise during the operation can be reduced.

Conversely, when the power-down signal PD2 goes high from the state where both the power-down signals PD1 and PD2 are low, that is, while the circuit block 1 remains in the normal operation mode, the circuit block 2 The same applies to the case where the mode is changed from the normal operation mode to the power down mode. When both the power-down signals PD1 and PD2 become high level, the pass transistor Tr turns on.
The circuit blocks 1 and 2 are both in the power down mode,
Its operation stops.

The power-down signal is supplied to each circuit block from, for example, an external input pin or an internal register of the semiconductor device. In the above embodiment, the case where the number of circuit blocks is two has been described as an example. However, the present invention is not limited to this, and the semiconductor device may be any as long as it has at least two circuit blocks. Further, the polarity of each signal, the specific circuit configuration of the circuit block, and the control circuit of the power supply reinforcing circuit of the present invention are not limited at all.

Further, three or more circuit blocks may be connected by pass transistors. In this case, the pass transistor needs to be turned on only when only one circuit block is in the normal operation mode among a plurality of circuit blocks connected simultaneously when the pass transistor is turned on. In addition, a plurality of sets may be formed on a semiconductor device by combining two circuit blocks with a pass transistor as one set.

The power supply reinforcing circuit of the present invention is basically as described above. As described above, the power supply reinforcing circuit of the present invention has been described in detail. However, the present invention is not limited to the above embodiment, and various improvements and changes may be made without departing from the gist of the present invention. is there.

[0022]

As described in detail above, the power supply reinforcing circuit of the present invention is provided with the pass transistor connected between the power supply lines of the first and second circuit blocks and the first and second power supply circuits. When at least one of the circuit blocks is in the power down mode, the pass transistor is turned on, and the power supply lines of the first and second circuit blocks are electrically connected via the pass transistor. Thereby, according to the power supply reinforcement circuit of the present invention,
The power supply line of the circuit block in the power down mode and the power supply line of the circuit block in the normal operation mode are electrically connected via a pass transistor, and the decoupling capacitors of both are combined. The power supply can be reinforced, and power supply noise can be reduced.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of an embodiment of a semiconductor device to which a power supply reinforcing circuit of the present invention is applied.

FIG. 2 is a schematic view of an example of a conventional semiconductor device.

[Explanation of symbols]

 10, 20 Semiconductor device 1, 2 Circuit block 12 Power supply reinforcing circuit 14 Control circuit 16 NOR gate 18 Inverter VDD1, VDD2 Power supply line PD1, PD2 Power down signal C1, C2 Decoupling capacitor Tr Pass transistor

Claims (1)

[Claims] An electric power of the same power supply voltage is supplied via a dedicated power supply line, and in response to a power down signal,
In a semiconductor device having at least two circuit blocks mounted to operate by switching between a normal operation mode in which circuit operation is performed and a power down mode in which circuit operation is stopped, a first circuit block of the at least two circuit blocks A pass transistor connected between the power supply line of the second circuit block and the power supply line of the second circuit block; and a control circuit for controlling on / off of the pass transistor in accordance with the power down signal. Turns on when at least one of the first and second circuit blocks enters the power-down mode, and electrically connects a power supply line of the first circuit block to a power supply line of the second circuit block. A power supply reinforcement circuit characterized by operating as follows.