JP2002111531A - Transmission circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a circuit that selectively transmits a plurality of signals and can be improved in flexibility of design by reducing the number of parts. SOLUTION: A first output 23 and an input circuit 19 of a transmission circuit are set, so that the output impedance becomes smaller in the frequency band of a first signal at enabling time and becomes larger in the frequency band of a second signal at disenabling time. A second output 18 and an input circuit 21 of the transmission circuit are set so that the output impedance becomes smaller in the frequency band of the second signal at enabling time and becomes larger in the frequency band of the first signal at disenabling time. When the transmission circuit transmits the first signal, the first output 23 and input circuit 21 are enabled, and the second output 18 and input circuit 21 are disenabled. When the circuit transmits the second signal, the second output 18 and input circuit 21 are enabled, and the first output 23 and input circuit 19 are disenabled.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a transmission circuit, and more particularly, to a transmission circuit for selectively transmitting a plurality of signals.

[0002]

2. Description of the Related Art With the spread of personal computers,
Opportunities for connecting personal computers, and between personal computers and peripheral devices are increasing. At this time, if the personal computers are connected to each other, or the personal computer and peripheral devices are connected by cables, wiring and the like are troublesome, and the positions cannot be freely changed.
For this reason, there is a request to connect wirelessly. In order to satisfy this demand, a wireless LAN (Local Area N
etwork) equipment is being developed.

FIG. 8 is a block diagram showing an example of a wireless LAN system.

The wireless LAN system 1 includes wireless LAN devices 2-1, 2-2, a personal computer 3, and a peripheral device 4. The wireless LAN device 2-1 includes:
Personal computer 3 and interface cable 5
Connected by Also, the wireless LAN device 2-2
Is connected to the peripheral device 4 via the interface cable 6.

A wireless LAN device 2-1 and a wireless LAN
The device 2-2 wirelessly communicates with the device 2-2. The personal computer 3 and the peripheral device 4 communicate with each other via the wireless LAN devices 2-1 and 2-2. Thereby, the personal computer 3 and the peripheral device 4 can be operated without being connected by a cable.

FIG. 9 is a block diagram showing an example of a conventional wireless LAN device.

The wireless LAN devices 2-1 and 2-2 include an antenna 11, filter circuits 12, 13 and 14, a transmission / reception switch 15, high-frequency amplifier circuits 16 and 17, frequency conversion circuits 18 and 19, and a local frequency oscillation circuit 20. , Demodulation circuit 21, attenuator 22, modulation circuit 23, processing circuit 24
Is included.

First, the operation at the time of reception will be described.

At the time of reception, the transmission / reception switch 15 is
The path shown by the solid line in FIG. 9 is formed. The signal received by the antenna 11 is supplied to the filter circuit 12. The filter circuit 12 allows a signal component in a predetermined frequency band of the signal from the antenna 11 to pass. The signal that has passed through the filter circuit 12 is supplied to a high-frequency amplifier circuit 16 through a transmission / reception switch 15. The high frequency amplifier circuit 16
The signal from the transmission / reception switch 15 is amplified. The signal amplified by the high-frequency amplification circuit 16 is transmitted to the frequency conversion circuit 1
8 is supplied.

The frequency conversion circuit 18 is supplied with an oscillation signal of a local frequency from a local oscillation circuit 20. The frequency conversion circuit 18 is composed of a multiplier, and multiplies an oscillation signal from the local oscillation circuit 20 by a signal from the high-frequency amplification circuit 16 to generate a signal.
Is converted to an intermediate frequency band.

The signal whose frequency has been converted by the frequency conversion circuit 18 is supplied to the filter circuit 13. Filter circuit 1
3 allows a signal in a desired frequency band among the signals from the frequency conversion circuit 18 to pass. The signal that has passed through the filter circuit 13 is supplied to a demodulation circuit 21. Demodulation circuit 21
Demodulates the signal from the filter circuit 13 into the original signal. The demodulated signal is supplied to the processing circuit 24. The processing circuit 24 decodes the demodulated signal and
Or 6 to the computer 3 or the peripheral device 4.

Next, the operation at the time of transmission will be described.

At the time of transmission, the transmission / reception switch 15 is
A path shown by a broken line in FIG. 9 is formed. The processing circuit 24 encodes signals supplied from the computer 3 or the peripheral device 4 via the cables 5 and 6. The encoded signal is
The signal is supplied to the modulation circuit 23. The modulation circuit 23 modulates a signal from the processing circuit 24. The signal from the modulation circuit 23 is supplied to the attenuator 22. Attenuator 22
Attenuates the signal from the modulation circuit 23. The signal attenuated by the attenuator 22 is supplied to the filter circuit 14. The filter circuit 14 allows a signal in a predetermined frequency band among the signals from the attenuator 22 to pass. The signal that has passed through the filter circuit 14 is supplied to a frequency conversion circuit 19.

The local oscillation signal is supplied from the local oscillation circuit 20 to the frequency conversion circuit 19. The frequency conversion circuit 19 is composed of a multiplier,
The frequency conversion is performed by multiplying the signal from the filter circuit 14 by the local oscillation signal from 0. The signal whose frequency has been converted by the frequency conversion circuit 20 is supplied to the high-frequency amplification circuit 17.

The high-frequency amplifier circuit 17 includes the frequency conversion circuit 1
9 is amplified. The signal amplified by the high-frequency amplifier 17 is supplied to the filter circuit 12 via the transmission / reception switch 15. The filter circuit 12 allows a signal of a predetermined frequency band among the signals from the transmission / reception switch 15 to pass. The signal that has passed through the filter circuit 12 is
The signal is supplied to the antenna 11. The antenna 11 radiates a radio wave corresponding to a signal from the filter circuit 12 to the outside.

As described above, the wireless LAN device 2-
1 and 2-2 are a personal computer 3 and a peripheral device 4
Data can be transmitted and received wirelessly to and from the server.

However, the wireless LAN devices 2-1 and 2-2 shown in FIG.
Since it is necessary to have 3 and 14 in each of the transmission system and the reception system, the cost increases. Therefore, there is a wireless LAN device in which a filter circuit is shared between a transmission system and a reception system.

FIG. 10 is a block diagram showing another example of the prior art. 9, the same components as those of FIG. 9 are denoted by the same reference numerals, and the description thereof will be omitted.

The wireless LAN device shown in FIG. 10 is provided with a filter circuit 31 and switch circuits 32 and 33 instead of the filter circuits 13 and 14. The filter circuit 31
It has the same configuration as the filter circuits 13 and 14, and allows signals in a predetermined frequency band to pass.

The switch circuit 32 includes the frequency conversion circuit 1
The signal path is provided between the filter circuits 8 and 19 and the filter circuit 31 based on a transmission / reception switching control signal from the processing circuit 24. The switch circuit 33 is provided between the demodulation circuit 21 and the attenuator 22 and the filter circuit 31,
The signal path is switched based on a transmission / reception switching control signal from the processing circuit 24.

For example, when the transmission / reception switching signal is at a high level, that is, when transmission is performed,
A path shown by a broken line is formed in FIG. 10, and a transmission / reception switching signal is at a low level, that is, a path shown by a solid line in FIG.

In the wireless LAN device shown in FIG. 10, one filter circuit 31 is commonly used for the transmission system and the reception system by switching the switch circuits 32 and 33.

[0023]

However, in the wireless LAN device shown in FIG. 9, since it is necessary to provide the filter circuits 13 and 14 in each of the transmission system and the reception system, the number of parts cannot be reduced and the cost is high. There were problems such as becoming.

In the wireless LAN device shown in FIG. 10, switch circuits 32 and 33 are provided before and after the filter circuit 31, so that the filter circuit 31 is shared between the transmission system and the reception system to form a single filter circuit. Since two switch circuits are required, there are problems such as an increase in the number of parts. In addition, the present invention has been made in view of the above points, and has as its object to provide a transmission circuit capable of reducing the number of components and improving the degree of freedom in circuit design.

[0025]

According to the present invention, there is provided a first output circuit (23) for outputting a first signal, a first input circuit (19) for receiving the first signal, In a transmission circuit having a second output circuit (18) to which a second signal is output and a second input circuit (21) to which the second signal is input, at least the first signal is enabled when enabled. The first impedance is reduced such that the output impedance is reduced in the frequency band of at least and the output impedance is increased at least in the frequency band of the second signal when disabled.
The output circuit (23) and the first input circuit (19), the output impedance is reduced at least in the frequency band of the second signal when enabled, and at least the first signal is disabled when disabled. In order to increase the output impedance in the frequency band, the second
When setting the output circuit (18) and the second input circuit (21), and transmitting the first signal, the first circuit
The output circuit (23) and the first input circuit (19) are enabled, the second output circuit (18) and the second input circuit (21) are disabled, and the second output circuit (18) and the second input circuit (21) are disabled. When transmitting a signal, the second output circuit (18) and the second input circuit (21) are enabled, and the first output circuit (23) and the first input circuit (19) are turned on. A control circuit (24) for disabling is provided.

According to the present invention, the first output circuit (23)
And the first input circuit (19) is enabled, and the second output circuit (18) and the second input circuit (21) are disabled so that the output of the first output circuit (23) is output. Impedance and the first input circuit (1
The input impedance of 9) can be reduced, and the output impedance of the second output circuit (18) and the input impedance of the second input circuit (21) increase.
Can be efficiently transmitted from the first output circuit (23) to the first input circuit (19), and the first output circuit (23) and the first input circuit (19) are disabled. By enabling the second output circuit (18) and the second input circuit (21), the output impedance of the first output circuit (23) and the input impedance of the first input circuit (19) are reduced. Become big, second
Since the output impedance of the output circuit (18) and the input impedance of the second input circuit (21) can be reduced, the second signal is efficiently transmitted from the second output circuit (18) to the second input circuit (21). Can be transmitted well.

The present invention is also provided between the filtering circuit (31) and the first output circuit (23), and outputs the first signal from the first output circuit (23) in an enabled state. An attenuation circuit (51) which supplies the filter signal (31) without attenuation to the filter circuit (31) and attenuates the first signal from the first output circuit (23) to the filter circuit (31) in a disabled state; When transmitting the first signal, at least the first input circuit (19) and the attenuation circuit (51) are enabled, and the second input circuit (19) and the attenuation circuit (51) are enabled.
When the output circuit (18) and the second input circuit (21) are disabled and the second signal is transmitted, the second output circuit (18) and the second input circuit (21) ) Is enabled, and at least the first input circuit (19) and the attenuation circuit (51) are disabled.

According to the present invention, when transmitting the first signal, at least the first input circuit (19) and the attenuation circuit (51) are enabled, and the second output circuit (1) is enabled.
8) By disabling the second input circuit (21), the impedance of the attenuation circuit circuit (51) and the input impedance of the first input circuit (19) can be reduced, and the second output circuit (21) can be reduced. Since the output impedance of 18) and the input impedance of the second input circuit (21) increase, the first signal can be efficiently transmitted from the first output circuit (23) to the first input circuit (19), When transmitting the second signal, the second output circuit (18) and the second input circuit (21) are enabled, and at least the first input circuit (19) and the attenuation circuit (51) are disabled. As a result, the impedance of the attenuation circuit (51) and the input impedance of the first input circuit (19) increase, and the output impedance of the second output circuit (18) increases. Since the impedance and the input impedance of the second input circuit (21) can be reduced,
The second signal can be efficiently transmitted from the second output circuit (18) to the second input circuit (21). At this time, since there is the attenuation circuit (51), the output impedance of the first output circuit (23) can be set freely.

[0029]

FIG. 1 is a block diagram showing a first embodiment of the present invention. 10, the same components as those of FIG. 10 are denoted by the same reference numerals, and the description thereof will be omitted.

The communication device 40 of this embodiment eliminates the need for the switch circuits 32 and 33 by appropriately selecting the input and output impedances of the frequency conversion circuits 18 and 19, the demodulation circuit 21 and the modulation circuit 23.

In the frequency conversion circuit 18, when the circuit is in the disabled state, the output impedance Zout18 in the intermediate frequency band is sufficiently larger than 50 [Ω], that is, Zout18≫50 [Ω], and the circuit is enabled. , The output impedance Zout18 is 50 [Ω] at least in the intermediate frequency band, that is, Zout
An IC where 18 = 50 [Ω] is selected. The frequency conversion circuit 18 is supplied with a transmission / reception switching control signal from the processing circuit 24. The transmission / reception switching control signal is at a high level during transmission and at a low level during reception. When the transmission / reception switching signal from the processing circuit 24 is at the high level indicating the transmission state, the frequency conversion circuit 18 is in the disabled state. When the transmission / reception switching signal from the processing circuit 24 is at the low level indicating the reception state, the frequency conversion circuit 18 is in the enabled state. Become.

The frequency conversion circuit 19 has an input impedance Zin19 sufficiently larger than 50 [Ω] in at least the intermediate frequency band when the circuit is disabled.
That is, Zin19≫50 [Ω], and when the circuit is enabled, the input impedance Zin19 is 50 [Ω] at least in the intermediate frequency band, that is, Zin19 = 50.
[Ω] is selected. The frequency conversion circuit 19 is supplied with a transmission / reception switching control signal from the processing circuit 24. The frequency conversion circuit 19 is enabled when the transmission / reception switching signal from the processing circuit 24 is at the high level indicating the transmission state, and is disabled when the transmission / reception switching signal from the processing circuit 24 is at the low level indicating the reception state. Become.

In the demodulation circuit 21, the input impedance Zin21 is sufficiently larger than 50 [Ω], that is, Zin21≫50 [Ω] at least in the intermediate frequency band when the circuit is in the disabled state. In the enable state, at least in the intermediate frequency band, the input impedance Zin21 is 50 [Ω], that is, Zin21.
= 50 [Ω] is selected. The demodulation circuit 21 is supplied with a transmission / reception switching control signal from the processing circuit 24. The demodulation circuit 21 is disabled when the transmission / reception switching signal from the processing circuit 24 is at the high level indicating the transmission state, and is enabled when the transmission / reception switching signal is at the low level indicating the reception state.

In the modulation circuit 23, when the circuit is in the disabled state, the output impedance Zout23 is sufficiently larger than 50 [Ω], that is, Zout23≫50 [Ω] at least in the intermediate frequency band, and the circuit is enabled. At least in the intermediate frequency band, the input impedance Zout23 is 50 [Ω], that is, Zout23 =
An IC having a value of 50 [Ω] is selected. Also, the modulation circuit 2
3 is supplied with a transmission / reception switching control signal from the processing circuit 24. The modulation circuit 23 is enabled when the transmission / reception switching signal from the processing circuit 24 is at the high level indicating the transmission state, and is disabled when the transmission / reception switching signal is at the low level indicating the reception state.

Next, the operation of this embodiment will be described.

FIG. 2 is a diagram for explaining the operation of one embodiment of the present invention. 2A is a transmission / reception switching signal, FIG. 2B is a state of the frequency conversion circuit 18, and FIG.
2D, FIG. 2D shows the state of the demodulation circuit 21, and FIG.
Indicates the state of the modulation circuit 23.

When the transmission / reception switching signal is at the high level indicating the transmission state as shown in a period T1 in FIG.
2B and 2D, the frequency conversion circuit 18 and the demodulation circuit 21 are in the disabled state.
As shown in (E), the frequency conversion circuit 19 and the modulation circuit 2
3 is enabled.

For this reason, the output impedance Zout18 of the frequency conversion circuit 18 and the input impedance Zin21 of the demodulation circuit 21 have values sufficiently larger than 50 [Ω].
Also, the input impedance Zin19 of the frequency conversion circuit 19
And the output impedance Zout23 of the modulation circuit 23 is 5
0 [Ω].

Therefore, the signal from the modulation circuit 23 is supplied to the frequency conversion circuit 19 via the filter circuit 31 and is not input to the demodulation circuit 21 and the frequency conversion circuit 18 having a large impedance.

When the transmission / reception switching signal is at a low level indicating the reception state as shown in a period T2 in FIG.
As shown in FIGS. 2B and 2D, the frequency conversion circuit 18 and the demodulation circuit 21 are in the enabled state, and as shown in FIGS. 2C and 2E, the frequency conversion circuit 19 and the modulation circuit 23 are in the disabled state. .

Therefore, the output impedance Zout18 of the frequency conversion circuit 18 and the input impedance Zin21 of the demodulation circuit 21 are 50 [Ω]. Further, the input impedance Zin19 of the frequency conversion circuit 19 and the output impedance Zout23 of the modulation circuit 23 have values sufficiently larger than 50 [Ω].

Therefore, the signal from the frequency conversion circuit 18 is supplied to the demodulation circuit 21 via the filter circuit 31 and is not input to the modulation circuit 23 and the frequency conversion circuit 19 having a large impedance.

According to this embodiment, the ICs arranged before and after the filter circuit 31, that is, the frequency conversion circuit 18,
19, the demodulation circuit 21 and the modulation circuit 23 are selected so that the input and output impedances have the above-described impedances.
Can send and receive.

In this embodiment, the frequency conversion circuit 1
8 and 19, the demodulation circuit 21 and the modulation circuit 23 are all selected to satisfy the above-mentioned conditions. However, if all the circuits cannot satisfy the above-mentioned conditions, an attenuator is used for a circuit which cannot satisfy the conditions. It may be configured so as to satisfy the above conditions by insertion.

FIG. 3 shows a block diagram of a second embodiment of the present invention. In the figure, the same components as those of FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted.

The communication device 50 of this embodiment is provided with an attenuator 51 between the filter circuit 31 and the modulation circuit 23.

FIG. 4 is a circuit diagram of an attenuator according to a second embodiment of the present invention.

The attenuator 51 includes capacitors C1, C
2, C3, resistors R1 and R2, and a diode D1. The diode D1 has a cathode connected to the input terminal Tin, and an anode connected to the output terminal Tout via the capacitor C1. The cathode of the diode D1 is connected to the control terminal Tcont via the resistor R2.

A signal is supplied from the modulation circuit 23 to the input terminal Tin during transmission. The output terminal Tout supplies a signal to the filter circuit 31 at the time of transmission. The control terminal Tcont
The transmission / reception switching control signal is supplied from the processing circuit 24.

When the transmission / reception switching control signal is at a high level, a direct current bias voltage is applied to the diode D1 in the forward direction by the resistors R1 and R2. As a result, the diode D1 is turned on. When the diode D1 is turned on, the attenuator 51 enters a low impedance state. When the attenuator 51 enters the low impedance state, the signal from the modulation circuit 23 is supplied to the filter circuit 31 with almost no attenuation.

When the transmission / reception switching control signal is at a low level, a forward bias voltage is applied to the diode D1.
Is not supplied, and the diode D1 is connected to the filter circuit 3
The direction is from 1 to the modulation circuit 23 in the opposite direction. Therefore, the attenuator 51 enters a high impedance state. At this time, the impedance of the attenuator 51 is
The value is sufficiently larger than 50 [Ω].

Therefore, even if the modulation circuit 23 is a circuit in which the output impedance Zout23 does not become Zout23≫50 [Ω] when the circuit is in the disabled state, the attenuator 51 becomes high impedance in the receiving state, The output impedance Zout can be set to a value sufficiently larger than 50 [Ω]. Therefore, a signal from the frequency conversion circuit 18 is not input to the modulation circuit 23.

According to the present embodiment, since the output impedance of the modulation circuit 23 at the time of disabling is not limited, the degree of freedom in design can be improved.

In this embodiment, the attenuator 51 is arranged between the modulation circuit 23 and the filter circuit 31.
An attenuator 51 may be arranged between the filter circuit 31 and the frequency conversion circuit 19.

FIG. 5 shows a block diagram of a third embodiment of the present invention. 3, the same components as those in FIG. 3 are denoted by the same reference numerals, and the description thereof will be omitted.

The communication device 60 of this embodiment has an attenuator 51 disposed between the frequency conversion circuit 19 and the filter circuit 31. In the attenuator 51, the signal from the filter circuit 31 is supplied to the input terminal Tin, and the output terminal Tout
Supplies a signal to the frequency conversion circuit 19. According to the present embodiment, since the output impedance of the modulation circuit 23 when disabling is not limited, the degree of freedom in design can be improved.

In this embodiment, the frequency conversion circuit 19
The attenuator 51 is arranged between the demodulation circuit 21 and the filter circuit 31, but may be arranged between the demodulation circuit 21 and the filter circuit 31.

FIG. 7 shows a block diagram of a fourth embodiment of the present invention. 5, the same components as those of FIG. 5 are denoted by the same reference numerals, and the description thereof will be omitted.

The communication device 80 of this embodiment has an attenuator 51 disposed between the demodulation circuit 21 and the filter circuit 31. In the attenuator 51, a signal from the filter circuit 31 is supplied to an input terminal Tin, and a signal from an output terminal Tout is supplied to the demodulation circuit 21. Also, the control terminal Tcont
, A transmission / reception switching control signal is supplied via an inversion circuit. Therefore, the control terminal Tcont is supplied with a signal obtained by inverting the transmission / reception switching control signal, that is, a signal that is low when the transmission / reception switching control signal is high and high when the transmission / reception switching control signal is low. Is done.

According to the present embodiment, since the output impedance of the demodulation circuit 21 when the demodulation circuit 21 is disabled is not limited, the degree of freedom in design can be improved.

In this embodiment, the attenuator 51 is arranged between the demodulation circuit 21 and the filter circuit 31.
It may be arranged between the frequency conversion circuit 18 and the file circuit 31.

FIG. 6 shows a block diagram of a fifth embodiment of the present invention. 5, the same components as those of FIG. 5 are denoted by the same reference numerals, and the description thereof will be omitted.

In the communication device 70 of this embodiment, the attenuator 51 is arranged between the frequency conversion circuit 18 and the filter circuit 31. In the attenuator 51, the signal from the filter circuit 31 is supplied to the input terminal Tin, and the output terminal Tout
Is supplied to the demodulation circuit 21. Further, a transmission / reception switching control signal is supplied to the control terminal Tcont via an inversion circuit. Therefore, the control terminal Tcont is supplied with a signal obtained by inverting the transmission / reception switching control signal, that is, a signal that is low when the transmission / reception switching control signal is high and high when the transmission / reception switching control signal is low. Is done.

According to the present embodiment, since the output impedance of the frequency conversion circuit 18 when disabling is not restricted, the degree of freedom in design can be improved.

In the second to fifth embodiments, the attenuator 51 is provided at one place, but may be provided at a plurality of places.

The present invention is not limited to the above embodiment, and various modifications can be made based on the description in the claims.

[0067]

As described above, according to the present invention, the first output circuit and the first input circuit are enabled and the second output circuit and the first input circuit are enabled.
The output impedance of the first output circuit and the input impedance of the first input circuit can be reduced by disabling the output circuit and the second input circuit of the second output circuit. Since the input impedance of the input circuit becomes large, the first signal can be efficiently transmitted from the first output circuit to the first input circuit, and the first output circuit and the first input circuit are disabled. By enabling the second output circuit and the second input circuit, the output impedance of the first output circuit and the input impedance of the first input circuit are increased, and the output impedance of the second output circuit is increased. And the input impedance of the second input circuit can be reduced, so that the second signal is applied from the second output circuit to the second input circuit. Because well can be transmitted, without providing a switching circuit, to control the signal path, thus, the number of parts can be reduced, low cost have the features such as the circuit can be constructed.

Also, according to the present invention, the attenuation circuit
It has the advantage that the output impedance of the first output circuit can be set freely, thereby improving the degree of freedom in circuit design.

[Brief description of the drawings]

FIG. 1 is a block diagram of a first embodiment of the present invention.

FIG. 2 is an operation explanatory diagram of the first embodiment of the present invention.

FIG. 3 is a block diagram of a second embodiment of the present invention.

FIG. 4 is a circuit configuration diagram of an attenuator according to a second embodiment of the present invention.

FIG. 5 is a block diagram of a third embodiment of the present invention.

FIG. 6 is a block diagram of a fifth embodiment of the present invention.

FIG. 7 is a block diagram of a fourth embodiment of the present invention.

FIG. 8 is a block diagram of a wireless LAN system.

FIG. 9 is a block diagram illustrating an example of a conventional wireless LAN device.

FIG. 10 is a block diagram showing another example of a conventional wireless LAN device.

[Explanation of symbols]

 40, 50, 60, 70, 80 Communication device 11 Antenna 12, 31 Filter circuit 15 Switch circuit 16, 17 High-frequency amplifier circuit 18, 19 Frequency conversion circuit 20 Local frequency oscillation circuit 21 Demodulation circuit 23 Modulation circuit 24 Processing circuit 51 Attenuator

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Yasuyuki Honma 8-8-2 Kokuryo-cho, Chofu-shi, Tokyo Mitsumi Electric Co., Ltd. F-term (reference) 5K011 DA03 DA12 DA15 DA21 EA06 GA04 JA12 KA01 5K029 AA18 DD02 GG07 HH01 LL01

Claims (4)

[Claims] A first output circuit to which a first signal is output; a first input circuit to which the first signal is input;
And a second input circuit to which the second signal is input, wherein the output impedance is low at least in the frequency band of the first signal when enabled. And setting the first output circuit and the first input circuit so that the output impedance increases at least in the frequency band of the second signal when disabling, and at least when the second signal is enabled when the disabling is enabled. Setting the second output circuit and the second input circuit such that output impedance is reduced in a frequency band, and output impedance is increased at least in a frequency band of the first signal when disabling; 1 signal, the first output circuit and the first input circuit are enabled. When the second output circuit and the second input circuit are disabled, and when transmitting the second signal, the second output circuit and the second input circuit are enabled, and the first output circuit and the second input circuit are enabled. And a control circuit for disabling the first input circuit and the first input circuit. And a second output circuit provided between the first output circuit and the second input circuit and the first input circuit and the second output circuit. And a filtering circuit for filtering the first signal supplied to the input circuit of (a) and filtering the second signal supplied from the second output circuit to the second input circuit. The transmission circuit according to claim 1, wherein: 3. A first output circuit for outputting a first signal, a first input circuit for receiving the first signal, and a second input circuit for receiving a first signal.
And a second input circuit to which the second signal is input, wherein the output impedance is low at least in the frequency band of the first signal when enabled. And setting the first input circuit so that the output impedance is increased at least in a frequency band of the second signal when disabling, and the output impedance is reduced at least in a frequency band of the second signal when enabled. And setting the second output circuit and the second input circuit so that the output impedance increases at least in the frequency band of the first signal when disabling, the first output circuit and the second output circuit And the first output circuit is provided between the first input circuit and the second output circuit. With filtering said first signal supplied to the first input circuit from the road, the supplied to the second input circuit from said second output circuit second
A filtering circuit for filtering the signal of the above, provided between the filtering circuit and the first output circuit,
In the enabled state, the first signal is supplied from the first output circuit to the filtering circuit without attenuation, and in the disabled state, the first signal is attenuated from the first output circuit to the filtering circuit. An attenuation circuit to be supplied, and when transmitting the first signal, at least the first input circuit and the attenuation circuit are enabled,
The second output circuit and the second input circuit are disabled, and when transmitting the second signal, the second output circuit and the second input circuit are enabled, and at least the second output circuit and the second input circuit are enabled. A transmission circuit comprising: an input circuit according to claim 1; and a control circuit that disables the attenuation circuit. 4. A first output circuit for outputting a first signal, a first input circuit for receiving the first signal, and a second input circuit for receiving a first signal.
And a second input circuit to which the second signal is input, wherein the output impedance is low at least in the frequency band of the first signal when enabled. And setting the first output circuit such that the output impedance is increased at least in the frequency band of the second signal when disabling, and the output impedance is reduced at least in the frequency band of the second signal when enabled. And setting the second output circuit and the second input circuit so that the output impedance increases at least in the frequency band of the first signal when disabling, the first output circuit and the second output circuit And the first output circuit is provided between the first input circuit and the second output circuit. With filtering said first signal supplied to the first input circuit from the road, the supplied to the second input circuit from said second output circuit second
A filtering circuit for filtering the signal of the above, provided between the filtering circuit and the first input circuit,
In an enabled state, the first signal is supplied from the filtering circuit to the first input circuit without attenuation, and in a disabled state, the first signal is attenuated from the filtering circuit to the first input circuit. An attenuation circuit to be supplied, and when transmitting the first signal, at least the first output circuit and the attenuation circuit are enabled,
The second output circuit and the second input circuit are disabled, and when transmitting the second signal, the second output circuit and the second input circuit are enabled and the first output circuit and the second input circuit are enabled. And a control circuit for disabling the attenuation circuit.