JP2002102514A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To stably actuate a specific board by suppressing noises which tend to enter into the specific board through a plurality of routes. SOLUTION: For a game machine such as a Pachinko machine, a first board 3 includes a first circuit 3b, a second circuit 3c, a first noise suppressing means 3a and a second noise suppressing means 3e. A second board 3 is electrically connected to the second circuit 3c by the use of a signal line 5 and a reference line 6. A power board 1 supplies electric power to the first board 3 and the second board 4. The second noise suppressing means 3e is interposed between the second circuit 3c and the ground Gb, and the reference line 6 is electrically connected between the second noise suppressing means 3e and the second circuit 3c. Noises N which tend to enter through a feeder line 2 are suppressed by the first noise suppressing means 3a, while noises N which tend to enter through the signal line 5 and the reference line 6 are suppressed by the second noise suppressing means 3e and allowed to escape to the second board 4 through the reference line 6 along the arrow mark Da in the Figure.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gaming machine and, more particularly, to a technique for suppressing noises from entering a specific board from a plurality of paths.

[0002]

2. Description of the Related Art A gaming machine (e.g., a pachinko machine) installed in a game arcade includes a power supply board for supplying power to a board and various devices, a main control board for controlling the entire game machine, and a display of symbols and the like. Usually, a plurality of boards are provided, such as a display control board for controlling, a sound control board for controlling a sound emitted from a speaker, and the like. In order to perform signal transmission between the substrates, a signal line for transmitting the signal itself and a reference line for supplying a reference potential (ground potential; for example, 0 volt) are electrically connected.

Meanwhile, in a general game arcade, noise is flooding due to various factors, and if the noise (especially high-frequency noise) enters the board through the reference line, the board may malfunction. That is, the noise propagates through the stray capacitance between the wiring on the substrate and the stray capacitance of the element itself, and may cause a malfunction of the substrate, for example, by changing memory contents or changing a signal of a bus line. .

[0004]

For example, a main control board receives power supply from a power supply board through a supply line, and transmits a corresponding signal to a display control board, a sound control board, and the like through a signal line and a reference line. Therefore, the main control board
Noise can intrude from multiple paths through the supply line on the input side and the signal and reference lines on the output side. When noise enters the main control board through the supply line, power supplied to a circuit formed on the main control board becomes unstable. Further, when noise enters the main control board through a signal line or a reference line, the reference potential of the main control board changes and the potential relative to the reference potential falls below the threshold. In any of these cases, the circuit may malfunction. The present invention has been made in view of such a point, and suppresses a noise that attempts to enter a specific board such as a main control board from a plurality of paths, thereby stably operating the specific board. It is an object to provide a gaming machine that can be operated.

[0005]

Means 1 for Solving the Problems Means 1 for solving the problems are as described in claim 1. Here, the terms described in claim 1 are interpreted as follows. This interpretation applies to the other claims and the detailed description of the invention. (1) “First circuit” and “second circuit” both mean any circuit that can be formed on a substrate, and are composed of an IC or one or more elements. For example, a CPU circuit, a reset circuit, an oscillation circuit, an interface circuit, and the like correspond. These interpretations are the same for the “third circuit” described later. (2) "First noise suppression means" and "second noise suppression means" mean all elements and circuits capable of suppressing the intrusion of noise, such as coils (including choke coils) and resistors. . Note that the first noise suppression unit and the second noise suppression unit may be configured by the same element or circuit, or may be configured by different elements or circuits. In addition, these interpretations are the same for noise suppression units such as a “third noise suppression unit”, a “fourth noise suppression unit”, and a “fifth noise suppression unit” described later. (3) The "first board" and the "second board" can be installed in a gaming machine except for the power supply board, such as a main control board, a display control board, a sound control board, a winning ball control board, a relay board, and the like. All substrates correspond.

According to the means 1, as schematically shown in FIG. 1, the first substrate 3 includes a first ground Gb, and a first circuit 3b and a second circuit 3c electrically connected to the first ground Gb. And a first noise suppression unit 3a and a second noise suppression unit 3e for suppressing the intrusion of the noise N. Second
The substrate 4 uses the signal line 5 and the reference line 6 to
c and was electrically connected. The power supply substrate 1 supplies power to the first substrate 3 from the supply line 2 through the first noise suppression unit 3a, and supplies power to the second substrate 4 through the supply line 2. The second noise suppressing means 3e is interposed between the second circuit 3c and the first ground Gb, and the reference line 6 is electrically connected between the second noise suppressing means 3e and the second circuit 3c. I do. The first noise suppression means 3a suppresses the noise N which is going to enter through the supply line 2, and the second noise suppression means 3e suppresses the noise N which is going to enter through the signal line 5 and the reference line 6. Through the second substrate 4 along the arrow Da. Therefore, since the noise N that tries to enter from a plurality of paths is suppressed, the first substrate 3 can be operated stably.

[0007]

Means for solving the problem 2 Means for solving the problem are as described in claim 2. Means 2
According to this, the second substrate 4 includes the second ground Gc and the third circuit 4b electrically connected to the second ground Gc. Further, the reference line 6 and the supply line 2 are connected to the second ground Gc.
Through the electrical connection. The noise N, which is suppressed from entering the first substrate 3 by the second noise suppressing means 3e, can enter the second substrate 4 through the reference line 6, but the reference line 6
Is connected to the supply line 2 through the second ground Gc, and can escape to the power supply substrate 1 via the supply line 2. Therefore, the first substrate 3 can be operated more stably.

[0008]

Means for solving the problem 3 Means for solving the problem are as described in claim 3. Means 3
According to this, the power supply substrate 1 includes the third ground Ga. Then, the first impedance (Za) from the first point Pa to the third ground Ga between the first circuit 3b and the first ground Gb, and the second circuit 3c from the first point Pa to the second noise suppressing means 3e. , The second impedance (Zb) from the second point Pb to the third ground Ga through the reference line 6 and the second ground Gc. ) In order to make the magnitude of the impedance the same or smaller (ie, Z
a ≧ Zb ≧ Zc). With this configuration, the noise N that is going to enter the first substrate 3 through a plurality of paths can be released to the third ground Ga having a low impedance, so that the first substrate 3 can be operated more stably.

[0009]

Means 4 is a third noise suppressing means 3 for interposing a first substrate 3 between a first circuit 3b and a first ground Gb to suppress intrusion of noise N.
d. In this way, the noise N that is about to enter the first circuit 3b is suppressed by the third noise suppression means 3d.
The first circuit 3b can be more reliably operated stably. Similarly, the second substrate 4 includes a fourth noise suppression unit 4c interposed between the third circuit 4b and the second ground Gc to suppress the intrusion of the noise N. In this way, since the noise N that is going to enter the third circuit 4b is suppressed by the fourth noise suppression means 4c, the third circuit 4b can be operated more reliably and stably.

[0010]

Means for Solving the Problems 5 In the means 5, the second substrate 4 is provided with a fifth noise suppressing means 4a for suppressing the intrusion of the noise N. The power supply substrate 1 supplies power to the second substrate 4 from the supply line 2 through the fifth noise suppression unit 4a. Noise N trying to enter the second substrate 4 through the supply line 2
Is suppressed by the fifth noise suppressing means 4a, so that the second substrate 4
Can be operated stably.

[0011]

Embodiments of the present invention will be described below with reference to the drawings. This embodiment is an example in which the present invention is applied to a pachinko machine, which is one of gaming machines, and will be described with reference to FIGS. It should be noted that the front side of the pachinko machine (the side on which the player plays a game) is not directly related to the gist of the present invention, so that illustration and description thereof are omitted. In addition, the term “connection” means electrical connection. Further, the term “substrate” simply means at least one substrate provided in a pachinko machine. The reference potential is, for example, 0 volt, but may be any potential.

The schematic configuration of the pachinko machine 10 on the rear side will be described with reference to FIG. The support frame 14 assembled on the back side of the base frame is configured to allow a game board to be mounted. With the game board attached to the support frame 14, the back set member 19 is attached from the back side of the game board,
The game board is fixed by fastening the back set member 19 with the plurality of fasteners 12. The back set member 19 is configured to be openable and closable with respect to the base frame, and the back cover 17, the ball tank 42,
It includes a guide gutter 40, a launch control device 25, and the like. Therefore, the game board can be detached or replaced by opening and closing the back set member 19.

The back cover 17 includes a character device (center character) having movable bodies such as wings, a rotating body, and a character, and a display control board 15 for controlling the display of symbols and the like on a liquid crystal display or the like.
And so on from the back side. Further, on the back side of the back cover 17, a main control board 18 for controlling almost the entire pachinko machine 10, a lamp control board 16 for controlling lighting and blinking of a decoration lamp and the like, and a sound control for controlling a sound emitted from a speaker. A substrate 30 and the like are provided. The delivered pachinko balls are temporarily stored in the ball tank 42 and then sent out to the dispensing device 28 via the guide gutter 40. The payout device 28 receives the payout command transmitted from the main control board 18 and pays out a required number of pachinko balls to the upper plate and the lower plate provided on the front side. The firing control device 25 controls the operation of the firing motor 22 to cause the firing member 20 to reciprocate, thereby hitting the pachinko balls supplied from the upper plate into the game area of the game board. The strength of firing the pachinko ball by the firing member 20 can be adjusted by the strength adjusting mechanism 24. The firing motor 22, the firing member 20, and the strength adjusting mechanism 24 are provided on a base frame. For example, a servo motor is used as the firing motor 22, but another type of motor such as a pulse motor may be used. On the front side of the payout device 28 (on the back side of the drawing in FIG. 2), there is provided a prize ball control board 27 that receives a signal output from the main control board 18 and controls the operation of the payout device 28 and the like. In addition, a power supply board 34 provided in a switchboard 36 for distributing power supplied from the power cord 32 to each device.
And a connection board 38 provided between the lamp control board 16 and the sound control board 30, and a connection board 26 provided below the payout device 28.

In the pachinko machine 10 configured as described above, the power supply board 34 is connected as shown in FIG. 3 to supply power to two boards (for example, the main control board 18 and the prize ball control board 27). That is, the power supply board 34 is connected to the ground G2 (third ground Ga), a noise filter 50 for removing noise included in the AC power supply AC (for example, 24 volts), and an AC from which the noise has been removed by the noise filter 50 by a diode bridge. A capacitor C2 for smoothing a pulsating current generated by full-wave rectification, and a diode D
2, a stabilized power supply circuit 52 that inputs the voltage rectified by 2, stabilizes and outputs the first voltage Vc (for example, 5 volts), stores the first voltage Vc via a diode D6, and stores the second voltage Vb (for example, 5 volts) output capacitor C6
A diode D6 for preventing backflow of the electric power stored in the capacitor C6, a capacitor C4 for rectifying and adjusting to a third voltage Vd (for example, 34 volts), and a resistor R2.
And a diode D4. Note that the first voltage V
c, the second voltage Vb, the third voltage Vd, etc.
This is a relative potential difference using G4, G6, and the like as reference potentials.

Here, the ground terminal (GND) of the stabilized power supply circuit 52 and one side of the capacitor C6, the capacitor C4 and the resistor R2 opposite to the side connected to the diode D6 are all connected to the common ground G2. I do. Also, both the input terminal and the output terminal of the noise filter 50
Surge energy due to static electricity or lightning
Connect a surge absorbing element that can absorb y). One side of the AC power supply AC is connected to a frame ground terminal FG for grounding via an arrester AR. The arrester AR is a discharge tube (element) in which a minute gap is provided between two electrodes and a fluid (gas or liquid) is sealed, and has a function of discharging the surge energy as in the case of the surge absorbing element. Between the diode bridge and the diode D2,
A power thermistor NTC (Negative Temperature Coefficient) for preventing inrush current that may occur when power is turned on is provided.

Next, the main control board 18 includes a power supply board 34.
A choke coil 60 capable of suppressing the intrusion of noise N entering the supply cables J2, J4, and J6, a CPU circuit 62 operable upon receiving the first voltage Vc or the second voltage Vb, The operation of the interface circuit 64 for transmitting a required signal from the signal output terminal (Dx) of the CPU circuit 62 to the prize ball control board 27, and the operation of the solenoid 70 that receives the third voltage Vd and opens and closes the open / close lid provided in the special winning opening And a transistor Q2 for controlling

The choke coil 60 including the coils L10, L12, L14 has the coils L10, L12, L
It is desirable to use a common mode choke coil in which 14 are twisted together. When a plurality of coils are twisted, counter-electromotive forces generated as noise (current) passing in the same phase increases / decreases each other, so that the noise can be efficiently removed. Also, the coil L1
Since 0, L12, and L14 have a property that the impedance increases as the frequency of the passing signal increases, they act as low-pass filters. Therefore, the coil L
10, L12 and L14 are supply cables J2, J4 and J6.
To remove noise N (particularly high frequency components)
Intrusion into the U circuit 62 can be suppressed. When the common mode choke coil is arranged on the board, do not draw a wiring pattern such as a ground or signal line near or immediately below the common mode choke coil (including other layers in a multilayer board). It is desirable to design the artwork of the substrate (pattern design). This can prevent the noise N from transferring from the common mode choke coil to the wiring pattern through the stray capacitance generated between the common mode choke coil and the wiring pattern.

A supply cable J2 connects between the voltage output terminal (Vcc) of the stabilized power supply circuit 52 and the coil L10,
Together with the supply cable J4 connecting between the ground terminal (GND) of the stabilized power supply circuit 52 and the coil L12,
The first voltage Vc is supplied to the main control board 18. Also,
The supply cable J4 is connected to the ground G2 of the power supply board 34, the ground G4 of the main control board 18, and the prize ball control board 2
7 is connected to the ground G8. The supply cable J6 connects the connection point between the diode D6 and the capacitor C6 and the coil L14, and supplies the second voltage Vb to the main control board 18 together with the supply cable J4. Further, the supply cable J8 includes a diode D4 and a capacitor C
The third voltage Vd is supplied to the main control board 18 and the prize ball control board 27 from a connection point with the fourth.

The CPU circuit 62 includes a CPU 66, a ROM, an input / output circuit, and the like, and a RAM 66 capable of storing required data in order to realize a pachinko game performed by the pachinko machine 10. When the CPU circuit 62 receives the supply of the first voltage Vc at the voltage input terminal (Vcc), all elements and circuits operate, but supplies only the second voltage Vb to the voltage input terminal (Vbb).
When the data is received by the user, it operates so that required data stored in the RAM 66 can be held. That is, the first voltage Vc normally functions as a main power supply, and when power cannot be supplied from the main power supply, such as during a power failure, the second voltage Vb functions as a backup power supply. As described above, the noise suppression means such as a coil is also connected to the supply section of the backup power supply, so that malfunction of the board or circuit can be prevented even when power is supplied from the backup power supply. . For example, an SRAM is used as the RAM 66, but other types of memories (EEPROM,
Flash memory or the like). The above-mentioned required data includes, for example, various random numbers (for example, random numbers for jackpot determination, random numbers for jackpot design, reach pattern random numbers, etc.),
There are the number of rounds (current round number, last round number, etc.), the number of reserved balls (for gate and starting port, etc.), and probability variation data indicating whether or not probability variation occurs.

A ground terminal (GND) of the CPU circuit 62
Is connected to the ground G6 via the coil L16, and the interface circuit 64 is connected to the ground G6 via the coil L18.
Connect to For the interface circuit 64 and an interface circuit 84 described later, for example, a model 74VHC14 or the like is used as a buffer with a CMOS Schmitt trigger inverter manufactured by Toshiba Corporation that can adjust the signal level for transmitting a signal with a predetermined power. The CPU circuit 6
When the coil L16 (third noise suppression means 3d) is connected between the ground G6 and the ground G6,
CPU circuit 6 that suppresses noise N that is about to enter from
2 can be protected. The base terminal of the transistor Q2 is connected to the signal output terminal (Dx) of the CPU circuit 62, the collector terminal is connected to the solenoid 70, and the emitter terminal is connected to the ground G4.

Next, the prize ball control board 27 is provided with a choke coil 8 capable of suppressing the intrusion of noise N entering the supply cables J2, J4 and J6 for connection with the power supply board 34.
0, the CPU circuit 82 operable by receiving the first voltage Vc or the second voltage Vb, and a required signal output from the main control board 18 to a signal input terminal (D
x) and the third voltage Vd
It has a transistor Q4 for controlling the operation of the payout motor 72 for paying out award balls and lending balls in response to this.

Here, the output side of the interface circuit 64 and the input side of the interface circuit 84 are connected by a signal cable J10, and the interface circuit 64 and the coil L are connected.
Between the connection point to the ground 18 and the ground G8.
Connect at 12. Normally, since the output impedance of the interface circuit 64 is lower than the input impedance of the interface circuit 84, the noise N entering the signal cable J10 flows along the arrow D4, and the noise N entering the reference cable J12 corresponds to the arrow D6. Flows along. Since the ground terminal (GND) of the interface circuit 84 is connected to the ground G8, the noise N flowing through the signal cable J10 flows to the ground G8 along the arrow D8.

As the choke coil 80 having the coils L20, L22 and L24, it is desirable to use a common mode choke coil as in the case of the choke coil 60 described above. The supply cable J2 connects between the voltage output terminal (Vcc) of the stabilized power supply circuit 52 and the coil L20, and the ground terminal (GND) of the stabilized power supply circuit 52 and the coil L22.
The first voltage Vc is supplied to the award ball control board 27 together with the supply cable J4 connected between the two. Further, the supply cable J4 connects the ground G2 of the power supply board 34 and the ground G10 of the award ball control board 27. The supply cable J6 connects the connection point between the diode D6 and the capacitor C6 and the coil L24, and supplies the second voltage Vb to the prize ball control board 27 together with the supply cable J4.

The CPU circuit 82 includes a CPU, a ROM, a RAM, an input / output circuit, and the like in order to control the payout of the prize ball or the lending ball. The CPU circuit 82 is a CPU
Similarly to the circuit 62, when the supply of the first voltage Vc is received at the voltage input terminal (Vcc), all the elements and circuits operate, but when the supply of only the second voltage Vb is received at the voltage input terminal (Vbb). It operates so that required data stored in the RAM can be held. The same type of memory as the RAM 66 is used as the RAM. If the coil L26 is interposed between the ground terminal (GND) of the CPU circuit 82 and the ground G10, the noise N which is likely to enter from the ground G10 can be suppressed and the CPU circuit 82 can be protected. Also,
A coil L28 (fourth noise suppression means 4c) is connected between the interface circuit 84 and the ground G10, and the interface circuit 84 is directly connected to the ground G8. The coil L28 suppresses the noise N that is about to enter from the ground G10, and as a result, is interposed between the ground G8 and the ground G10, and thus corresponds to the fifth noise suppression unit 4a. Moreover,
The base terminal of the transistor Q4 is connected to the signal output terminal (Dx) of the CPU circuit 82, the collector terminal is connected to the dispensing motor 72, and the emitter terminal is connected to the ground G8. The payout motor 72 is also connected to the ground G8.

In the award ball control board 27, the ground G8
Since the coil L22 of the choke coil 80 (the fifth noise suppression means 4a) is interposed between the ground and the ground G10,
CPU circuit 82 from ground G8 to ground G10
And the like, which is trying to invade the device.
Further, the ground G2 of the power supply board 34 is set to the position P2, and C
The ground terminal (GND) of the PU circuit 62 is at position P4, the connection point where the signal cable J10 is connected between the interface circuit 64 and the coil L18 is at position P6, and the ground G8 of the prize ball control board 27 is at position P8. When
Adjust the impedance as follows. That is, impedance Z2 from position P4 to position P2, position P4
From the position P6 to the position P6, and the impedance Z from the position P6 to the position P2 via the position P8.
The magnitude of the impedance is adjusted to be the same or smaller in the order of No. 6 (that is, Z2 ≧ Z4 ≧ Z6 is satisfied).

According to the above configuration, the following effects can be obtained. (1) The power supply board 34 (power supply board 1)
Choke coil 60 from 2, J4, J6 (supply line 2)
The main control board 1 through the (first noise suppression means 3a)
8 (first substrate 3). Further, a coil L18 (second noise suppressing means 3e) is interposed between the interface circuit 64 (second circuit 3c) and the ground G6 (first ground Gb), and a coil L18 and the interface circuit 64 are interposed between the coil L18 and the interface circuit 64. The reference cable J12 (reference line 6) was connected {see FIG. 3}. Supply cable J2
The noise N trying to enter through J4 and J6 is suppressed by the choke coil 60, the noise N trying to enter through the signal cable J10 or the reference cable J12 is suppressed by the coil L18, and the reference cable J1.
Arrow D2 on the prize ball control board 27 (second board 4)
Missed along. Therefore, since the noise N which tries to enter from a plurality of paths is suppressed and the malfunction is reduced, the main control board 18 (specific board) can be operated stably.

(2) The prize ball control board 27 is connected to the ground G8.
Interface circuit 8 connected to (second ground Gc)
4 (third circuit 4b), and the supply cable J4 and the reference cable J12 are connected through the ground G8.
See｝. The noise N, which is suppressed from invading the main control board 18 by the coil L18 (that is, noise trying to invade from the signal cable J10 or the reference cable J12), can invade the prize ball control board 27 through the reference cable J12. However, since the reference cable J12 is connected to the supply cable J4 through the ground G8, the noise N can be finally released to the power supply board. Therefore, the main control board 18 can be operated more stably. Instead of connecting the supply cable J4 and the signal cable J10 through the ground G8, the supply cable J4 is connected to a dedicated line (connection portion) independent of a circuit or a line separately from the ground G8.
4 and the signal cable J10, or the supply cable J4 and the signal cable J10 may be directly connected. Even in these cases, the noise N can escape to the power supply board 34 via the supply cable J4.
The main control board 18 can be operated more stably.

(3) Impedance Z2 (first impedance) from position P4 to position P2, impedance Z4 (second impedance) from position P4 to position P6, impedance from position P6 to position P2 via position P8 The magnitude of the impedance was adjusted to be the same or smaller in the order of Z6 (third impedance). By this adjustment, the noise N that is going to enter the main control board 18 through a plurality of paths can be given a directivity to the ground G2 having a low impedance and the unnecessary noise N can be released in a certain direction. The substrate 18 can be protected with the highest priority and can be operated stably. It should be noted that while the equality holds when Z2 ≧ Z4 ≧ Z6 when the impedance is matched, the noise N that can enter the CPU circuit 62 of the main control board 18
(Current value) is reduced by impedance matching, so that the possibility of erroneous operation is reduced as compared with the related art.

[Other Embodiments] The above-described pachinko machine 1
In 0 (gaming machine), the structure, shape, size, material, arrangement, operating conditions, and the like of other portions are not limited to the above-described embodiment. For example, each of the following embodiments to which the above embodiment is applied may be implemented. (1) In the above embodiment, the present invention is applied to the pachinko machine 10. Instead of this form, a game machine other than a pachinko machine (for example, a slot machine, an arrangement ball machine, a sparrow ball game machine, a video game machine, etc.) having a first substrate, a second substrate, and a power supply substrate The present invention can be applied to the same manner. Even in the case of the other gaming machines, since noises that try to enter from a plurality of routes are suppressed and malfunctions are reduced, a specific board can be operated stably.

(2) In addition to the configuration shown in the above embodiment, the following components as shown in FIG. 4 may be provided. In FIG. 4, the same elements as those shown in FIG. 3 are denoted by the same reference numerals, and a circuit (a capacitor C4, a resistor R2, etc.) for outputting the third voltage Vd, a supply cable J8, a transistor Q2, a solenoid 70, etc. Are not shown. First, the power supply board 34 is connected to the output terminal of the noise filter 50 to monitor a power failure (including an instantaneous power failure) of the AC power supply AC, and a signal output from the power failure detection circuit 56 is mainly provided. An interface circuit 58 for transmitting the control circuit 18 to the control board 18. In order to transmit a power failure detection signal from the power failure detection circuit 56 of the power supply board 34 to the main control board 18 through the interface circuit 58, a signal cable J1 is connected between the power supply board 34 and the main control board 18.
Connect with 4.

Next, while the power failure detection signal output from the power failure detection circuit 56 is input to the interruption terminal (NMI) of the CPU circuit 62, the digital filter 69 and the EMI (Electromagnetic Interference; Noise interference) filter L19. The digital filter 69 allows only the signal output from the power failure detection circuit 56 to pass therethrough, removes noise N from the signal cable J14, and suppresses intrusion. EMI filter L19 is CPU
It is desirable to make a connection immediately before the interrupt terminal (NMI) of the circuit 62 to suppress noise that has directly entered a line in the main control board 18 due to impulse or static electricity. An EMI filter L17 is connected between the reset circuit 68 and a reset terminal (RST) of the CPU circuit 62 so that a reset signal output from the reset circuit 68 can be input. The EMI filter L17 is desirably connected immediately before the reset terminal (RST) of the CPU circuit 62, and has the same function as the EMI filter L19 described above.

When the above-described elements are provided, the power failure detection circuit 5
6 can be reliably transmitted to the CPU circuit 62 without being affected by the noise N.
Note that the power failure detection circuit 56, the interface circuit 58, the reset circuit 68, the digital filter 69, the EMI filter L19, and the like can be configured in the above-described embodiment. Also, the EMI filters L17, L1
Instead of at least one of the nine, a normal coil may be used. Even in this case, it is possible to suppress noise that has directly entered due to impulses or static electricity.

(3) In the above embodiment, the power supply board 34
The present invention is applied between the main control board 18 and the prize ball control board 27 (see FIG. 3). Instead of this form,
Supply cable J2, J4, J6, J8, signal cable J
10, the present invention can be similarly applied to two or more boards (other than the boards, terminal boards or devices may be used) that can be connected to the power board 34 using the reference cable J12 or the like. It is. For example, the display control board 15, the lamp control board 16, the emission control device 25, the payout device 28, the connection boards 26 and 38, the relay board, and other devices provided in the pachinko machine 10 correspond thereto. Also in this case, the same effect as in the above-described embodiment can be obtained.

(4) In the above embodiment, the prize ball control board 27, which operates in response to a signal output from the main control board 18, is connected to the ground G8 as a path for escaping the noise N.
And a ground G10 common to circuits such as the CPU circuit 82 and the interface circuit 84 (see FIG. 3).
Instead of this form, the ground G8 and the ground G10 may be directly connected as a common ground. When the prize ball control board 27 is constituted by one ground as described above, the noise N that has entered the signal cable J10 or the reference cable J12.
Increases the possibility of causing the CPU circuit 82, the interface circuit 84, and the like to malfunction. In the case of using one ground, the CPU circuit 82 also corresponds to the third circuit 4b. However, normally, a signal is transmitted from the main control board 18 to the prize ball control board 27 at an appropriate interval (for example, every 4 milliseconds), so that the circuit provided in the prize ball control board 27 malfunctions temporarily. Even if there is a signal output later from the main control board 18, it will operate normally. Therefore, even if the prize ball control board 27 temporarily malfunctions, the operation returns to the normal state immediately, so that the operation of the main control board 18 can be stabilized more reliably and the operation of the board as a whole can be stabilized. In order to actively protect the circuit (especially the CPU circuit 82) provided on the award ball control board 27 from the noise N, a noise suppressing means (for example, the coils L26 and L28 shown in FIG. 3) is provided between the circuit and the ground. It is desirable that the connection be made with an intervening).

(5) In the above embodiment, the capacitor C
The second voltage Vb is stored by using No. 6 (see FIG. 3). Instead of this mode, a storage battery (battery; including a rechargeable battery) may be used. Even when the storage battery is used, the second control board 18 and the prize ball control board 27
The voltage Vb can be supplied.

(6) In the above embodiment, the choke coils 60 and 80 and the coils L16, L18, L26 and L serve as noise suppression means for protecting the circuit on the board from the noise N.
28 (see FIG. 3). Instead of this mode, an element (for example, a resistor or the like) other than the coil may be used as the noise suppression unit. If a resistor is used, the current value at the time of inrush (peak) can be suppressed low together with the effect of suppressing noise N. As the resistor, it is preferable to use a wire-wound type resistor capable of preventing discharge at the time of rush, and it is particularly preferable to use a resistor in which a gap between windings is sealed.

(7) In the above embodiment, the power supply board 34
And the ground G4 of the main control board 18
And the ground G8 of the prize ball control board 27 was connected using the supply cable J4. Instead of this form, the connection may be made using a connection cable independent of the supply cable J4. Even when an independent connection cable is used, the noise N is transmitted from the grounds G4 and G8 to the ground G2.
, The operation of the main control board 18 can be more reliably stabilized.

(8) In the above embodiment, the solenoid 7
Ground G4 whose potential changes greatly by the operation of 0 (load device) and ground G8 whose potential changes greatly by the operation of the payout motor 72 (load device) are ground G2.
To escape the potential change (see FIG. 3). Instead of (or in addition to) this form, a similar effect can be obtained by discharging the noise N using a dischargeable discharge member. As the discharge member, for example, a conductive reinforcing member used for reinforcing a game board or the like, a member formed of a conductive member (for example, a metal plate), and the like correspond.

[0039]

According to the present invention, since noises that enter from a plurality of paths are suppressed, a specific substrate can be operated stably.

[Brief description of the drawings]

FIG. 1 is a schematic view illustrating the concept of the present invention.

FIG. 2 is a rear view showing the appearance of the pachinko machine.

FIG. 3 is a diagram showing a connection example of a power supply board and a main control board and the like.

FIG. 4 is a diagram showing a connection example of a power supply board and a main control board and the like.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Power supply board 2 Supply line 3 1st board 3a 1st noise suppression means 3b 1st circuit 3c 2nd circuit 3d 3rd noise suppression means 3e 2nd noise suppression means 4 2nd board 4a 5th noise suppression means 4b 3rd circuit 4c Fourth noise suppression means 5 Signal line 6 Reference line Ga Third ground Gb First ground Gc Second ground N Noise 10 Pachinko machine (game machine) 15 Display control board (board) 16 Lamp control board (board) 18 Main control Substrate (first substrate) 25 Launch control device (substrate) 26 Connection substrate (substrate) 27 Winning ball control substrate (second substrate) 28 Dispensing device (substrate) 30 Sound control substrate (substrate) 34 Power supply substrate 36 Switchboard (substrate) 38 Connection board (board) 60, 80 Choke coil (noise suppression means) 62 CPU circuit (first circuit) 64 Interface circuit (second time) ) 82 CPU circuit (third circuit) G2 ground (third ground) G4, G10 ground G6 ground (first ground) G8 ground (second ground) L10, L12, L14, L16, L18, L20, L
22, L24, L26, L28 Coil (noise suppression means) L17, L19 EMI filter (noise suppression means) J2, J4, J6, J8 Supply cable (supply line) J10 Signal cable (signal line) J12 Reference cable (reference line) J14 signal cable

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Kazunari Tanaka No. 1 Nishinokawa, Oki-mura, Nishiharu-cho, Nishi-Kasugai-gun, Aichi F-term in Daiichi Shokai Co., Ltd. (reference) 2C088 BC56 BC62 EA10

Claims (3)

[Claims] A first circuit electrically connected to the first ground; a first circuit and a second circuit electrically connected to the first ground; and a first noise suppressing unit and a second noise suppressing unit for suppressing intrusion of noise. A first substrate, a second substrate electrically connected to the second circuit using a signal line and a reference line, and supplying power to the first substrate from a supply line through the first noise suppressing means, and A power supply board for supplying power to the second board through a wire; interposing the second noise suppression means between the second circuit and the first ground; and A gaming machine in which the reference line is electrically connected between two circuits. 2. The gaming machine according to claim 1, wherein the second substrate includes a second ground, and a third circuit electrically connected to the second ground, wherein the reference line and the supply line are connected to each other. A gaming machine electrically connected through the second ground. 3. The gaming machine according to claim 1, wherein the power supply board includes a third ground, a first impedance from a first point between the first circuit and the first ground to a third ground, A second impedance from the first point to a second point where a reference line is electrically connected between the second circuit and the second noise suppression means; a second point to a third ground through the reference line and the second ground; A gaming machine in which the magnitude of the impedance is the same or smaller in the order of the third impedance.