JP4512756B2 - Game machine - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a gaming machine and relates to a technique for preventing malfunction of a control means.
[0002]
[Prior art]
For example, in a pachinko machine, a detector that detects the passage of a pachinko ball is indispensable in order to grasp a change in the gaming state. Upon receiving the signal output from the detector, the CPU circuit provided on the main control board controls the pachinko game. Some main control boards have different signal processing methods for analog signals and digital signals or separate the ground so that they do not affect each other's signals. That is, an analog signal ground and a digital signal ground are separately provided.
[0003]
[Problems to be solved by the invention]
By the way, in a general amusement hall, noise is flooded due to various factors. When the noise (especially high-frequency noise) enters the main control board, for example, the reference potential changes due to the influence of the inductance component of the pattern on one or both of the analog signal ground and the digital signal ground, depending on the path of entry. However, a potential difference may occur between both grounds. When the signal from the detector is transmitted with reference to both grounds, if the potential difference temporarily exceeds the threshold value (threshold value) of the CPU circuit, an error signal occurs, and no signal is output from the detector. Nevertheless, there is a possibility that the CPU circuit may malfunction because it determines that a signal has been input. This situation is the same even in a case where a relatively large current flows through the analog signal ground.
The present invention has been made in view of these points, and an object thereof is to provide a gaming machine that prevents malfunction of the control means by, for example, eliminating an erroneous signal based on a potential difference temporarily generated between grounds. And
[0004]
[Means for Solving the Problem 1]
Means 1 for solving the problem is: A first ground, a second ground, a signal processing means for processing the first signal electrically connected to the first ground and inputted through a signal line; and a signal processing means electrically connected to the second ground. And a control means for performing control based on the second signal processed by the step, wherein the game machine is electrically connected to the second ground and interposed between the signal processing means and the control means. A gaming machine having filter means for transmitting to the control means only when the second signal satisfies a predetermined condition It is. here, Solution 1 The terms described in are interpreted as follows. The interpretation is other Solution The same applies to the detailed description of the invention.
(1) “Control means” means any control means that can be formed on a substrate, and is constituted by one or more elements. For example, a CPU circuit and an interface circuit are applicable. Note that the “board” corresponds to a board that can be installed in the gaming machine, such as a main control board, a display control board, a sound control board, a lamp control board, a prize ball control board, and a connection board.
(2) “Predetermined condition” means a condition that can be appropriately set according to the type of gaming machine, date and time, gaming state, and the like. For example, a condition in which the signal reaches a predetermined value or a predetermined period, exceeds, or falls below is applicable.
[0005]
According to the means 1, as schematically shown in FIG. 1, the gaming machine 1 is connected to the first ground Ga, the second ground Gb, and the second ground Gb and is input through the signal line 5. A signal processing means 6 for processing one signal Sa, a control means 3 that is electrically connected to the second ground Gb and performs control based on the second signal Sb processed by the signal processing means 6, and a second ground Gb A filter means 7 is provided which is electrically connected and is interposed between the signal processing means 6 and the control means 3 and transmits to the control means 3 only when the second signal Sb satisfies a predetermined condition. The ground is separated into a first ground Ga and a second ground Gb, and the control means 3 is electrically connected to the second ground Gb. For example, if a potential difference Vg is temporarily generated between the first ground Ga and the second ground Gb due to some factor, the second signal Sb may be an erroneous signal. The filter unit 7 transmits the second signal Sb to the control unit 3 under the condition that the second signal Sb does not become an erroneous signal (when a predetermined condition is satisfied). By providing the filter means 7 in this way, it is possible to prevent the control means 3 from malfunctioning.
[0006]
[Means for Solving the Problem 2]
Means 2 for solving the problem is: A detector capable of outputting a first signal; a first ground; a second ground; a signal processing means that electrically connects to the first ground and processes the first signal to remove noise; and And a control means for performing control based on the second signal processed by the signal processing means and electrically connected to the two grounds, wherein the signal processing means is electrically connected to the second ground. A gaming machine having a filter means interposed between the control means and the control means for transmitting to the control means only when the second signal satisfies a predetermined condition It is. According to the means 2, the gaming machine 1 is electrically connected to the detector 4 capable of outputting the first signal Sa, the first ground Ga, the second ground Gb, and the second ground Gb. A signal processing means 6 for processing Sa to remove noise N, a control means 3 that is electrically connected to the second ground Gb and performs control based on the second signal Sb processed by the signal processing means 6; And a filter means 7 that is electrically connected to the two grounds Gb and is interposed between the signal processing means 6 and the control means 3 and transmits to the control means 3 only when the second signal Sb satisfies a predetermined condition. Similar to the means 1, the filter means 7 transmits the second signal Sb to the control means 3 under the condition that the second signal Sb does not become an erroneous signal. By providing the filter means 7 in this way, it is possible to prevent the control means 3 from malfunctioning.
[0007]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings. This embodiment is an example in which the present invention is applied to a pachinko machine that is one of gaming machines, and will be described with reference to FIGS. It should be noted that the front side of the pachinko machine (the side on which the player plays) is not directly related to the gist of the present invention, so illustration and description are omitted. Further, when simply referred to as “connection”, it means electrical connection unless otherwise specified. Further, when simply referred to as “substrate”, it means at least one substrate provided in the pachinko machine. The reference potential is, for example, 0 volts, but may be any potential.
[0008]
First, a schematic configuration of the pachinko machine 10 on the back side will be described with reference to FIG. The support frame 14 assembled on the back side of the base frame is configured so that a game board can be attached. With the game board attached to the support frame 14, the back set member 19 is attached from the back side of the game board, and the back set member 19 is fastened with a plurality of fasteners 12 to fix the game board. The back set member 19 is configured to be openable and closable with respect to the base frame, and includes a back cover 17, a ball tank 42, a guide rod 40, a launch control device 25, and the like. Therefore, the game board can be attached and detached or exchanged by opening and closing the back set member 19.
[0009]
The back cover 17 covers, from the rear side, an accessory device (center accessory) provided with a movable body such as a blade, a rotating body, and a character, a display control board 15 for controlling display of symbols and the like on a liquid crystal display or the like. To do. Further, on the back side of the back cover 17, a main control board 18 that controls almost the entire pachinko machine 10, a lamp control board 16 that controls lighting / flashing of decorative lamps, etc., and a sound control that controls sound emitted from the speaker A substrate 30 and the like are provided. The delivered pachinko balls are temporarily stored in the ball tank 42 and then sent out to the dispensing device 28 via the guide rod 40. In response to the payout command transmitted from the main control board 18, the payout device 28 pays out a required number of pachinko balls to an upper plate or a lower plate provided on the front side. The firing control device 25 controls the operation of the firing motor 22 to reciprocate the firing member 20 to launch the pachinko ball supplied from the upper plate into the game area of the game board. The strength at which the pachinko ball is fired by the firing member 20 can be adjusted by the strength adjusting mechanism 24. The firing motor 22, the firing member 20, and the strength adjusting mechanism 24 are provided in the base frame. For example, a servo motor is used as the firing motor 22, but other types of motors such as a pulse motor may be used. On the front side (the back side of the drawing in FIG. 2) of the payout device 28 is provided with a prize ball control board 27 that receives the signal transmitted from the main control board 18 and controls the operation of the payout device 28 and the like.
In addition, a power supply board 34 provided in the switchboard 36 to distribute the power supplied from the power cord 32 to each device, a connection board 38 provided between the lamp control board 16 and the sound control board 30, and a dispensing device 28 and a connection board 26 provided below 28.
[0010]
Next, the configuration of the power supply board 34 and the main control board 18 will be described with reference to FIG. First, the power supply board 34 has a noise filter 50 for removing noise included in the AC power supply AC (for example, 24 volts), and a pulsating current generated by full-wave rectification of the AC from which noise has been removed by the noise filter 50 using a diode bridge. The capacitor C2 for smoothing the voltage, the stabilized power circuit 52 for inputting the voltage rectified by the diode D2 and stabilizing and outputting the voltage at the first voltage Vc (for example, 5 volts), and the first voltage Vc via the diode D6. The capacitor C4 that stores and outputs the second voltage Vb (for example, 5 volts), the diode D6 that prevents the backflow of the power stored in the capacitor C4, and the voltage rectified by the diode D4 are input to the third voltage Vd ( For example, a stabilized power supply circuit 54 that stabilizes and outputs the voltage at 12 volts) and a capacitor that further smoothes and outputs the third voltage Vd. Having such support C6.
The first voltage Vc, the second voltage Vb, the third voltage Vd, and the like are relative potential differences using the grounds G2, G4, G6, etc. as a reference potential.
[0011]
Both ground terminals (GND) of the stabilized power supply circuits 52 and 54 and one terminal of the capacitor C4 (on the side opposite to the side connected to the diode D6) are connected in common to the ground G2. A surge absorbing element capable of absorbing surge energy due to static electricity or lightning strike is connected to both the input end and the output end of the noise filter 50. One side of the AC power supply AC is connected to a frame ground terminal FG for grounding via the arrester AR. The arrester AR is a discharge tube (element) in which a minute gap is provided between two electrodes and a fluid (gas or liquid) is enclosed, and has a function of discharging the surge energy in the same manner as the surge absorbing element. Between the diode bridge and the diode D2, a power thermistor NTC (Negative Temparature Coefficient) that prevents an inrush current that may occur when the power is turned on is provided.
[0012]
Next, the main control board 18 includes a choke coil 60 (noise prevention means) capable of preventing the intrusion of noise N that has entered the cables J2, J4, and J6 connected to the power supply board 34, the first voltage Vc or The CPU circuit 62 operable by receiving the second voltage Vb, the signal processing circuit 72 for removing the noise N that has entered the cable J10 by signal processing, and the level of the signal output from the signal processing circuit 72 is adjusted and output. The level adjustment circuit 74, the filter circuit 76 for removing an erroneous signal based on the potential difference Vg temporarily generated between the ground G4 and the ground G6, and the signal output from the level adjustment circuit 74 through the filter circuit 76 are inverted and output. Inverter circuit (negative logic circuit) 64, 66, etc.
Note that the potential difference Vg becomes an error signal when the potential difference Vg temporarily exceeds a threshold value. The third voltage Vd is supplied from a cable J8 that connects the power supply board 34. The third voltage Vd is further supplied to the detector 70 via the cable J10. For the detector 70, a contact type sensor (for example, a switch, a button, a touch panel, a pressure sensor, etc.) or a non-contact type sensor (for example, a proximity sensor, an optical sensor, an infrared sensor, etc.) is used. Further, an interface circuit that transmits a required signal to a substrate such as the display control substrate 15 and an active element that controls the operation of a solenoid that opens and closes an opening / closing lid provided in the big prize opening are not shown.
[0013]
As the choke coil 60 including the coils L10, L12, and L14, it is desirable to use a common mode choke coil in which the coils L10, L12, and L14 are twisted together. When a plurality of coils are twisted together, counter electromotive forces generated in accordance with increase / decrease in noise (current) passing in the same phase cancel each other, so that the noise can be efficiently removed. In addition, the coils L10, L12, and L14 have the property that the impedance increases as the frequency of the signal passing therethrough increases, and thus act as a low-pass filter. Therefore, the coils L10, L12, and L14 can remove noise N (particularly high frequency components) that has entered the cables J2, J4, and J6 and can prevent the CPU circuit 62 from entering.
When the common mode choke coil is placed on the board, do not draw wiring patterns such as ground and signal lines near or directly below the common mode choke coil (including other layers in multilayer boards). It is also desirable to design the substrate artwork (pattern design). In this way, it is possible to prevent the noise N from being transferred from the common mode choke coil to the wiring pattern through the stray capacitance generated between the common mode choke coil and the wiring pattern.
[0014]
The cable J2 connects the voltage output terminal (Vcc) of the stabilized power circuit 52 and the coil L10, and is combined with the cable J4 that connects the ground terminal (GND) of the stabilized power circuit 52 and the coil L12. The first voltage Vc is supplied to the main control board 18. The cable J4 connects the ground G2 of the power supply board 34 and the ground G4 of the main control board 18. The cable J6 connects the connection point between the diode D6 and the capacitor C4 and the coil L14, and supplies the second voltage Vb to the main control board 18 together with the cable J4. The cable J8 supplies the third voltage Vd to the main control board 18 from the connection point between the diode D4 and the capacitor C4.
[0015]
The CPU circuit 62 includes a RAM 68 capable of storing necessary data in addition to a CPU, a ROM, an input / output circuit, and the like in order to realize a pachinko game performed by the pachinko machine 10. The ground terminal (GND) of the CPU circuit 62 is connected to the ground G6. When the supply of the first voltage Vc is received at the voltage input terminal (Vcc), all elements and circuits are operated, but only the second voltage Vb is supplied. When receiving at the voltage input terminal (Vbb), it operates so as to be able to hold the required data stored in the RAM 68. For example, an SRAM is used as the RAM 68, but other types of memories (EEPROM, flash memory, etc.) may be used. The required data described above includes, for example, various random numbers (for example, jackpot determination random numbers, jackpot symbol random numbers, reach pattern random numbers, etc.), rounds (current rounds, final rounds, etc.), reserved balls (gates) And probability variation data indicating whether or not there is a probability variation.
[0016]
The signal processing circuit 72 corresponding to the signal processing means 6 is constituted by resistors R10 and R12 and a capacitor C10, for example. Among these, the resistor R10 and the resistor R12 serve to divide the third voltage Vd, and the integrating circuit composed of the resistor R10 and the capacitor C10 uses an impulse noise N or a mechanically operated detector 70. Has a function of removing chattering noise N that may occur during switching. The resistor R12 and the capacitor C10 are connected in parallel, and one end of each is connected in common to the ground G4. Further, the time when the output signal becomes the same level as the input signal by the integrating circuit is after a time constant (= R10 × C10) has passed after the signal rises. This time constant is set so as to be longer than the period in which the noise N temporarily exceeds the threshold (approximately 10 microseconds in actual measurement). Therefore, the noise N that has entered through the detector 70 and the cable J10 can be released to the ground G4 and removed.
[0017]
The level adjustment circuit 74 is constituted by a resistor R14 and a buffer circuit 78, for example. Among these, the resistor R14 functions to prevent power (voltage, current) exceeding the allowable input power from being input to the buffer circuit 78, and the buffer circuit 78 determines whether the high level signal or the low level depends on whether or not the threshold value is exceeded. It fulfills the function of outputting a signal. For the buffer circuit 78, it is desirable to use model number TC74HC4050 or the like as a high-speed CMOS buffer manufactured by Toshiba Corporation.
[0018]
The filter circuit 76 corresponding to the filter means 7 is constituted by an integrating circuit composed of, for example, a resistor R16 and a capacitor C12, and changes the signal output from the level adjusting circuit 74 according to a predetermined function curve. The output signal becomes the same level as the input signal by the filter circuit 76 after a time constant (= R16 × C12) has passed after the signal rises. This time constant is set so as to be longer than a period in which the potential difference Vg temporarily exceeds the threshold (about 1 millisecond in actual measurement). In other words, the period in which the potential difference Vg temporarily exceeds the threshold is longer than the time constant when the potential difference is intentionally generated. A signal output from the filter circuit 76 is input to the input terminal Dx of the CPU circuit 62 through inverter circuits 64 and 66 connected in series. Therefore, the CPU circuit 62 recognizes the signal as a high level signal or a low level signal depending on whether the signal output from the filter circuit 76 exceeds the threshold value.
[0019]
In the pachinko machine 10 configured as described above, FIG. 4A shows a process for removing an erroneous signal based on the potential difference Vg temporarily generated between the ground G4 and the ground G6, and the main control is performed through the cable J10. FIG. 4B shows a process for removing the noise N that has entered the substrate 18. In FIG. 4, a signal S4 is a signal input to the signal processing circuit 72 through the cable J10 and is also a signal output from the detector 70 (position P4 in FIG. 3), and the signal S6 is input to the level adjustment circuit 74. 3 (position P6 in FIG. 3), signal S8 is a signal input to the filter circuit 76 (position P8 in FIG. 3), and signal S2 is a signal output from the filter circuit 76 (FIG. 3). 3, position P 2), the signal Sd is a signal input to the input terminal Dx of the CPU circuit 62.
[0020]
In FIG. 4A, it is assumed that a potential difference Vg is temporarily generated between the ground G4 and the ground G6 due to some factor when the signal S4 is in the no-signal state. For example, the noise N enters the grounds G4 and G6 through the cable J10, the cable J4, or the like, or a relatively large current generated by an external device such as a motor flows into the ground G4. To do.
Since the ground connected by the signal processing circuit 72 and the level adjustment circuit 74 is different, for example, if the reference potential of the ground G4 is high and the reference potential of the ground G6 is low, the signal S6 changes. That is, the level adjustment circuit 74 outputs the signal S8 as a pulse from time t10 when the signal S6 exceeds the high level threshold TH to time t12 when the signal S6 falls below the low level threshold TL. However, since the pulse of the signal S8 is shorter than the time constant according to the setting described above, the filter circuit 76 outputs a signal S2 that does not exceed the high-level threshold TH. The change component of the signal S2 is eliminated by the inverter circuits 64 and 66, and the signal Sd input to the input terminal Dx becomes no signal. Thus, even when a potential difference Vg that may temporarily become an error signal between the ground G4 and the ground G6 is eliminated (removed) by the filter circuit 76, malfunction of the CPU circuit 62 can be prevented.
[0021]
In FIG. 4B, when the noise N is input as the signal S4 through the cable J10, the noise N is released to the ground G4 through the integration circuit of the signal processing circuit 72. As a result, the signal output from the signal processing circuit 72 has a waveform like the signal S6. That is, since the signal S6 does not exceed the high-level threshold TH, the signal S8 output from the level adjustment circuit 74 is no signal. Therefore, even when the noise N enters through the cable J10, the malfunction of the CPU circuit 62 can be prevented. Even if an error signal based on the potential difference Vg is generated as a result of the noise N being released to the ground G4, there is no problem because the filter circuit 76 removes the error signal as described above.
[0022]
According to the above-described embodiment, the following effects can be obtained.
(A1) Referring to FIG. 3, the ground is separated into the ground G4 (first ground Ga) and the ground G6 (second ground Gb) on the main control board 18, and the CPU circuit 62 (control means 3) is separated. Connected to the ground G6. The signal S4 input through the cable J10 (in other words, the signal output from the detector 70; the first signal Sa) is a signal S8 obtained by removing the noise N by the signal processing circuit 72 and adjusting the signal level by the level adjustment circuit 74. (Second signal Sb). On the other hand, if the potential difference Vg is temporarily generated between the ground G4 and the ground G6 due to some factor and the potential difference Vg exceeds the threshold TH on the high level side, an error signal is generated for the CPU circuit 62. The filter circuit 76 (filter means 7) transmits the signal S8 to the CPU circuit 62 under the condition that the signal S8 (second signal Sb) does not become an erroneous signal (when a predetermined condition is satisfied). By including the filter circuit 76 in this way, it is possible to prevent the malfunction of the CPU circuit 62.
[0023]
(A2) Conventionally, the ground G4 and the ground G6 are not separated but are used as a common ground. For this reason, when the noise N is released to the ground by the signal processing circuit 72, the CPU enters the CPU circuit 62 through the ground, and as a result, the CPU circuit 62 malfunctions. Therefore, as shown in FIG. 3, the common ground is separated into the ground G4 and the ground G6, and the coil L12 (noise suppression means 2) is interposed between the ground G4 and the ground G6. According to this configuration, even when the noise N is released to the ground G4, the coil L12 suppresses entry into the ground G6, so that the operation of the CPU circuit 62 can be stabilized. In addition, since the ground G4 and the ground G6 are connected except that the noise N is prevented from entering, the ground reference potential becomes the same potential in a normal case, and the operation of the main control board 18 as a whole is stabilized. Can do.
[0024]
(A3) The signal processing means 6 connected to the ground G4 removes the noise N that has entered the cable J10 (signal line 5) by signal processing and releases it to the ground G4. Therefore, since the noise N cannot enter the CPU circuit 62, the malfunction of the CPU circuit 62 can be prevented. Note that, if the noise N is released to the ground G4, an erroneous signal based on the potential difference Vg may be generated, but the erroneous signal is removed by the filter circuit 76. Further, when the noise N entering from the cable J4 is suppressed by the coil L12, a potential difference is generated between the ground G4 and the ground G6, and an error signal may be output from the level adjustment circuit 74. Since the erroneous signal is removed by the filter circuit 76, the CPU circuit 62 does not malfunction.
[0025]
[Other Embodiments]
In the pachinko machine 10 (game machine) described above, the structure, shape, size, material, arrangement, operating conditions, etc. of other parts are not limited to the above embodiment. For example, the following forms (b1) to (b6) can also be implemented.
(B1) In the above embodiment, the present invention is applied to the pachinko machine 10. Instead of this form, a gaming machine other than a pachinko machine (for example, a slot machine, an arrangement ball machine, a sparrow ball game machine, a video game machine, etc.), which has a first ground Ga, a second ground Gb, and a control means 3 Similarly, the present invention can be applied to those provided with the above. In the other gaming machines as well, the erroneous signal based on the potential difference Vg temporarily generated between the first ground Ga and the second ground Gb is removed, so that the malfunction of the control means 3 can be prevented.
[0026]
(B2) In the above embodiment, the main control board 18 includes the coil L12 that is interposed between the ground G4 and the ground G6 to suppress the noise N from entering (see FIG. 3). Instead of this form, the coil L12 may be provided in another device, a substrate, or the like. In the example shown in FIG. 5, the coil L <b> 12 is provided on the power supply substrate 34. The coil L12 is interposed between the ground G2 (in place of the ground G4) and the ground G6, and the coil L12 and the ground G6 are connected by a cable J12. In this way, it is possible to suppress noise that attempts to enter through the AC power supply AC.
[0027]
(B3) In the above embodiment, the filter circuit 76 uses a primary filter composed of a resistor R16 and a capacitor C12, inverter circuits 64 and 66, etc. {see FIG. 3}. Instead of this form, another filter or the like shown in FIG. 6 may be used.
First, FIG. 6A shows an example in which a secondary filter is used instead of the primary filter. The secondary filter is composed of an operational amplifier 80, resistors R20 and R22, and capacitors C20 and C22. That is, one input terminal of the operational amplifier 80 is connected to the resistors R20 and R22 connected in series, and is connected in parallel to the ground G6 through the capacitor C22. In addition, a connection point between the resistor R20 and the resistor R22 is connected to the other input terminal through the capacitor C22, and the input terminal is connected to the output terminal. Since the secondary filter efficiently removes high-frequency components, it is possible to remove short pulse error signals based on the potential difference Vg.
[0028]
FIG. 6B shows an example in which a Schmitt trigger circuit 82 is used instead of the inverter circuits 64 and 66. The Schmitt trigger circuit 82 is a circuit capable of forming a hysteresis loop using an upper trigger potential (corresponding to the threshold value TH) and a lower trigger potential (corresponding to the threshold value TL). It is desirable to use model number TC74HC14 or the like as a Schmitt trigger inverter. Even when the input signal is gentle, the Schmitt trigger circuit 82 can accurately transmit the signal S2 output from the filter circuit 76 to the CPU circuit 62 by specifying the hysteresis.
Further, FIG. 6C shows an example in which a three-state buffer circuit 84 and a decoder 86 are used instead of the inverter circuits 64 and 66. The three-state buffer circuit 84 has a control terminal separately from the input terminal and the output terminal, and the output can be brought into a high impedance state by inputting a predetermined signal from the CPU circuit 62 to the control terminal. . For the three-state buffer circuit 84, for example, the above-mentioned model number TC74HC240 is preferably used. According to this circuit configuration, it is possible to reliably transmit a signal input at a short cycle to the CPU circuit 62 while removing an erroneous signal.
[0029]
(B4) In the above embodiment, the CPU circuit 62 is applied as the control means 3 {see FIG. 3}. Instead of this form, any circuit that can be formed on the substrate, such as an interface circuit, a reset circuit, and an oscillation circuit, may be applied as the control means 3. Further, the board provided with the CPU circuit 62 (control means 3) is not limited to the main control board 18, but may be a display control board 15, a sound control board 30, a lamp control board 16, a prize ball control board 27, a connection board 38, or the like. Any substrate that can be installed in the pachinko machine 10 may be applied. Even when these circuits, substrates, and the like are applied, the CPU circuit 62 is protected from the noise N, so that the operation of the CPU circuit 62 can be stabilized.
[0030]
(B5) In the above embodiment, a configuration in which the coil L12 is interposed between the ground G4 and the ground G6 is realized by the main control board 18 (see FIG. 3). Instead of this configuration, a configuration in which the coil L12 is interposed between the ground G4 and the ground G6 may be realized by another substrate (the power supply substrate 34 in the example of FIG. 3). That is, it is not necessary to interpose the coil L12 between the ground G4 and the ground G6 in the same substrate. In this case, a cable for connecting the other substrate and the ground G6 is required. The noise suppression unit 2 is not limited to the coil L12, and may be an element such as a resistor or a capacitor or an arbitrary circuit that can suppress the noise N. Even when these substrates, elements, and circuits are applied, the control means is protected from the noise N, so that the operation of the control means can be stabilized.
[0031]
(B6) In the above embodiment, the signal processing circuit 72 is constituted by the resistors R10 and R12 and the capacitor C10, the level adjusting circuit 74 is constituted by the resistor R14 and the buffer circuit 78, and the filter is constituted by the resistor R16 and the capacitor C12. The circuit 76 is configured {see FIG. 3}. Instead of this form, the signal processing circuit 72 may be configured using any element as long as the noise N can be removed to the ground G4 and removed. Further, the level adjustment circuit 74 may be configured using any element as long as the level of the input signal can be adjusted and output. Furthermore, the filter circuit 76 may be configured using any element as long as the input signal can output the signal when the predetermined condition is satisfied. Even when these circuits are applied, the control means is protected from the noise N, so that the operation of the control means can be stabilized.
[0032]
[Other Embodiments]
Although the embodiment of the present invention has been described above, this embodiment has not only the embodiment of the invention described in the claims but also other embodiments of the invention. Aspects of the present invention are listed below, and related explanations are given as necessary.
[0033]
[Aspect 1] In a gaming machine including a first ground, a second ground, and a control unit that is electrically connected to the second ground and performs control based on an input signal input through a signal line.
It is electrically connected to the second ground and is interposed between the signal line and the control means to eliminate an erroneous signal based on a potential difference temporarily generated between the first ground and the second ground. A gaming machine having a filter means.
[Related Description of Aspect 1] According to this aspect, as schematically shown in FIG. 1, the gaming machine 1 is electrically connected to the first ground Ga, the second ground Gb, and the second ground Gb. The control means 3 that performs control based on the first signal Sa input through the signal line 5 and the first ground Ga that is electrically connected to the second ground Gb and interposed between the signal line 5 and the control means 3 And a filter means for removing an erroneous signal based on the potential difference Vg temporarily generated with the second ground Gb. The ground is separated into a first ground Ga and a second ground Gb, and the control means 3 is electrically connected to the second ground Gb. Even when a potential difference Vg is temporarily generated between the first ground Ga and the second ground Gb due to some factor, the filter means 7 eliminates an erroneous signal based on the potential difference Vg, so that the control means 3 is prevented from malfunctioning. can do. Therefore, the operation of the control means 3 can be stabilized.
[0034]
[Aspect 2] A gaming machine according to Aspect 1, comprising a noise suppression means that is interposed between the first ground and the second ground and is capable of suppressing noise intrusion. [Related Description of Aspect 2] According to this aspect, the gaming machine 1 includes the noise suppression means 2 that is interposed between the first ground Ga and the second ground Gb and that can suppress the intrusion of the noise N. If a common ground is formed by directly connecting the first ground Ga and the second ground Gb as in the prior art, the noise N that has escaped to the ground may enter the control means 3, and as a result, the control means 3 may malfunction. There is. Therefore, the first ground Ga and the second ground Gb are separated, and the noise suppression means 2 is interposed between the two grounds. In this way, even if the noise N is released to the first ground Ga, the noise suppression means 2 suppresses the entry to the second ground Gb, so that the operation of the control means 3 can be stabilized. Since the first ground Ga and the second ground Gb are electrically connected except for suppressing the intrusion of the noise N, the reference potential becomes the same potential in the normal case, and the overall operation of the gaming machine 1 Can be stabilized.
[0035]
[Aspect 3] A gaming machine according to Aspect 1 or 2, comprising a signal processing means that is electrically connected to the first ground and processes and removes noise that has entered the signal line.
[Related Description of Aspect 3] According to this aspect, the gaming machine 1 includes the signal processing means 6 that is electrically connected to the first ground Ga and processes and removes the noise N that has entered the signal line 5. . That is, the signal processing means 6 releases the noise N to the first ground Ga and removes it. Regardless of the presence or absence of the first signal Sa, the control means 3 malfunctions in addition to the erroneous signal based on the potential difference Vg when the noise N that has entered the signal line 5 is received. Therefore, if the signal processing means 6 allows the noise N to escape to the first ground Ga, malfunction of the control means 3 can be prevented. If the noise N is released to the first ground Ga, an erroneous signal based on the potential difference Vg may be generated, but there is no problem because the erroneous signal is removed by the filter means 7.
[0036]
【The invention's effect】
According to the present invention, even when a potential difference is temporarily generated between the first ground and the second ground, the filter means removes an erroneous signal based on the potential difference, so that the control means can be prevented from malfunctioning. it can.
[Brief description of the drawings]
FIG. 1 is a diagram schematically showing the outline of the present invention.
FIG. 2 is a rear view showing the appearance of the pachinko machine.
FIG. 3 is a diagram illustrating a configuration example of a power supply board and a main control board.
FIG. 4 is a time chart showing an error signal and noise processing process;
FIG. 5 is a diagram illustrating another configuration example of a power supply board and a main control board.
FIG. 6 is a diagram illustrating another configuration example according to the filter circuit.
[Explanation of symbols]
1 gaming machine
2 Noise suppression means
3 Control means
4 Detector
5 signal lines
6 Signal processing means
7 Filter means
Ga first ground
Gb 2nd ground
Sa first signal
Sb second signal
Vg potential difference
10 Pachinko machines (game machines)
15 Display control board
16 Lamp control board
18 Main control board
25 Launch control device
26 Connection board
27 Prize ball control board
28 Dispensing device
30 sound control board
34 Power supply board
36 Switchboard
38 Connection board
52, 54 Stabilized power supply circuit
60 Choke coil (noise suppression means)
62 CPU circuit (control means)
64, 66 inverter circuit
68 RAM (storage unit)
70 detector
72 Signal processing circuit (Signal processing means)
74 Level adjustment circuit (level adjustment means)
76 Filter circuit (filter means)
78 Buffer circuit
80 operational amplifier (filter means)
82 Schmitt trigger circuit (filter means)
84 Three-state buffer (filter means)
86 Decoder (filter means)
G4 ground (first ground)
G6 ground (second ground)
L10, L12, L14 Coils (noise suppression means)

Claims (1)

A proximity sensor capable of detecting the passage of the pachinko sphere and outputting the first signal;
A power supply board that rectifies the supplied AC power supply to generate and output a DC power supply;
In a gaming machine comprising a main control board that separates an analog signal ground and a digital signal ground and controls the operation of the gaming machine using a DC power source generated by the power board,
The main control board is
Provided between the ground digital signal and the ground analog signal, a coil for suppressing noise from entering into the ground for digital signals from the ground analog signal,
Said circuit to an analog signal ground and is electrically connected to processing the first signal output from said proximity sensor by removing noise, and the digital signal ground is electrically connected to the noise is removed An interface circuit including a circuit that outputs a high-level signal or a low-level signal as a second signal by comparing the signal with a preset threshold ;
A CPU that is electrically connected to the digital signal ground and performs control based on the second signal processed by the interface circuit;
It is electrically connected to the digital signal ground and is interposed between the interface circuit and the CPU, and is generated due to a potential difference temporarily generated between the analog signal ground and the digital signal ground. A gaming machine having filter means for removing a signal that may be erroneously determined as the second signal.

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