JP2002100673A - Manufacturing method of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device which makes possible to form an element isolation area having such a good shape that does not generate a concavity shape. SOLUTION: An oxidation prevention film 3 having an opening of an element isolation forming area and a base insulation film 2 are formed on the semiconductor substrate 1. Thereafter an oxidation film 4 having a bird's beak portion 4a is formed under the edge of an oxidation prevention film 3 by thermal oxidation of the semiconductor substrate 1 by using the oxidation prevention film 3 as an oxidation prevention mask. The oxide film 4 is etched by using the oxidation prevention film 3 as an etching mask, and followed by etching of the semiconductor substrate 1 to a fixed depth to form an isolation trench 5. At this time, the bird's beak part 4a is remained under the edge of the oxidation film 3. Thereafter an insulation film is stacked on the semiconductor substrate 1, and an useless insulator film on the oxidation prevention film 3 is removed to form the trench type element isolation area by burying an insulation film for separation in the separation trench 5.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device in which an isolation insulating film is buried in an isolation trench to form an element isolation region.

[0002]

2. Description of the Related Art With the demand for higher density and higher integration of semiconductor devices, it has become important to form element isolation regions with a finer isolation width in order to miniaturize semiconductor elements. Therefore, instead of the conventional LOCOS isolation formation method, a trench isolation formation method in which an isolation insulating film is buried in an isolation groove provided in a semiconductor substrate to form an element isolation region has been used.

A method of manufacturing a semiconductor device using a conventional trench isolation forming method will be described below. FIG.
FIG. 4D is a cross-sectional view showing a manufacturing process of a semiconductor device using a conventional trench isolation formation method in which an isolation insulating film is buried in an isolation trench to form an element isolation region.

First, as shown in FIG. 4A, after an oxide film and a nitride film are formed on a semiconductor substrate 50, a nitride film and an oxide film are formed by using a resist 53 having an opening for an element isolation region as an etching mask. Is performed to form a nitride film 52 and an oxide film 51 on the active region.

Next, as shown in FIG. 4B, after the resist 53 is removed, the semiconductor substrate 50 is anisotropically etched to a predetermined depth using the nitride film 52 as an etching mask. Isolation grooves 54 in 50 element isolation regions
To form

Next, as shown in FIG. 4C, after an insulating film is deposited on the entire surface of the semiconductor substrate 50 by a CVD method, a nitride film 5 is formed by a chemical mechanical polishing method (CMP) or the like.
By removing the unnecessary insulating film on
An isolation insulating film 55 which is flattened at a height similar to that of the nitride film 52 is formed in the substrate 4.

[0007] Next, as shown in FIG.
By removing the oxide film 2 and the oxide film 51, a trench-type element isolation region including the isolation insulating film 55a is formed. Thereafter, a MIS transistor can be formed by forming, for example, a gate insulating film and a gate electrode on the active region surrounded by the element isolation region made of the isolation insulating film 55a.

[0008]

However, as shown in FIG. 4D, the upper part of the isolation trench 54 in the element isolation region formed of the isolation insulating film 55a formed by the above-described conventional trench isolation formation method. Semiconductor substrate 5 located at
There is a problem that the isolation insulating film 55a near the upper end portion 56 where the upper surface and the side surface of the zero cross each other is etched into a concave shape.

The reason why the isolation insulating film 55a is etched into a concave shape is as follows.

In the step shown in FIG. 4C, the isolation insulating film 5 is formed.
5 is formed, the nitride film 52 is removed,
The upper portion of the side surface of the isolation insulating film 55 that has been in contact with the nitride film 52 is also exposed. With the upper surface and the upper side surface of the isolation insulating film 55 exposed in this manner, sulfuric acid, hydrogen peroxide,
A cleaning step using nitric acid or the like is performed a plurality of times, and an etching step of the oxide film 51 is also performed. At this time, the upper surface and the upper side surface of the isolation insulating film 55 are isotropically etched by the chemical solution in these steps. As a result, before forming the gate insulating film, as shown in FIG. 4D, the insulating insulating film 5 near the upper end 56 of the isolation groove 54 is formed.
5a is isotropically etched into a concave shape, and the upper corner of the separation groove 54 is exposed.

Thereafter, in a MIS transistor manufactured by forming a gate insulating film, a gate electrode, and the like with the upper corner portion of the isolation trench 54 exposed, the upper surface near the upper end portion 56 which is the end of the active region is formed. The electric field concentration from the gate electrode formed from side to side is likely to occur, and MIS transistors having a threshold voltage lower than that of other active regions are formed in parallel. As described above, when one MIS transistor has MIS transistors having different threshold voltages in parallel, the sub-threshold region has a transistor characteristic in which a so-called hump characteristic occurs in the gate voltage dependence of the source / drain current. become.
When this hump characteristic occurs, the off-leak characteristic in the sub-threshold region deteriorates and the standby current as a semiconductor highly integrated circuit increases, and in a DRAM (Dynamic Random Access Memory), the leakage of the retained charge of the memory cell causes the memory to leak. Causes malfunction.
Further, when used in an analog circuit, there is a very serious problem of causing instability of characteristics.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method of manufacturing a semiconductor device capable of forming an element isolation region having a good shape without a concave shape in view of the above problems.

[0013]

According to the method of manufacturing a semiconductor device of the present invention, a step (a) of forming a base insulating film on a semiconductor substrate and a step (b) of forming an oxidation preventing film on the base insulating film are provided. ), Patterning the antioxidant film to form an antioxidant film in which an opening is formed on the element isolation formation region, and (c) using the antioxidant film as an antioxidant mask to heat the semiconductor substrate. (D) forming an oxide film having a bird's beak under the end of the antioxidant mask by performing selective oxidation by an oxidation method; and after step (d), using the antioxidant film as an etching mask, anisotropic dry Etching the oxide film by etching, leaving a bird's beak portion of the oxide film only under the edge of the etching mask (e).
Forming a separation groove by etching the semiconductor substrate to a predetermined depth by anisotropic dry etching using the antioxidant film as an etching mask after the step (e); and After forming an insulating film on the semiconductor substrate, removing the insulating film on the antioxidant film, and embedding the insulating film for isolation only in the isolation trenches; (H) removing the base insulating film after removing the prevention film.

According to this method of manufacturing a semiconductor device, an oxide film is formed by a thermal oxidation method using an antioxidant film as an antioxidant mask, and then the oxide film and the semiconductor substrate are etched using the antioxidant film as an etching mask. Thus, a bird's beak portion of the oxide film surrounding the isolation trench can be formed in a self-aligned manner in the end region of the active region of the semiconductor substrate. By providing the bird's beak portion of the oxide film around the isolation insulating film buried in the isolation trench, it is possible to prevent the formation of a concave region in the element isolation region due to the removal of the base insulating film and the cleaning step.

In the method of manufacturing a semiconductor device, after the step (c) and before the step (d), a step of forming a sidewall serving as an oxidation preventing mask on the side wall of the oxidation preventing film is further provided. In the step (e), an oxide film is formed using the antioxidant film and the sidewall as an antioxidant mask. In the step (e), the oxide film is etched using the antioxidant film and the sidewall as an etching mask.
Then, the semiconductor substrate is etched using the anti-oxidation film and the sidewalls as an etching mask. In the step (h), after removing the anti-oxidation film and the sidewalls, the underlying insulating film is removed to thereby activate the bird's beak. Reduction of the area width can be suppressed, and the active area width can be increased.

In the above-described method for manufacturing a semiconductor device, the width of the sidewall is desirably equal to or larger than the width of the bird's beak portion of the oxide film formed below the end of the oxidation prevention mask.

In the method of manufacturing a semiconductor device, since the oxide film has a thickness three times or more the thickness of the base insulating film, the gate insulating film can be formed even if the base insulating film is removed or a subsequent cleaning step is performed. Even at this point, the surface of the bird's beak can remain at a position higher than the surface of the semiconductor substrate, and good transistor characteristics without electric field concentration can be obtained.

[0018]

Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) FIGS. 1A to 1
2C and FIGS. 2A to 2C illustrate the manufacture of a semiconductor device in which an element isolation region is formed by using both the trench isolation formation method and the LOCOS isolation formation method according to the first embodiment of the present invention. It is sectional drawing which shows a process.

First, in a step shown in FIG. 1A, a semiconductor substrate (silicon substrate) 1 is formed to a thickness of 10 nm by a thermal oxidation method.
Is formed, a 200-nm-thick nitride film is formed on the oxide film by the CVD method. Thereafter, a resist (not shown) having an opening for an element isolation formation region is formed on the nitride film, the nitride film and the oxide film are etched using the resist as a mask, and an oxidation prevention film made of a nitride film is formed on the active region. 3 and an underlying insulating film 2 made of an oxide film,
The resist is removed. After patterning the antioxidant film 3 using the resist as a mask, the resist may be removed, and the underlying insulating film 2 may be patterned using the antioxidant film 3 as a mask. Alternatively, only the oxidation preventing film 3 may be patterned, and the oxide film may not be etched, and may be left as it is as the base insulating film 2 on the element isolation formation region.

Next, in a step shown in FIG. 1B, the semiconductor substrate 1 is thermally oxidized by a LOCOS separation forming method using the antioxidant film 3 as an antioxidant mask to form an oxide film 4 having a thickness of 50 nm.
To form At this time, a so-called bird's beak portion 4a of the oxide film 4 is formed in a region of the semiconductor substrate 1 located below the end of the oxidation prevention film 3. The bird's beak portion 4a needs to be formed to be thicker than the base insulating film 2 and to have a higher surface. Therefore, the bird's beak 4a
In order to form the surface of the substrate higher than the base insulating film 2, the LO
When the COS separation formation method is used, the thickness of the oxide film 4 needs to be at least twice as large as the thickness of the underlying insulating film 2, and in consideration of the reduction in film thickness in the cleaning step, the thickness of the film is three times or more. Thickness is desirable.

Next, in the step shown in FIG. 1C, the oxide film 4 is etched by anisotropic dry etching using the antioxidant film 3 as a mask, and then the semiconductor substrate 1 is etched to a desired depth. For example, a separation groove 5 having a depth of 350 nm is formed. At this time, the bird's beak portion 4a of the oxide film 4 remains below the end of the oxidation prevention film 3.

Next, in the step shown in FIG. 2A, an insulating film such as a silicon oxide film or a TEOS film is formed on the entire surface of the Deposit to a degree. Then, the unnecessary insulating film on the anti-oxidation film 3 is removed by a chemical mechanical polishing method (CMP), an etch-back method, or the like, so that the isolation trench 5 has a flat surface having a height substantially equal to that of the anti-oxidation film 3. The separated insulating film 6 is formed. At this time, before performing the planarization, a resist mask pattern in which the active formation region is inverted is formed in advance, and only the unnecessary insulation film on the active formation region, that is, on the antioxidant film 3 is etched to some extent using this as a mask. After that, planarization may be performed using the above-described method.

Next, in the step shown in FIG. 2B, after the antioxidant film 3 is removed by hot phosphoric acid or dry etching, the underlying insulating film 2 is subjected to isotropic etching using a chemical such as hydrofluoric acid. Remove. By this step, an element isolation region composed of the isolation insulating film 6a and the bird's beak portion 4b is formed. At this time, the isolation insulating film 6 and the bird's beak portion 4a are also isotropically etched as a whole.
Is thinner. However, the surface of the bird's beak portion 4a is higher than the base insulating film 2, and
Since the bird's beak portion 4a is thicker than the base insulating film 2, even if the base insulating film 2 is removed, a concave portion unlike the related art is not formed at the upper end of the separation groove 5.

Next, in a step shown in FIG. 2C, a gate insulating film 7 and a gate electrode 8 are formed on an active region surrounded by an element isolation region constituted by an isolation insulating film 6a and a bird's beak portion 4b. By doing so, a MIS transistor can be formed.

According to this manufacturing method, by forming the bird's beak portion 4a surrounding the isolation groove 5 in the end region of the active region of the semiconductor substrate 1, the concave portion in the element isolation region by the etching or cleaning process of the base insulating film 2 is formed. Generation of a region can be prevented. That is, since the bird's beak portion 4a has a surface higher than the base insulating film 2 and is thicker, the bird's beak portion 4b remains even when the base insulating film 2 is isotropically etched by an amount equivalent to the thickness of the base insulating film 2, so that the concave shape is formed. Is not formed, and the surface of the semiconductor substrate 1 located at the upper end of the separation groove 5 is not exposed. Therefore, when the gate insulating film 7 is formed on the active region of the semiconductor substrate 1 surrounded by the element isolation region including the isolation insulating film 6a and the bird's beak portion 4b, the gate insulating film 7 is formed at the end of the active region.
Since bird's beak portion 4b having a greater thickness is formed, there is no electric field concentration from gate electrode 8, and MIS transistors having a threshold voltage lower than that of other active regions are formed in parallel as in the conventional case. Thus, a MIS transistor having normal and uniform transistor characteristics can be formed.

(Second Embodiment) FIGS. 3A to 3
FIG. 7C is a cross-sectional view showing a manufacturing step of a semiconductor device in which an element isolation region is formed by using both the trench isolation formation method and the LOCOS isolation formation method according to the second embodiment of the present invention.

First, in the step shown in FIG. 3A, an oxide film 2A having a thickness of 10 nm is formed on the semiconductor substrate 1 by a thermal oxidation method, and then a 200 nm thickness is formed on the oxide film 2A by a CVD method.
An m-th first nitride film is formed. Thereafter, a resist (not shown) in which an element isolation formation region is opened on the first nitride film
Is formed, the first nitride film is etched using the resist as a mask to form an oxidation preventing film 3 made of the first nitride film on the active region, and then the resist is removed.

Next, in a step shown in FIG. 3B, a second nitride film having a thickness of 100 nm is formed on the entire surface of the semiconductor substrate 1 by the CVD method, and then the second nitride film is formed by anisotropic dry etching. Is performed to form a side wall 9 made of the second nitride film only on the side wall of the oxidation preventing film 3. The thickness of the second nitride film is desirably equal to or larger than the width of the bird's beak portion of the oxide film formed by the LOCOS isolation formation method in a later step. Thereafter, the oxide film 2A is etched using the antioxidant film 3 and the side walls 9 as a mask to form the base insulating film 2. At this time, only the sidewall 9 may be formed, and the oxide film 2A may not be etched and may be left as it is as the base insulating film 2 on the element isolation formation region.

Next, in the step shown in FIG. 3C, the LO using the antioxidant film 3 and the side wall 9 as an antioxidant mask is formed.
The semiconductor substrate 1 is thermally oxidized by the COS separation forming method to form an oxide film 4 having a thickness of 50 nm. At this time, a so-called bird's beak portion 4 a of the oxide film 4 is formed at least in a region of the semiconductor substrate 1 located below the end of the sidewall 9. The bird's beak portion 4a needs to be formed to be thicker than the base insulating film 2 and to have a higher surface. Therefore, when the LOCOS isolation formation method is used to form the surface of the bird's beak portion 4 a higher than the underlying insulating film 2, the thickness of the oxide film 4 is at least twice the thickness of the underlying insulating film 2. It is desirable that the film thickness be three times or more in consideration of the film reduction in the cleaning step.

Thereafter, FIG. 1 in the first embodiment
2 (c) and the steps shown in FIGS. 2 (a) to 2 (c), the oxide film 4 is etched and the isolation grooves are formed by using the oxidation preventing film 3 and the side walls 9 as a mask. After the isolation insulating film is buried in the trench, the oxidation preventing film 3, the side wall 9 and the base insulating film 2 are removed, and a gate insulating film and a gate electrode are formed.
An IS transistor can be formed.

According to this manufacturing method, the same functions and effects as those of the first embodiment can be obtained. Further, by forming the sidewalls 9 on the side walls of the oxidation preventing film 3, the reduction of the width of the active region due to the bird's beak portion 4a can be suppressed, so that the width of the active region can be increased. Therefore, M
It is possible to increase the driving force of the IS type transistor and to form a fine element isolation width equal to or less than the lithography limit, thereby realizing a highly integrated circuit element based on further miniaturization.

[0033]

As described above, according to the present invention, by forming a bird's beak portion surrounding an isolation groove in an end region of an active region of a semiconductor substrate, a base insulating film on the active region is thereafter etched. Even in this case, the element isolation region in which the isolation insulating film is embedded is not etched into a concave shape, and the element isolation region having a good shape can be formed. Therefore, the concentration of the electric field from the gate electrode to the edge of the active region can be suppressed, so that MIS transistors having a threshold voltage lower than those of other active regions are not formed in parallel as in the related art. Thus, a MIS transistor having uniform transistor characteristics can be formed.

[Brief description of the drawings]

FIGS. 1A to 1C are cross-sectional views illustrating a first half of a manufacturing process of a semiconductor device having a trench isolation structure according to a first embodiment;

FIGS. 2A to 2C are cross-sectional views showing a latter half of a manufacturing process of the semiconductor device according to the first embodiment having a trench isolation structure;

FIGS. 3A to 3C are cross-sectional views showing a process of manufacturing a semiconductor device having a trench isolation structure according to a second embodiment up to formation of a sidewall;

FIGS. 4A to 4D are cross-sectional views showing a manufacturing process of a semiconductor device having a conventional trench isolation structure.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Base insulating film 3 Oxidation prevention film 4 Oxide film 4a, 4b Bird's beak part 5 Separation groove 6 Isolation insulating film 7 Gate insulating film 8 Gate electrode 9 Side wall

Claims (4)

[Claims] A step of forming a base insulating film on a semiconductor substrate; and a step of forming an oxidation preventing film on the base insulating film.
(C) patterning the antioxidant film to form an antioxidant film having an opening on an element isolation formation region; and using the antioxidant film as an antioxidant mask, (D) performing selective oxidation by a thermal oxidation method to form an oxide film having a bird's beak below the end of the antioxidant mask; and after the step (d), using the antioxidant film as an etching mask. (E) etching the oxide film by anisotropic dry etching, leaving a bird's beak portion of the oxide film only under the end of the etching mask; and after the step (e), Forming an isolation groove by etching the semiconductor substrate to a predetermined depth by anisotropic dry etching using as an etching mask; In the after forming an insulating film on a semiconductor substrate, and removing the insulating film on the anti-oxidation film,
Embedding an insulating film for isolation only in the isolation trench (g)
After the step (g), after removing the antioxidant film,
Removing the base insulating film (h). 2. The method of manufacturing a semiconductor device according to claim 1, wherein after the step (c) and before the step (d), a sidewall serving as an oxidation prevention mask is formed on a sidewall of the oxidation prevention film. In the step (d), the oxide film is formed using the antioxidant film and the sidewall as an antioxidant mask. In the step (e), the antioxidant film and the sidewall are formed. The oxide film is etched using an etching mask. In the step (f), the semiconductor substrate is etched using the antioxidant film and the sidewall as an etching mask. In the step (h), the oxidation prevention is performed. A method for manufacturing a semiconductor device, comprising: removing a base insulating film after removing a film and the sidewall. 3. The method of manufacturing a semiconductor device according to claim 2, wherein a width of the sidewall is equal to or larger than a width of a bird's beak portion of the oxide film formed below an end of the oxidation preventing mask. A method for manufacturing a semiconductor device, which is wide. 4. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide film has a thickness three times or more the thickness of the base insulating film. Device manufacturing method.