JP2002100294A - Flat type plasma display panel having independent trigger and controlled maintaining electrode - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a flat type plasma display panel which has an independent trigger and controlled maintaining electrode, and can operate with a high efficiency. SOLUTION: In this flat type display panel, a pair of first parallel maintaining electrodes consisting of first and second maintaining electrodes (Y, Z) are formed on an upper glass substrate 12, and at least one of auxiliary electrodes (T, C) is coated on the substrate 12 in parallel to the pair of first parallel maintaining electrodes, and then the auxiliary electrodes (T, C) are adjacent to a first maintaining electrode in the pair of first parallel maintaining electrodes, and a pair of second parallel maintaining electrodes including first and second maintaining electrodes are coated on the substrate 12 in parallel to a trigger electrode (T), and a first maintaining electrode in the pair of second parallel maintaining electrodes is arranged adjacent to an auxiliary electrode so as to be a mirror image of the pair of first parallel maintaining electrodes. A single common first maintaining electrode pad (Z') is electrically connected to the first maintaining electrode in the pair of first maintaining electrodes and the first maintaining electrode in the pair of second maintaining electrodes, and then a first maintaining electrode pad is connected with a first voltage-waveform source, and then a first maintaining voltage-waveform is supplied to both first maintaining electrodes from a single electric source.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention generally relates to a flat panel plasma display panel, and more particularly, to a flat panel plasma display panel having full color, high resolution capability, operating with high efficiency, and including independent triggers and controlled sustain electrodes. Related to structural improvement.

[0002]

2. Description of the Related Art A flat-type plasma display panel includes an electroluminescent device, an AC-type plasma display panel, and a D-type plasma display panel.
This is an electronic display device in which large-sized orthogonally arranged display pixels such as a C-type plasma display panel and a field emission display device form a planar screen.

[0003] AC type plasma display panel or PDP
Is composed of two glass plates, and the inner surface of each glass plate has electrodes in a conductive wire pattern. The glass sheets are separated by gaps filled with gas. The electrodes are arranged in an xy matrix, and the electrodes on each glass plate are deposited at right angles to each other using conventional thin or thick film technology. At least one set of AC
The sustain electrodes of the type PDP are covered with a thin glass dielectric layer. The glass plates are assembled in a sandwich with this gap between the glass plates fixed by spacers. The edges of the glass sheets are sealed and the gap between the glass sheets is evacuated and filled with a mixture of neon gas and xenon gas or a similar gas mixture well known in the art.

During operation of an AC PDP, a sufficient drive voltage pulse is applied to the electrodes to ionize the gas contained between the glass plates. As the gas ionizes, the dielectric charges as if it were a small capacitor, which reduces the voltage across the gas and eliminates the discharge. The capacitance voltage is due to the accumulated charge and is conventionally called wall charge. The voltage is then reversed and the sum of the drive voltage and the wall charge voltage is again large enough to excite the gas and generate a glow discharge pulse. Such a series of drive voltages applied repeatedly is called a sustaining voltage or a sustainer. By using the sustainer waveform, the pixel in which the charge is accumulated is discharged, and emits a light pulse in each sustainer cycle. If no charge is stored in the pixel, no light is emitted. When an appropriate waveform is applied across the xy matrix of electrodes, an image is formed by the small light emitting pixels.

Generally, red, green, or blue phosphor layers are alternately deposited on the inner surface of one of these glass plates. Due to the ionized gas, the phosphor emits colored light from each pixel. Typically,
The partition is disposed between the glass plates to prevent interference between colors and between pixels between electrodes. The septum also increases the resolution and provides a very fine image. Further, the partition is the height of the partition,
Utilizing the width and the pattern gap, a uniform discharge space is provided between the glass plates to achieve a desired pixel pitch.

For further details on the structure and operation of AC type PDPs, see US Pat. No. 5,723,945, entitled “Flat Panel Display”, US Pat.
No. 2,983, entitled "Method of Operating a Display Panel", and US Patent Application No. 09 / 259,940, filed on Mar. 1, 1999, entitled "Flat Panel Display Device", Are all cited and referenced herein.

[0007]

SUMMARY OF THE INVENTION The present invention relates to an improvement in a planar plasma display panel that operates with high efficiency and includes independent triggers and controlled sustain electrodes.

It is well known to manufacture flat-panel plasma display panels having a pair of sustain electrodes forming a charged space between substrates of a display device. The charges maintain a plasma discharge controlled by voltage application to the plurality of address electrodes. This charging space is formed by applying an initial voltage to the sustain electrode. The actual plasma discharge starts between the sustain electrodes by applying a second sustain voltage to the sustain electrodes. Generally, when gas and shape parameters are adjusted so as to increase the voltage required for sustaining discharge, the efficiency of the panel increases. However, this increases the complexity of the associated voltage supply circuit for the starting voltage. Accordingly, it is desirable to develop a plasma display panel that enables the initiation and control of the sustain discharge at a relatively low voltage, while maintaining the resulting plasma discharge at a relatively high voltage.

It is also known to provide an individual voltage driver for each electrode in a plasma display panel. With all the voltage drivers and the number of physical connections to the panel electrodes, the final display panel volume and cost can be quite large. Accordingly, it is also desirable to reduce the number of individual voltage drivers.

[0010]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a plasma flat panel display device having a first transparent substrate on which a first pair of parallel sustain electrodes is formed. The first storage electrode pair includes a first storage electrode and a second storage electrode. The display device includes at least one auxiliary electrode formed on the first substrate in parallel with the first sustain electrode pair and adjacent to the first sustain electrode in the first sustain electrode pair. The second parallel sustain electrode pair is formed on the first substrate in parallel with the auxiliary electrode, and the second sustain electrode pair is formed of the first sustain electrode and the second sustain electrode.
Including a sustain electrode. The second pair of sustain electrodes is configured so that the first pair of sustain electrodes in the second pair of sustain electrodes is adjacent to the auxiliary electrode.
It is oriented on the first substrate as a mirror image of the sustain electrode pair. The single common first sustain electrode pad is electrically connected to the first sustain electrode in the first sustain electrode pair and the first sustain electrode in the second sustain electrode pair. The first sustain electrode pad is adapted to be connected to a first sustain voltage waveform power supply, whereby a single power supply supplies the first sustain voltage waveform to both of the first sustain electrodes. One layer of dielectric covers the sustain and auxiliary electrodes. A protective layer is formed and covers the dielectric layer. Further, the display device includes a second substrate hermetically sealed to the first substrate, the second substrate having a plurality of microvoids on its surface adjacent to the first substrate. The microvoids are filled with a gas and define a plurality of sub-pixels with the first substrate. A phosphor is formed in each of the minute gaps, and a plurality of address electrodes are incorporated in the second substrate. Each address electrode corresponds to one of the sub-pixels.

Another object of the present invention is to provide a method of operating a plasma flat panel display. The method includes applying a first and second sustain voltage waveform, an auxiliary voltage waveform, and an address voltage waveform to corresponding electrodes during a power up period. Similar electrodes are connected by pads and all wall charges are formed on the associated dielectric surface, corresponding to the discharge space of the subcell controlled to a value appropriate for the "off" state. Next, the first auxiliary voltage waveform is sequentially applied to the corresponding first auxiliary electrode for each auxiliary voltage waveform power supply connected by the pad together with the address voltage waveform in the address period. The first auxiliary voltage waveform selectively initiates a discharge between the associated first and second sustain electrode pairs, thereby causing a discharge space of the selected sub-cell controlled to a value suitable for the "on" state. Correspondingly, wall charges are set on the dielectric surface associated with these storage electrodes. Next, a predetermined number of voltage pulses are applied during the sustain period via the first and second sustain waveform power supplies, and the “on”
In the cells set in the state, a predetermined number of discharges are sequentially generated corresponding to the voltage pulses in a state where the position and shape of the discharge are controlled by the auxiliary voltage waveform power supply.

Various objects and advantages of the present invention will become apparent to those skilled in the art from the following detailed description of the preferred embodiment, when read in light of the accompanying drawings.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In the drawings, FIGS. 1 and 2 show the structure of a plasma display panel (PDP) 10. In a preferred embodiment, the plasma display panel is an AC PDP. In the following description, similar reference characters refer to similar or corresponding parts. Also,
In the following description, "top", "bottom", "front",
It is to be understood that terms such as "back" and similar terms related to position and orientation are used for convenience of description with reference to the drawings.

In general, PDP 10 comprises a hermetically sealed gas-filled housing including a top glass substrate 12 and a spaced bottom glass substrate 14. Top glass substrate 12 overlaps bottom glass substrate 14. Generally, only the display side, usually only the upper substrate 12, needs to transmit visible light, but both glass substrates 12 and 14 can transmit light,
The thickness is uniform. For example, the thickness of the glass substrates 12 and 14 is about 1/8 to 1/4 inch (3.175 mm to 6.35 mm).

The main component of the upper glass substrate 12 is Si
O ₂ , Al ₂ O ₃ , MgO ₂ , and CaO, and Na ₂ O, K ₂ O, PbO, B ₂ O _{3 and the} like as additional components. Plural sets of parallel electrodes are formed on the lower surface 16 of the upper substrate 12. One such set is designated by reference numeral 18 and is shown in FIG. Each set of electrodes includes a display inner pair or sustain electrodes 22 and 23 and is generally spaced about 800 microns. In FIG. 1, the foremost sustain electrode 22 is referred to as a first sustain electrode and is hereinafter referred to as a reference symbol Y, while another sustain electrode 23 is referred to as a second sustain electrode and is hereinafter referred to as a reference symbol Y. The trigger electrode 24 is disposed adjacent to and parallel to the first sustaining electrode 22, and is referred to as T
Expressed by Similarly, the control electrode 25 is represented by the reference symbol C hereinafter, and is arranged adjacent to and in parallel with the second storage electrode 23. As best seen in FIG. 2, sustain electrodes 22 and 23
Is between the trigger electrode 24 and the control electrode 25. Generally, the trigger and control electrodes 24 and 25 are spaced from the corresponding sustain electrodes 22 and 23 by 100 microns to 40 microns.
Within the range of 0 microns. Electrodes 22, 23, 24 and 25 are formed by conventional processes. In a preferred embodiment, the electrodes 22, 23, 24 and 25
u, Cr and Au, Cu and Au, Cu and Cr, ITO and A
It is a thin-film electrode processed from a deposited metal such as u, Ag, or Cr.

By using a uniform charge storage film 26 such as a dielectric film of a type well known in this technical field, various planar technologies well known in the technical field of display device manufacturing can be used.
Electrodes 22, 23, 24 and 25 are covered. The charge storage film 26 may be formed of almost any suitable material, such as a lead glass material. In a preferred embodiment, the charge storage film 26 is covered by a thin electron emitting layer 27. Electron emission layer 2
7 is, for example, diamond overcoat, MgO
It may be formed from most suitable materials, such as ₂ . As described below, the electron emission layer 27 may be uniform or may be patterned.

As shown in FIG. 1, a plurality of parallel micro-grooves 32 are formed in the upper surface of the bottom substrate 14. In general, the microgrooves 32 are perpendicular to the electrodes 22, 23, 24 and 25 deposited on the upper substrate 12. The micro grooves 32 are separated by partition walls 34 extending upward in FIG. The upper end of each partition wall 34 is
Is in contact with the electron emission layer 27 formed on the lower surface 16. Alternatively, the microgrooves 32 and the partitions 34 can be formed in an intermediate glass layer, which is disposed between the top and bottom substrates 12 and 14 (not shown). With either process, the microgrooves 32 and barrier ribs 34 are formed from an etchable glass material that has the inherent properties of selectively crystallizing, such as a glass-ceramic composite with the appropriate coagulant added. Is preferred.

The address electrodes 36 are formed in the respective micro-grooves 32 as indicated by the reference symbol X hereinafter. The address electrodes 36 are deposited along the base and peripheral sidewalls of the micro-grooves 32 to increase light emission uniformity and optimize phosphor coating along the entire surface of the micro-grooves 32. The address electrode 36 is made of Cr and Au or Cu and Au, or indium tin oxide (ITO) and Au, or Cu and C
r, or a thin film layer of Ag or Cr is formed by selectively depositing metal on the surface of the micro-groove. Metal deposition may be performed by thin film deposition, electron beam deposition, or electronless deposition, as is well known in the art. Generally, the micro grooves 32
The address electrodes 36 cooperate with the sustain electrode pairs 22 and 23 to define an orthogonal electrode matrix because they are perpendicular to the electrodes 22, 23, 24 and 25 deposited on the upper substrate 12.

Also, instead of the micro grooves, the present invention provides:
On the surface of the bottom substrate, the electrodes 22, 23, 24 and 2
It will be appreciated that this can be achieved using microvoids (not shown) formed by creating depressions on and to 5 on them. The surface part without voids is the electrode 2
Partition wall and sustain electrode pair 2 perpendicular to 2, 23, 24 and 25
A partition wall is formed which is parallel to and separates the trigger and control electrodes 24 and 25 from and 2 and 23. Alternatively, to form microvoids, as disclosed in the above-referenced US patent application Ser. No. 09 / 259,940,
Parallel partitions can be formed on the address electrodes and correspondingly on the surface of the bottom substrate.

The phosphor material 38 is formed on at least a part of each address electrode 36. In a preferred embodiment, the phosphor material 38 is deposited by electrophoresis as is well known in the art. The phosphor materials are of a type well known in the art, and for full color display, the red, green and blue phosphors are separately deposited in an alternating pattern to provide individual pixels. Is defined. The resolution of the PDP 10 is determined by the number of pixels per unit area.

The groove 32 is filled with a balanced gaseous mixture of two or more ionizable gases. The gas produces sufficient UV radiation to excite the phosphor material 38. In a preferred embodiment, neon and a mixture of xenon and helium at 5 to 20 weight percent are used.

The arrangement of the upper substrate electrodes 22, 23, 24 and 25 is shown in FIG. In FIG. 2, electrodes 22, 23, 2
Reference numerals 4 and 25 denote electrode patterns with diagonal lines. The top four electrodes are the first of the electrodes designated by reference numeral 38.
Form a group. Group 38 includes control electrode 25 at the top of the figure. Further, the control electrode 25 can be called an auxiliary electrode or a second auxiliary electrode. Auxiliary electrode 2
5 is connected to the control electrode 25 'on the left side of FIG.
As described below, the pad 25 '
The control electrode 25 and the control voltage driver are electrically connected. In FIG. 2, when proceeding downward from the control electrode 25, the first
The next electrode in group 38 is a second storage electrode 23, which is also connected to a second storage electrode pad 23 'on the left side of FIG. The second sustain electrode 23 is also denoted by a reference letter “Z”. 2, the first storage electrode 22 connected to the first storage electrode pad 22 ′ on the right side of FIG. 2 is adjacent to the second storage electrode pad 23. The first sustain electrode pad 22 is represented by a reference character “Y”. The bottom electrode in the first group 38 is the trigger electrode 24, which is also connected to the trigger electrode pad 24 'on the right side of FIG. Trigger electrode 24 is also designated by the reference letter "T". Further, the trigger electrode 24 can be called an auxiliary electrode electrode or a first auxiliary electrode. Thus, the orientation of the electrodes in the first group 38 is the same as that shown in FIG.

The orientation of the electrodes shown for electrode group 38 is repeated for the remaining groups of electrodes in FIG. Therefore, the electrode 40 immediately below the first group 38
Has a control electrode 45 on the top,
This control electrode is connected to the control electrode pad 45 'on the left side of FIG. The second electrode from the top of the second group 40 is a second storage electrode 43, which is shown in FIG.
Is connected to the second sustain electrode pad 43 'on the left side of the line. Third
The electrode is a first storage electrode 42, which is connected to the right first storage electrode pad 42 ', while the bottom electrode in the second group is a trigger electrode 44 which is connected to a trigger electrode pad 44'. Which is also on the right side of the figure. The remaining electrodes in FIG. 2 are identified by letters and indicate the electrode pattern. As can be seen from the reference letters C, Z, Y and T, this pattern is repeated for each subsequent group of electrodes. The individual electrode pads are each associated with an electrode and are connected to a voltage driver of a conventional plasma display panel to selectively cause a plasma discharge within a corresponding portion of the panel microgroove 32.

As shown in FIG. 3, the inventors have considered an alternate arrangement of electrodes in a plasma display panel. FIG.
Are formed in the same order as the upper group of electrodes shown in FIG. Accordingly, the upper group is represented by reference numeral 38 in FIG. 3, and the order of the electrodes from the top to the bottom is the control electrode C, the second sustain electrode Z, the first sustain electrode Y, and the trigger electrode T. The second group of electrodes in FIG. 3 is designated by the reference numeral 50 and is formed on the upper substrate 12 as a mirror image of the first group 38. Therefore, the upper electrode in the second group 50 is the trigger electrode T, and the second electrode from above the group 50 is the first sustain electrode Y. Similarly, the third electrode is a second sustain electrode Z, while the bottom electrode in group 50 is a control electrode C. Note that the electrode pads associated with sustain electrodes Y and Z are on the right side of FIG. 3, while the electrode pads associated with control and trigger electrodes C and T are on the left side of FIG. The alternate arrangement of the electrode patterns in each group is repeated over the entire display panel 10. Thus, a third group of electrodes 55
The fourth group 60 has the same pattern as the first group 38, while the fourth group 60 repeats the pattern of the second group 50.

Since the sustain electrodes Y and Z in each electrode group shown in FIG. 3 are inverted, the first and second sustain electrodes can be electrically connected to the common electrode pad. Therefore,
3, the first sustain electrode 22 (Y) in the first electrode group 38 and the first sustain electrode 22 (Y) in the second electrode group 50
Sustain electrode 42 (Y) is provided with common second sustain electrode pad 62.
(Y ′). Similarly, the second storage electrode 43 (Z) in the second electrode group 50 and the second storage electrode 64 (Z) in the third electrode group 55 are electrically connected to the common second storage electrode pad 66 (Z ′). Is done. Compared to the prior art electrode arrangement shown in FIG. 2, about half of the sustain electrode pads on the right side of panel 10 are reduced, as indicated by the pads that do not actually exist in FIG. Therefore, according to the present invention, the number of electrical connections and associated driver circuits can be significantly reduced from the prior art display panel. Therefore, according to the present invention, it is considered that the cost of assembling the plasma display panel 10 is greatly reduced.

The drivers associated with the electrodes are shown in the plan view of panel 10 shown in FIG. The panel drawing in FIG. 4 is simplified for easy understanding. The pattern of the upper substrate electrode shown in FIG. 3 is repeated in FIG. 4 with the addition of the address electrode 32 and the partition wall 34 formed on the bottom substrate 14. As described above, generally, the address electrode 32 and the partition 34 are perpendicular to the upper substrate electrode. As shown in FIG. 4, the address electrodes 32 are identified by the letter “X”. FIG. 4 shows a schematic diagram of the electrode driver. The six groups of bottom substrate electrodes and the five address electrodes, shown in FIG. 4, define a 6 × 5 array of 30 pixels. It will also be appreciated that the circuit shown in FIG. 4 can be applied to any arrangement, large or small.

Each driver comprises a voltage power supply,
Power is selectively applied to the relevant electrodes by conventional switches
Connected. Therefore, as shown on the right side of FIG.
The pair of the holding electrodes Y includes a common electrode pad Y ′ and a reference symbol S._Y
Via a conventional electronic switch represented by_Y
Is selectively connected to a first sustain voltage power supply represented by No.
The first sustain voltage power source is a first sustain voltage described below.
Generate a waveform. To simplify the drawing, electronic switches
The logic circuit for controlling the switches is omitted from FIG.
You. Similarly, the pair of the second sustain electrodes Z is connected to the common electrode pad Z
'And reference symbol S_ZVia a conventional electronic switch represented by
And the reference_ZSelected as the second sustain voltage power supply represented by
Connected. Second sustain voltage power supply V_ZSmells like
A second sustain voltage waveform described below is generated. Left side of FIG.
Then, the trigger electrode T is composed of the electrode pads T ′ and S_T1Reference from
Sign S_T6Via a separate conventional electronic switch represented by
And the reference symbol V_TSelectively for the trigger voltage power supply represented by
Connected. Trigger voltage power supply V _TIs explained below
Generates a trigger voltage waveform. The control electrode C is
Electrode pad C 'and reference symbol S_CConventional electron represented by
Via the switch, the reference V_CThe control voltage expressed by
Selectively coupled to the source. Finally, the address electrode X is
Reference symbol S_X1To S_X6A conventional electronic switch represented by
Via the reference symbol V_XSelected as the address voltage power supply
Selectively connected. Address voltage power supply V_XBelow
To generate an address voltage waveform described below.

Due to the common sustain electrode pads Y 'and Z', the sustain voltage waveform is simultaneously applied to the first and second pairs of sustain electrodes Y and Z in adjacent electrode groups during operation of the plasma display panel 10. Applied. However,
By selectively applying the trigger voltage waveform to the trigger electrode T, generation of plasma discharge in the display panel 10 is controlled.

Another embodiment of the present invention is shown in FIG. 5, where components similar to those shown in FIG. 3 have the same reference numerals. The pattern of the upper substrate electrode in FIG. 5 is the same as that shown in FIG. 3, but the connection of the electrode to the electrode pad is different. On the left side of FIG. 5, adjacent trigger electrode pairs are connected to a common trigger electrode pad T ′,
On the other hand, a pair of adjacent control electrodes C is connected to a common control electrode pad C ′. Therefore, the number of trigger electrode pads T 'is reduced by half, and the number of control electrode pads C' is reduced by about half. As described later, sustain electrodes Y and Z
5 are respectively connected to the associated sustain electrode pads Y ′ and Z ′ or Y ″ and Z ″ on the right side of FIG. 5 to control the discharge. PD shown in FIGS. 3 and 4
As with P, reducing the number of trigger and control electrode pads T 'and C' further reduces the number of electrical connections and associated driver circuits from prior art display panels even further. it can. Therefore, according to the present invention, it is considered that the cost of assembling the plasma display panel 10 is greatly reduced.

The driver associated with the electrodes is shown in a plan view of panel 10 shown in FIG. 6 for another embodiment. As described above, the drawing of the panel in FIG.
Simplified for easy understanding. Components shown in FIG. 6 that are similar to components shown in FIG. 4 have the same reference numerals. As mentioned above, the driver comprises a voltage power supply selectively coupled to the associated driver via a conventional electronic switch. On the other hand, while a 6 × 5 array is shown in FIG. 6, it will be understood that the invention can also be implemented on large or small arrays. As shown in FIG. 6, the number of electronic switches for the trigger electrode T is reduced from six to three as shown in FIG. in addition,
The number of control electrodes has been reduced from six to four.

For the common trigger electrode pad T ',
When the plasma display panel 10 is in operation,
It is simultaneously applied to the pair of trigger electrodes T that are in contact. Trigger power
Pressure is applied to adjacent pairs of trigger electrodes,
The pair of sustain electrodes is denoted by reference symbol S. _Z, S_Y, S_{Z ''}And S
_{Y ''}Connected via four electronic switches represented by
It is supplied by a separate sustain voltage power supply. Therefore, specific
Trigger voltage and sustain to discharge in pixels
Both voltages must be present. Therefore, maintain
The selective application of the voltage waveform to the sustain electrode pairs Y and Z
In cooperation with the trigger voltage, a specific pixel of the display panel 10
Control the generation of plasma discharge. 4 sustain voltage power supplies
FIG. 6 shows that the present invention also provides a Z-electrode electronic switch S
_{Z '}And S_{Z ' '}One voltage power supply V that supplies both_ZAnd Y
Electrode switch S_{Y '}And S_{Y ''}(Not shown)
One voltage power supply V_YIt can be realized by using

Further, the present invention aims at more efficient operation of the display panel 10. Here, the operation of the PDP 10 will be described from the viewpoint of the voltage waveform shown in FIG. The same voltage waveform is used for both circuit embodiments shown in FIGS. As described above, the voltage power supply generates a voltage waveform having the shape as shown, while the electronic switch is selectively closed to apply the waveform to the associated electrode.

First, the plasma display panel 10 operates at t _1.
And t ₂ are pre-adjusted. The pre-adjustment includes applying voltage waveforms of opposite polarities to sustain electrodes Y and Z and applying a negative voltage to trigger electrode T. As a result, all the wall charges are removed from the side surfaces of the micro grooves 32. The pre-adjustment stage is used when it is desired to clear the entire display panel 10, such as when starting up or when performing a new display. Preconditioned state, between t ₂ and t _3, as indicated by the curve represented by the reference numeral V _Y and V _Z, can be maintained by applying an AC voltage to the sustain electrodes Y and Z. Although only one cycle of the AC maintaining voltage is shown in FIG. 7, the wall charge can be maintained for a longer time by continuously applying the AC voltage. The pre-adjustment and its maintenance because the entire display panel 10 is cleared may be referred to as "batch erase".

To prepare panel 10 for writing
In addition, the first and second sustaining voltages are both t_ThreeTo t_FourTo
And the trigger voltage becomes positive. In FIG.
As shown, these voltages cause a short plasma
A discharge 70 is generated, but this plasma discharge is
Address electrode between the trigger electrode T of the plate 12 and the bottom substrate 14
It extends across the microgroove 32 between the poles X. Plasma discharge
The electricity 70 includes a cathode fall region 72 and a plasma column 74.
No. Due to the plasma discharge 70, the wall charges 76 are discharged.
0 formed on the side walls of adjacent micro-grooves 32
You. The sustain electrode voltage is t_FourWhen the AC fluctuation starts again,
Although the plasma discharge 70 disappears, as shown in FIG.
The load 76 remains. The wall charge is shown at the bottom of FIG.
Reference code V_Y-V_ZAnd V_T-V_XThe voltage waveform represented by
This is indicated by a broken line in FIG. Here, the association of panel 10
The part which has been prepared is prepared for writing. Follow
And t ₁And t_FiveThe voltage curve during the “start-up” phase
Often called. In FIG. 7, t_FiveTo t₆To
As shown, the wall charge is equal to the sustain voltage V_YAnd V_ZExchange
It is kept by repeating each other.

At t ₆ , writing for causing the selected pixel to emit light actually starts. The voltage waveform applied to the address electrode X becomes positive, while the first and second sustain voltages become negative and positive, respectively. As a result, the plasma discharge column 80
It occurs again in the micro groove 32. As shown in FIG. 10, the pillar 80 draws an arc from the trigger and the first storage electrodes T and Y in the micro groove 32 to the second storage electrode Z in the lateral direction. The column 80 is made of ionized gas, contains positively charged ions and negatively charged electrons, and excites the phosphor 38 formed in the microgroove 32. The excited phosphor emits visible light. t ₇
At, as shown in FIG. 11, the sustaining voltage starts repeating again, maintaining the plasma column 80, thereby
The associated pixel continues to emit light.

The inventors have found that using the above-described plasma display panel, a relatively low trigger voltage of less than 100 volts triggers a plasma discharge 80 for a relatively high sustaining voltage of 280-380 volts. Although possible, this maintenance voltage is significantly higher than the typical 180-200 volt maintenance voltage known in the art. FIG.
As shown in FIGS. 0 and 11, when the sustaining voltage increases, the plasma discharge 80 occurs deeper in the groove. Discharge 80
Penetrates deeper into the micro-grooves 32, more phosphors 38 are excited and the display brightness is increased. in addition,
As the sustain voltage increases, the efficiency of panel 10 improves by reducing the amount of current required to drive the display.

As shown in FIGS. 4 and 6, the present invention
Trigger and maintenance voltage power supply V_T, V _YAnd V_Zabout
consider. In prior art panels, this is generally the case.
Supply the trigger and maintenance voltage using the same voltage source.
Was. If this complicates the switch circuit,
In addition, the magnitude of the maintenance voltage was limited. Follow
And individual trigger voltage power supply V_TBy having
As described above, the magnitude of the sustain voltage can be increased.
You.

As described above, the start-up portion erases cells in the panel. Similar hold and trigger voltages can be applied to select electrodes to erase specific cells. However, in general, this erasure causes a short, low level emission of the cell. The low level emission is
There is a possibility that the contrast of the image appearing on the panel 10 is reduced. Therefore, the present invention also considers applying a ramped sustain voltage (not shown) to eliminate light emission during the erase operation. The ramped voltage causes the wall charge 86 to be localized, as shown in FIG.

The present invention further provides a control voltage waveform
Consider applying to. Such a control voltage waveform is generated by the control voltage power supply V _C and, as shown in the circuit diagrams of FIGS. 4 and 6, a single conventional electronic switch S _C
Is applied. The associated control voltage waveform is
This is shown as the upper curve in FIG. The control voltage waveform compensates for the sustain voltage, and the plasma pillar 80
2 to ensure that it is deeply inserted, or else control the shape of the column 80.

The present invention also relates to a plasma display panel.
Consider a method for selectively erasing selected pixels
You. The voltage applied to the panel electrodes to erase pixels is shown in the figure.
FIG. In FIG. 13, t₈To t₉To
Assume that a plasma discharge exists and is maintained. Figure
The time shown along the horizontal axis in FIG.
Lasts for the time indicated. t₉In, select
Erasure is started. t _Ten, On the sustain electrodes Y and Z
Voltage is reduced to zero and remains at zero
However, on the other hand, the pulse triggers and
It is applied to address electrodes T and X. Trigger and electrode pad
Lus works in concert with the reduced sustain electrode voltage to
Erase element. And t₁₁Voltage is normal
Return to the offer. The erased cell will regenerate the plasma discharge
Holds the wall charges necessary to generate
Voltage is not enough to cause another discharge
You. In order to restart the plasma discharge, in FIG.₆
To t₇Corresponding triggers and
While applying a pulse to the electrodes T and X, the electrodes Y and
It is necessary to keep the voltage applied to
is there. Therefore, the cell was restarted by the erase step.
Condition.

It should be noted that the magnitude of the voltage applied to the trigger and control electrodes T and C varies in both FIGS. This variation represents the ability to adjust the discharge shape and depth included as part of the present invention.

Further, the present invention relates to the PD shown in FIGS.
Consider another circuit embodiment at P. Another embodiment is shown in FIG. 14, where the sustain electrodes Y and Z in adjacent electrode groups are connected together and powered by single contact pads Y 'and Z'. The electrodes are in a different sequence from the top to the bottom of FIG. 14 than shown in FIGS. 3 and 4, but adjacent groups of sustain electrodes Y and Z, trigger electrode T and control electrode C are arranged as mirror images of one another. Note that In addition, the circuit connection shown in FIG.
It can be applied to the direction of the P electrode.

The upper Y electrode in FIG. 14 is connected, via an electrode switch S _Y , to the right end 13 connected to a sustain voltage power supply represented by the reference numeral V _Y and the left end of the Y electrode in the second electrode group. It has a left end connected from the top. The upper Z electrode has a left end connected to the left end of the Z electrode in the second group from the top in the figure. Z electrode of the second group also through the electrode switch S _Z, has a right end that is connected to the sustain voltage source, represented by reference numeral V _Z. The connection to the illustrated sustain voltage sources V _Z and V _Y not only reduces the number of contact pads and simplifies the driver circuit, but also compensates for the voltage drop across the sustain electrodes Z and Y. Since the voltage is applied to the opposite end of the composite pair of Z and Y sustain electrodes, the voltage difference between each sustain electrode pair and the voltage difference across the micro-gap has a voltage drop along the electrodes. Does not change. The control electrode pad C 'is moved to the right side of the panel to prevent the connection wiring from intersecting with the wiring connecting the ends of the Y and Z electrodes.

The operation of the PDP shown in FIG. 14 is the same as that described above. In accordance with the provisions of the patent statutes, the principles and methods of operation of the present invention have been shown in preferred embodiments. It should be understood, however, that the invention may be practiced otherwise than as specifically set forth without departing from the spirit or scope of the invention. Therefore, FIG.
Driver circuits for the maintenance and control electrodes shown in FIGS. 6 and 13 can also be applied to the prior art electrode structure (not shown) shown in FIG.

[0045]

According to the plasma display panel described above,
A relatively low trigger voltage of less than 100 volts can trigger the plasma discharge 80 for a relatively high sustain voltage of 280-380 volts, which can be between 180 and 200 volts as known in the art. It is much higher than a typical sustain voltage. When the sustain voltage increases, the plasma discharge 80 is performed deeper in the groove. As the discharge 80 penetrates deeper into the microgrooves 32, more phosphors 38 are excited and the display brightness increases. In addition, as the sustain voltage increases, the efficiency of panel 10 improves by reducing the amount of current required to drive the display.

[Brief description of the drawings]

FIG. 1 is a perspective view of a plasma display panel.

FIG. 2 is a plan view of an arrangement of electrodes included in the plasma display panel shown in FIG.

FIG. 3 is a plan view of an alternate arrangement of electrodes included in the plasma display panel shown in FIG.

FIG. 4 is a plan view of the electrode shown in FIG. 3 connected to a voltage power supply.

FIG. 5 is a plan view showing another alternate arrangement of electrodes included in the plasma display panel shown in FIG.

FIG. 6 is a plan view of the electrode shown in FIG. 5 connected to a voltage power supply.

FIG. 7 shows the voltage applied to the electrodes in FIGS. 4 and 6 as a function of time for starting and maintaining a display on a plasma display panel.

FIG. 8 is a cross-sectional view of the plasma display panel of FIG. 1 along line 2-2, illustrating operation of the panel during a write start phase.

FIG. 9 is a cross-sectional view of the plasma display panel of FIG. 1 taken along line 2-2, illustrating operation of the panel during a set charge phase.

FIG. 10 is a cross-sectional view of the plasma display panel of FIG. 1 along line 2-2, illustrating operation of the panel during a sustain phase.

FIG. 11 is a cross-sectional view of the plasma display panel of FIG. 1 taken along line 2-2, illustrating operation of the panel during a selective write phase.

FIG. 12 is a cross-sectional view of the plasma display panel of FIG. 1 along line 2-2, illustrating operation of the panel during a write start phase utilizing a ramp voltage.

FIG. 13 shows the voltage applied to the electrodes in FIGS. 4 and 6 as a function of time to erase a plasma discharge panel.

FIG. 14 is a plan view showing still another alternate embodiment of the plasma display panel shown in FIGS. 3 and 4;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 ... Plasma display panel, 12 ... Top glass substrate, 14 ... Bottom glass substrate, 16 ... Bottom surface, 18 ...
Parallel electrode, Y ... first sustain electrode, Z ... second sustain electrode, T ...
Trigger electrode, C: control electrode, 26: charge storage film, 27:
Thin electron-emitting layer, 32... Multiple parallel micro-grooves, 34
... partition walls, 36 ... address electrodes.

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Oleksandr Shubidky United States 43609 Ohio Toledo Thornwood Drive 823 F-term (reference) 5C040 FA01 FA04 GB03 GB14 GB16 GC11 GC20 GK14 LA05 LA18 MA03 5C080 AA05 BB05 CC03 DD03 HH02 HH04 HH05 JJ04 JJ06

Claims (29)

[Claims] 1. A plasma flat panel display device, comprising: a parallel sustain electrode pair array formed on a first transparent substrate and each including a first sustain electrode and a second sustain electrode; The first auxiliary electrode is the first
An auxiliary electrode formed on the first transparent substrate adjacent to the storage electrode and parallel to and corresponding to each of the storage electrode pairs; and a dielectric formed from a dielectric material covering the storage electrode and the auxiliary electrode. A first transparent substrate including a body layer and a protective layer formed of an electron emission material covering the dielectric; a fine void array formed on a surface of a second substrate adjacent to the first substrate; Each address electrode is orthogonal to the sustain electrode, and corresponds to each of the fine gaps, and the fine gaps define a plurality of sub-pixels together with the first substrate, and each of the sub-pixels is connected to the address electrode. A plurality of address electrodes incorporated in the second substrate defining a controlled discharge space at intersections of sustain electrode pairs having associated auxiliary electrodes, and a film formed in each micro-gap; Phosphor material associated with the electrode Apparatus comprising, a second substrate which is hermetically sealed to the first substrate; and a gas filling the microvoids. 2. The plasma flat panel display according to claim 1, wherein each of the first storage electrodes is connected to a corresponding first storage electrode pad, and the first storage electrode pad is at least one. Connected to a group, wherein the group is connected to a first sustain voltage waveform power supply, each of the second sustain electrodes is connected to a corresponding second sustain electrode pad, and the sustain electrode pad is at least Connected to one group, wherein the group is connected to a second sustain voltage waveform power supply having a phase opposite to that of the first sustain voltage waveform, and at least one of the groups adjacent to each first sustain electrode An auxiliary electrode connected to an associated auxiliary electrode pad, wherein the auxiliary electrode pad is connected to a plurality of individually controllable first control voltage waveform power supplies; Source electrode is connected to the corresponding electrode pads,
An apparatus wherein the address electrode pads are connected to an individually controllable address voltage waveform power supply at a low voltage substantially in synchronization with the first sustain voltage waveform power supply. 3. The flat panel display according to claim 2, wherein a second auxiliary electrode adjacent to each second sustain electrode is connected to an associated auxiliary electrode pad, and wherein the second auxiliary electrode is connected to an associated auxiliary electrode pad. The auxiliary electrode pads of the first type are arranged in at least one group.
A device that is substantially in phase with the control voltage waveform power supply and is commonly connected to a second control voltage waveform power supply. 4. The plasma flat panel display according to claim 2, wherein the first and second sustaining voltage waveform power supplies apply a voltage waveform to the sustaining electrode, and the first and second sustaining voltage waveform power supplies apply a voltage waveform to the sustaining electrode. A device that continuously maintains a plasma discharge between sustain electrodes, and the position and shape of the discharge path is controlled by an auxiliary voltage waveform, thereby enhancing the emission of the associated sub-pixel. 5. The plasma flat panel display of claim 4, wherein the waveform power supplies cooperate to provide any walls on a dielectric surface associated with all electrodes during a start-up period. Applying a voltage waveform that also removes charge, wherein the address voltage waveform power supply cooperates with the first auxiliary voltage waveform power supply to selectively operate in a controlled discharge space between the first sustain electrode and the second sustain electrode. A voltage to start a discharge, and apply a voltage to the dielectric surface associated with the first and second sustain electrodes in this controlled discharge space corresponding to the sub-pixel selected during the address period. The voltage waveform power supplies cooperate to store the first and second sustained voltages in the sub-pixels that have accumulated charge on the associated dielectric surface of a sustain electrode during a sustain period. This controlled discharge space between the electrodes An apparatus for generating a predetermined number of continuous sustain discharges in the apparatus. 6. The plasma flat panel display according to claim 4, wherein the sustain voltage waveform is a voltage exceeding 250 volts,
The apparatus wherein the trigger voltage waveform is a voltage less than 100 volts. 7. The plasma flat panel display device according to claim 5, wherein the sustain voltage waveform is a voltage in a range of 280 volts to 380 volts. 8. The flat panel display according to claim 1, wherein the auxiliary electrode is disposed between the first and second sustain electrodes. 9. The plasma flat panel display device according to claim 1, wherein the auxiliary electrode is disposed outside the first and second sustaining electrodes. 10. The plasma flat panel display device according to claim 1, wherein the sustain electrodes have the same width but different widths of the auxiliary electrodes. 11. The plasma flat panel display according to claim 9, wherein the first and second sustain electrode pairs alternately form a mirror image along an array of the pairs, and the first and second sustain electrodes are arranged in parallel. 2. An apparatus for forming a pattern of the second and first sustain electrodes and repeating the pattern from the beginning to the end of the array. 12. The plasma flat panel display device according to claim 11, wherein the auxiliary electrode is commonly connected to a pad shared between two adjacent auxiliary electrodes, thereby forming a pad. A device that reduces the number of auxiliary waveform voltage power supplies by half. 13. The flat panel display according to claim 11, wherein the first sustaining electrode is commonly connected to a pad shared between two adjacent first auxiliary electrodes. An apparatus wherein the second sustain electrode is commonly connected to a pad shared between two adjacent second auxiliary electrodes, thereby reducing the number of pads by half. 14. The plasma flat panel display device according to claim 3, wherein the first and second sustain voltage waveform power supplies apply a voltage waveform to the sustain electrode, and the first and second sustain voltage waveform power supplies apply a voltage waveform to the first and second sustain electrodes. A device that continuously maintains a plasma discharge between sustain electrodes, and the position and shape of the discharge path is controlled by an auxiliary voltage waveform, thereby enhancing the emission of the associated sub-pixel. 15. The plasma flat panel display of claim 14, wherein the waveform power supplies cooperate to provide any walls on a dielectric surface associated with all electrodes during a start-up period. Applying a voltage waveform that also removes charge, wherein the address voltage waveform power supply cooperates with the first auxiliary voltage waveform power supply to selectively operate in a controlled discharge space between the first sustain electrode and the second sustain electrode. A voltage to start a discharge, and apply a voltage to the dielectric surface associated with the first and second sustain electrodes in this controlled discharge space corresponding to the sub-pixel selected during the address period. The voltage waveform power supplies cooperate to store the first and second sustained voltages in the sub-pixels that have accumulated charge on the associated dielectric surface of a sustain electrode during a sustain period. This controlled discharge between the electrodes A device that generates a predetermined number of continuous sustain discharges in space. 16. A plasma flat panel display device, comprising: a first transparent substrate; a first storage electrode and a second storage film formed on the first transparent substrate.
A first parallel sustain electrode pair including a sustain electrode; and at least one adjacent to the first sustain electrode in the first sustain electrode pair formed on the first substrate in parallel with the first sustain electrode pair. An auxiliary electrode, formed on the first substrate in parallel with the trigger electrode, including a first sustain electrode and a second sustain electrode, wherein the first sustain electrode in a second sustain electrode pair is adjacent to the trigger electrode The second parallel sustain electrode pair oriented on the first substrate as a mirror image of the first sustain electrode pair, and the first sustain electrode and the second sustain electrode pair in the first sustain electrode pair. The first sustaining electrode is electrically connected to the first sustaining voltage waveform power supply, so that the first sustaining voltage waveform is supplied to both of the first sustaining electrodes by a single power supply. Single common first sustain electrode A dielectric layer formed of a dielectric material covering the sustain electrode and the trigger electrode; a protective layer formed covering the dielectric layer; and a first hermetically sealed with the first substrate. A second substrate having a plurality of fine voids defining a plurality of sub-pixels together with the first substrate on a surface adjacent to the substrate, a gas filling the fine voids, and a phosphor formed in each of the fine voids And a plurality of address electrodes incorporated in the second substrate, each address electrode corresponding to one of the sub-pixels. 17. A method for operating a plasma flat panel display device, comprising: (a) providing a plasma flat panel display device, comprising: a first transparent substrate; A first parallel sustain electrode pair including a first sustain electrode and a second sustain electrode, and a first parallel sustain electrode pair formed on a first substrate in parallel with the first sustain electrode pair.
At least one auxiliary electrode adjacent to the first sustain electrode in the sustain electrode pair; and a film formed on the first substrate in parallel with the trigger electrode, the first sustain electrode and the second sustain electrode being included in the second sustain electrode pair. First
A second pair of parallel sustain electrodes that is oriented on the first substrate as a mirror image of the first pair of sustain electrodes such that the sustain electrode is adjacent to the auxiliary electrode; a first pair of sustain electrodes and a second pair of sustain electrodes in the first pair of sustain electrodes; Are electrically connected to the first sustain electrode and are connected to the first sustain voltage waveform power supply, whereby the first sustain voltage waveform is supplied to both of the first sustain electrodes by a single power supply. A single common first sustain electrode pad, a dielectric layer formed of a dielectric material covering the sustain electrode and the trigger electrode, a protective layer formed over the dielectric layer, and hermetically sealed to the first substrate A second substrate having a plurality of fine voids defining a plurality of sub-pixels together with the first substrate on a surface adjacent to the first substrate, a gas filling the fine voids, and a film formed in each fine void. Phosphor incorporated in the second substrate, Providing a plasma flat panel display having a plurality of address electrodes each corresponding to one of the sub-pixels; and (b) providing a sub-cell connected by a pad and controlled to a value suitable for an "off" state. Applying first and second sustaining voltage waveforms, auxiliary voltage waveforms, and address voltage waveforms to the corresponding electrodes formed on the dielectric surface where all wall charges are associated with the discharge spaces during the rise period; (C) together with the address voltage waveform in the address period,
For each auxiliary voltage waveform power supply connected by a pad, a first auxiliary voltage waveform is sequentially applied to a corresponding first auxiliary electrode, and a discharge is selectively started between the associated first and second sustain electrode pairs. Setting a wall charge on the dielectric surface associated with the sustain electrode corresponding to the discharge space of the selected sub-cell controlled to a value suitable for the "on"state; A predetermined number of voltage pulses are applied during the sustaining period via the second sustaining waveform power supply, so that in the cells set to the "ON" state, the position and shape of the discharge are controlled by the auxiliary voltage waveform power supply. Generating a predetermined number of discharges sequentially in response to the voltage pulses. 18. The method of claim 17, wherein the first and second voltage waveforms have the same voltage and are out of phase. 19. The method of claim 17, wherein the voltage waveform generated by the first auxiliary waveform generator is substantially in-phase with the first sustain voltage waveform power supply, and the voltage is less. 20. The method according to claim 19, wherein the voltage waveform generated by the first auxiliary waveform generator is adjustable for optimum light output and optimum light efficiency. 21. A method for operating a plasma flat panel display device, comprising: (a) providing a plasma flat panel display device, comprising: a first transparent substrate; And a first sustain electrode and a second sustain electrode, respectively.
A parallel sustain electrode pair array including sustain electrodes, and in each sustain electrode pair, at least a first auxiliary electrode is a first sustain electrode.
An auxiliary electrode formed on the first transparent substrate adjacent to the storage electrode and parallel to and corresponding to each of the storage electrode pairs; and a dielectric formed from a dielectric material covering the storage electrode and the auxiliary electrode. A body layer, a protective layer formed of an electron-emitting material covering the dielectric, a second substrate hermetically sealed with the first substrate, and formed on a surface of the second substrate adjacent to the first substrate. The micro-gap array, each address electrode is orthogonal to the sustain electrode, and corresponds to each of the micro-gap, the micro-gap defines a plurality of sub-pixels with the first substrate, and each of the sub-pixels is Defining a controlled discharge space at the intersection of a sustain electrode pair having an auxiliary electrode associated with the address electrode, a plurality of the address electrodes incorporated in the second substrate, and a film formed in each of the fine voids; Fluorescence associated with the address electrode Providing a device comprising: a material; and a gas filling the microvoids; (b) all walls corresponding to the discharge space of the sub-cell connected by a pad and controlled to a value suitable for an "off"state; Applying first and second sustaining voltage waveforms, auxiliary voltage waveforms, and address voltage waveforms during a rise period to corresponding electrodes formed on a dielectric surface to which charges are related; and (c) address voltage during an address period. Along with the waveform,
For each auxiliary voltage waveform power supply connected by a pad, a first auxiliary voltage waveform is sequentially applied to a corresponding first auxiliary electrode, and a discharge is selectively started between the associated first and second sustain electrode pairs. Setting a wall charge on the dielectric surface associated with the sustain electrode corresponding to the discharge space of the selected sub-cell controlled to a value suitable for the "on"state; A predetermined number of voltage pulses are applied during the sustaining period via the second sustaining waveform power supply, so that in the cells set to the "ON" state, the position and shape of the discharge are controlled by the auxiliary voltage waveform power supply. Generating a predetermined number of discharges sequentially in response to the voltage pulses. 22. The method of claim 21, wherein the first and second voltage waveforms have the same voltage and are out of phase. 23. The method of claim 21, wherein the voltage waveform generated by the first auxiliary waveform generator is substantially in phase with the first sustained voltage waveform power supply, and the voltage is less. 24. The method of claim 23, wherein the voltage waveform generated by the first auxiliary waveform generator is adjustable for optimal light output and optimal light efficiency. 25. A plasma flat panel display device, comprising: a first transparent substrate; a first storage electrode and a second storage film formed on the first transparent substrate.
A first parallel sustain electrode pair including a sustain electrode; and at least one adjacent to the first sustain electrode in the first sustain electrode pair formed on the first substrate in parallel with the first sustain electrode pair. An auxiliary electrode, a film is formed on the first substrate in parallel with the trigger electrode, and includes a first sustain electrode and a second sustain electrode, wherein the first sustain electrode in the second sustain electrode pair is connected to the other trigger electrode. The second pair of parallel sustain electrodes, which are aligned on the first substrate as a mirror image of the first pair of sustain electrodes, and one end of the first sustain electrode in the first pair of sustain electrodes and the second sustain electrode. A single common first storage electrode pad electrically connected to the other end of the first storage electrode connected to a corresponding end of the first storage electrode in the electrode pair; One end of a second sustain electrode and the first sustain electrode A single common second storage electrode pad electrically connected to the other end of the second storage electrode connected to a corresponding end of the second storage electrode in the electrode pair; and covering the storage electrode and the trigger electrode A dielectric layer formed of a dielectric material; a protective layer formed to cover the dielectric layer; and a first layer on a surface adjacent to the first substrate, which is hermetically sealed to the first substrate. A second substrate having a plurality of fine voids defining a plurality of sub-pixels together with the substrate, a gas filling the fine voids, a phosphor formed in each of the fine voids, and being incorporated in the second substrate And a plurality of address electrodes each corresponding to one of the sub-pixels. 26. The method of claim 17, further comprising, following step (d), a next step applied to erase a discharge contained in the selected sub-cell: e) along with the address voltage waveform during the address period,
For each auxiliary voltage waveform power supply connected by a pad, a first auxiliary voltage waveform is sequentially applied to a corresponding first auxiliary electrode, and a discharge is selectively started between the associated first and second sustain electrode pairs. Setting a wall charge on the dielectric surface associated with the sustain electrode corresponding to the discharge space of the selected sub-cell controlled to a value suitable for the "off"state; A predetermined number of voltage pulses are applied during a subsequent sustain period via the second sustain waveform power supply, thereby controlling the position and shape of the discharge in the cells set to the "on" state by the auxiliary voltage waveform power supply. Generating a predetermined number of discharges in sequence in response to said voltage pulses. 27. The method according to claim 21, further comprising, following step (d), a next step applied to erase the discharge contained in the selected sub-cell: e) along with the address voltage waveform during the address period,
For each auxiliary voltage waveform power supply connected by a pad, a first auxiliary voltage waveform is sequentially applied to a corresponding first auxiliary electrode, and a discharge is selectively started between the associated first and second sustain electrode pairs. Setting a wall charge on the dielectric surface associated with the sustain electrode corresponding to the discharge space of the selected sub-cell controlled to a value suitable for the "off"state; A predetermined number of voltage pulses are applied during a subsequent sustain period via the second sustain waveform power supply, thereby controlling the position and shape of the discharge in the cells set to the "on" state by the auxiliary voltage waveform power supply. Generating a predetermined number of discharges in sequence in response to said voltage pulses. 28. A method for operating a plasma flat panel display, comprising: (a) providing a plasma flat panel display, comprising: a first transparent substrate; A first parallel sustain electrode pair including a first sustain electrode and a second sustain electrode, and a first parallel sustain electrode pair formed on a first substrate in parallel with the first sustain electrode pair.
At least one auxiliary electrode adjacent to the first sustain electrode in the sustain electrode pair; and a film formed on the first substrate in parallel with the trigger electrode, the first sustain electrode and the second sustain electrode being included in the second sustain electrode pair. First
A second pair of parallel sustain electrodes that is oriented on the first substrate as a mirror image of the first pair of sustain electrodes such that the sustain electrode is adjacent to the auxiliary electrode; a first pair of sustain electrodes and a second pair of sustain electrodes in the first pair of sustain electrodes; Are electrically connected to the first sustain electrode and are connected to the first sustain voltage waveform power supply, whereby the first sustain voltage waveform is supplied to both of the first sustain electrodes by a single power supply. A single common first sustain electrode pad, a dielectric layer formed of a dielectric material covering the sustain electrode and the trigger electrode, a protective layer formed over the dielectric layer, and hermetically sealed to the first substrate A second substrate having a plurality of fine voids defining a plurality of sub-pixels together with the first substrate on a surface adjacent to the first substrate, a gas filling the fine voids, and a film formed in each fine void. Phosphor incorporated in the second substrate, Providing a plasma flat panel display having a plurality of address electrodes each corresponding to one of the sub-pixels; and applying to the electrodes to maintain a plasma discharge formed in at least one of the sub-cells. In the presence of the assigned voltage, (b) with the address voltage waveform during the address period,
For each auxiliary voltage waveform power supply connected by a pad, a first auxiliary voltage waveform is sequentially applied to a corresponding first auxiliary electrode, and a discharge is selectively started between the associated first and second sustain electrode pairs. Setting a wall charge on the dielectric surface associated with the sustain electrode corresponding to the discharge space of the selected sub-cell controlled to a value suitable for the "off"state; A predetermined number of voltage pulses are applied during a subsequent sustain period via the second sustain waveform power supply, thereby controlling the position and shape of the discharge in the cells set to the "on" state by the auxiliary voltage waveform power supply. Generating a predetermined number of discharges in sequence in response to said voltage pulses. 29. A method for operating a flat panel plasma display device, comprising: providing a plasma flat panel display device, comprising: a first transparent substrate; a film formed on the first transparent substrate; A first sustain electrode and a second sustain electrode, respectively.
A parallel sustain electrode pair array including sustain electrodes, and in each sustain electrode pair, at least a first auxiliary electrode is a first sustain electrode.
An auxiliary electrode formed on the first transparent substrate adjacent to the storage electrode and parallel to and corresponding to each of the storage electrode pairs; and a dielectric formed from a dielectric material covering the storage electrode and the auxiliary electrode. A body layer, a protective layer formed of an electron-emitting material covering the dielectric, a second substrate hermetically sealed with the first substrate, and formed on a surface of the second substrate adjacent to the first substrate. The micro-gap array, each address electrode is orthogonal to the sustain electrode, and corresponds to each of the micro-gap, the micro-gap defines a plurality of sub-pixels with the first substrate, and each of the sub-pixels is Defining a controlled discharge space at the intersection of a sustain electrode pair having an auxiliary electrode associated with the address electrode, a plurality of the address electrodes incorporated in the second substrate, and a film formed in each of the fine voids; Fluorescence associated with the address electrode Providing an apparatus comprising: a material; and a gas that fills the microvoids; and in the presence of an assigned voltage applied to the electrodes to maintain a plasma discharge formed in at least one subcell. (B) along with the address voltage waveform in the address period,
For each auxiliary voltage waveform power supply connected by a pad, a first auxiliary voltage waveform is sequentially applied to a corresponding first auxiliary electrode, and a discharge is selectively started between the associated first and second sustain electrode pairs. Setting a wall charge on the dielectric surface associated with the sustain electrode corresponding to the discharge space of the selected sub-cell controlled to a value suitable for the "off"state; A predetermined number of voltage pulses are applied during a subsequent sustain period via the second sustain waveform power supply, thereby controlling the position and shape of the discharge in the cells set to the "on" state by the auxiliary voltage waveform power supply. Generating a predetermined number of discharges in sequence in response to said voltage pulses.