JP2002094034A - Soi substrate and its manufacturing method - Google Patents

Soi substrate and its manufacturing method

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Publication number
JP2002094034A
JP2002094034A JP2000284568A JP2000284568A JP2002094034A JP 2002094034 A JP2002094034 A JP 2002094034A JP 2000284568 A JP2000284568 A JP 2000284568A JP 2000284568 A JP2000284568 A JP 2000284568A JP 2002094034 A JP2002094034 A JP 2002094034A
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JP
Japan
Prior art keywords
layer
substrate
soi substrate
silicon substrate
manufacturing
Prior art date
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Application number
JP2000284568A
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Japanese (ja)
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JP4501263B2 (en
Inventor
Kazuki Mizushima
一樹 水嶋
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Mitsubishi Materials Corp
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Mitsubishi Materials Corp
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Publication of JP2002094034A publication Critical patent/JP2002094034A/en
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  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PROBLEM TO BE SOLVED: To accurately control an Si layer which is suitable for mass production which has a simple manufacturing process. SOLUTION: An SOI substrate 10 comprises a silicon substrate 11, an Si1-xGexO2 layer 12 (where 0<=x<=0.5) formed on a surface of the substrate 11, and an Si layer 13 formed on the surface of the layer 12. This substrate 10 is manufactured by epitaxially growing an Si1-yGey layer 14 (where 0.05<=y<=0.75), depositing the Si1-yGey layer 14 on the surface of the substrate 11, epitaxially growing an Si layer 13, depositing the layer 3 on a surface of the layer 14, further thermally oxidizing the substrate 11, in which the layer 14 and the layer 13 are deposited, and causing the layer 14 to change into an Si1-xGexO2 layer 12.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、絶縁層上にSi層
を形成したSOI(Silicon-On-Insulator)基板及びそ
の製造方法に関するものである。
[0001] 1. Field of the Invention [0002] The present invention relates to an SOI (Silicon-On-Insulator) substrate having an Si layer formed on an insulating layer and a method of manufacturing the same.

【0002】[0002]

【従来の技術】この種のSOI基板は超高集積回路(U
LSI)基板として注目されている。このSOI基板の
製造方法には、シリコン基板同士を絶縁層を介して貼
り合わせる方法、シリコン基板の内部に高濃度の酸素
イオンを注入した後、高温でアニール処理してこのシリ
コン基板表面から所定の深さの領域に埋込みシリコン酸
化層を形成し、その表面側のSi層を活性領域とするS
IMOX法(特開平7−263538号公報)、シリ
コン基板に水素イオンを注入した後に、このシリコン基
板をイオン注入面を重ね合わせ面として支持基板に貼り
合わせ、この積層体を500℃を越える温度に昇温して
上記シリコン基板を水素イオンの注入領域で支持基板か
ら分離することにより、支持基板の表面にSi層を形成
する水素イオン注入分離法(特開平5−211128号
公報)、シリコン基板表面に多孔質Si層及びSi単
結晶層を介してSiO2層を形成し、このシリコン基板
をSiO2層を重ね合わせ面として支持基板に貼り合わ
せ、更に上記シリコン基板及び多孔質Si層を高圧水流
ではぎ取る高圧水流分離法(T.Yoneyama,US Patent,537
1037,US filed:August 9.1991,US patented December
6.1994)などが知られている。
2. Description of the Related Art An SOI substrate of this type has a very high integrated circuit (U.S.A.).
(LSI) substrates are drawing attention. This SOI substrate manufacturing method includes a method in which silicon substrates are bonded to each other via an insulating layer, a method in which high-concentration oxygen ions are implanted into a silicon substrate, and then an annealing treatment is performed at a high temperature to perform a predetermined process from the surface of the silicon substrate. A buried silicon oxide layer is formed in a region having a depth, and the Si layer on the surface thereof is used as an active region.
IMOX method (Japanese Patent Application Laid-Open No. Hei 7-263538), after hydrogen ions are implanted into a silicon substrate, the silicon substrate is bonded to a support substrate with the ion-implanted surface as a superposed surface, and the laminate is heated to a temperature exceeding 500 ° C. A hydrogen ion implantation separation method for forming a Si layer on the surface of the support substrate by separating the silicon substrate from the support substrate in a region where hydrogen ions are implanted by heating (JP-A-5-211128); An SiO 2 layer is formed via a porous Si layer and a Si single crystal layer, and the silicon substrate is bonded to a support substrate with the SiO 2 layer as an overlapping surface. High pressure water flow separation method (T.Yoneyama, US Patent, 537
1037, US filed: August 9.1991, US patented December
6.1994).

【0003】[0003]

【発明が解決しようとする課題】しかし、上記従来の貼
り合わせ法、SIMOX法、水素イオン注入分離法及び
高圧水流分離法では、Si層の厚さがそれぞれ2μm以
上、0.05〜0.2μm、0.2〜2μm及び0.2
〜2μm程度の範囲に限定される不具合があった。ま
た、上記従来の貼り合わせ法、水素イオン注入分離法及
び高圧水流分離法では、製造プロセスが比較的複雑であ
り、工数が増大する問題点があった。更に、上記従来の
SIMOX法では、シリコン酸化層及びSi層の界面の
粗さが比較的大きい問題点があった。
However, in the above-mentioned conventional bonding method, SIMOX method, hydrogen ion implantation separation method and high-pressure water flow separation method, the thickness of the Si layer is 2 μm or more and 0.05 to 0.2 μm, respectively. , 0.2-2 μm and 0.2
There was a problem limited to the range of about 2 μm. Further, the conventional bonding method, hydrogen ion implantation separation method and high-pressure water flow separation method have a problem that the production process is relatively complicated and the number of steps is increased. Further, the conventional SIMOX method has a problem that the roughness of the interface between the silicon oxide layer and the Si layer is relatively large.

【0004】本発明の第1の目的は、製造プロセスが単
純であり、量産に適した、SOI基板の製造方法を提供
することにある。本発明の第2の目的は、Si層及びS
1-xGex2層の界面を平滑にすることができる、S
OI基板及びその製造方法を提供することにある。本発
明の第3の目的は、パーティクルや金属汚染の管理を容
易に行うことができる、SOI基板及びその製造方法を
提供することにある。
A first object of the present invention is to provide a method for manufacturing an SOI substrate which has a simple manufacturing process and is suitable for mass production. A second object of the present invention is to provide a Si layer and an S layer.
The interface of the i 1-x Ge x O 2 layer can be smoothed.
An object of the present invention is to provide an OI substrate and a method for manufacturing the same. A third object of the present invention is to provide an SOI substrate and a method of manufacturing the same, which can easily manage particles and metal contamination.

【0005】[0005]

【課題を解決するための手段】請求項1に係る発明は、
図1に示すように、シリコン基板11と、このシリコン
基板11表面に形成されたSi1-xGex2層12(但
し、0≦x≦0.5)と、Si1-xGex2層12表面
に形成されたSi層13とを備えたSOI基板である。
この請求項1に記載されたSOI基板では、Si層13
及びSi1-xGex2層12の界面が平滑でSi層13
の厚さが均一である良好なSOI基板10となる。
The invention according to claim 1 is
As shown in FIG. 1, a silicon substrate 11, a Si 1-x Ge x O 2 layer 12 (0 ≦ x ≦ 0.5) formed on the surface of the silicon substrate 11, and a Si 1-x Ge x This is an SOI substrate including an O 2 layer 12 and a Si layer 13 formed on the surface.
In the SOI substrate according to the first aspect, the Si layer 13
The interface between the Si 1-x Ge x O 2 layer 12 and the Si layer 13 is smooth.
The SOI substrate 10 has a uniform thickness.

【0006】請求項2に係る発明は、図1に示すよう
に、シリコン基板11表面にSi1-yGey層14(但
し、0.05≦y≦0.75)をエピタキシャル成長さ
せて堆積する工程と、Si1-yGey層14表面にSi層
13をエピタキシャル成長させて堆積する工程と、Si
1-yGey層14及びSi層13を堆積したシリコン基板
11を熱酸化処理することによりSi1-yGey層14を
酸化してSi1-xGex 2層12(但し、0≦x≦0.
5)に変化させる工程とを含むSOI基板の製造方法で
あって、Si1-yGey層14の堆積中に酸素ガスを導入
することによりSi1-yGey層14に酸素を含ませるこ
とを特徴とする。この請求項2に記載されたSOI基板
の製造方法では、従来の貼り合わせ法、水素イオン注入
分離法及び高圧水流分離法と比較して、製造プロセスが
単純であり、量産に適し、製造コストを低減することが
できる。またSi1-yGey層14及びSi層13をLP
CVD法等によりエピタキシャル成長させるため、均一
にかつ厚さを限定することなく堆積でき、更に結晶性の
良好な(結晶欠陥の極めて少ない)Si層13を形成す
ることができる。また製造プロセスが単純であるため、
SOI基板10内のパーティクルや金属汚染の管理を容
易に行うことができる。更にSi1-yGey層14に酸素
を含んでいるため、Si1-yGey層14が速やかに酸化
されてSi1-xGex2層12になる。
The invention according to claim 2 is as shown in FIG.
Then, a silicon substrate 111-yGeyLayer 14 (however
And 0.05 ≦ y ≦ 0.75)
And depositing the Si1-yGeySi layer on the surface of layer 14
13 by epitaxially growing and depositing Si;
1-yGeySilicon substrate on which layer 14 and Si layer 13 are deposited
11 by thermal oxidation1-yGeyLayer 14
Oxidized to Si1-xGexO TwoLayer 12 (where 0 ≦ x ≦ 0.
5) a method for manufacturing an SOI substrate, the method including:
Oh, Si1-yGeyIntroduce oxygen gas during deposition of layer 14
By doing1-yGeyLayer 14 should contain oxygen.
And features. 3. The SOI substrate according to claim 2.
In the manufacturing method, the conventional bonding method, hydrogen ion implantation
Compared to the separation method and the high-pressure water separation method,
Simple, suitable for mass production, and can reduce manufacturing costs
it can. Also Si1-yGeyLayer 14 and Si layer 13 are LP
Uniform for epitaxial growth by CVD method etc.
And can be deposited without limiting the thickness.
Forming a good (very few crystal defects) Si layer 13
Can be Also, because the manufacturing process is simple,
Manages particles and metal contamination in SOI substrate 10
It can be done easily. Furthermore, Si1-yGeyOxygen in layer 14
Contains Si1-yGeyLayer 14 oxidizes quickly
Being Si1-xGexOTwoIt becomes layer 12.

【0007】[0007]

【発明の実施の形態】次に本発明の実施の形態を図面に
基づいて説明する。図1に示すように、SOI基板10
はシリコン基板11と、このシリコン基板11表面に形
成されたSi1-xGex2層12と、Si1-xGex2
12表面に形成されたSi層13とを備える。上記シリ
コン基板11及びSi層13はいずれも単結晶体であ
る。またSi1-xGex2層12のSi1-xGex2にお
けるGe原子の数xは0≦x≦0.5、好ましくは0≦
x≦0.05に設定される。xを上記範囲に限定したの
は、0.5を越えると酸化膜耐圧が低下するからであ
る。なお、上記Si1-xGex2層12はxがゼロであ
るSiO2層であることが絶縁層として好ましい。
Embodiments of the present invention will now be described with reference to the drawings. As shown in FIG.
Comprises a silicon substrate 11, a Si 1-x Ge x O 2 layer 12 formed on the surface of the silicon substrate 11, and a Si layer 13 formed on the surface of the Si 1-x Ge x O 2 layer 12. Each of the silicon substrate 11 and the Si layer 13 is a single crystal. The number x of Ge atoms in Si 1-x Ge x O 2 of the Si 1-x Ge x O 2 layer 12 is 0 ≦ x ≦ 0.5, preferably 0 ≦ x ≦ 0.5.
x ≦ 0.05 is set. The reason why x is limited to the above range is that if it exceeds 0.5, the withstand voltage of the oxide film decreases. Note that the Si 1-x Ge x O 2 layer 12 is preferably an SiO 2 layer in which x is zero as an insulating layer.

【0008】このように構成されたSOI基板10の製
造方法を説明する。先ずシリコン基板11(面方位(0
01)或いは(111)の単結晶基板)表面に減圧化学
気相成長法(LPCVD法),超高真空化学気相成長法
(UHV−CVD法),ガスソース分子線エピタキシー
法(GSMBE法),分子線エピタキシー法(MBE
法)等によりSi1-yGey層14をエピタキシャル成長
させて堆積する(図1(b))。ここで上記Si1-y
y層14のSi1-yGeyにおけるGe原子の数yは
0.05≦y≦0.75、好ましくは0.1≦y≦0.
5に設定される。yを上記範囲に限定したのは、0.0
5未満では本発明の効果、特にゲルマニウムが存在する
ために、熱処理によりSi1-yGey層14であった領域
が酸化されて絶縁層であるSi1-xGex2層12に変
化し易いという効果が得られ難いという不具合があり、
0.75を越えると欠陥が生じ易いという不具合がある
からである。またLPCVD法によるSi1-yGey層1
4の成膜条件は温度が600〜800℃、圧力が20〜
100Torr、水素流量が10〜50slm(standard リットル
/分)、SiH4流量が20〜500sccm(standard cc
/分)、GeH4流量が0.01〜20sccmであること
が好ましい。
A method for manufacturing the SOI substrate 10 having the above-described structure will be described. First, the silicon substrate 11 (plane orientation (0
01) or (111) single crystal substrate) on the surface, low pressure chemical vapor deposition (LPCVD), ultra-high vacuum chemical vapor deposition (UHV-CVD), gas source molecular beam epitaxy (GSMBE), Molecular beam epitaxy (MBE
The Si 1-y Ge y layer 14 is epitaxially grown and deposited by the method (FIG. 1B). Where Si 1-y G
The number y of Ge atoms in Si 1-y Ge y of the e y layer 14 is 0.05 ≦ y ≦ 0.75, preferably 0.1 ≦ y ≦ 0.
Set to 5. The reason why y is limited to the above range is that 0.0
If it is less than 5, the effect of the present invention, in particular, the presence of germanium, oxidizes the region which was the Si 1-y Ge y layer 14 by heat treatment and changes to the Si 1-x Ge x O 2 layer 12 which is an insulating layer. There is a problem that it is difficult to obtain the effect that it is easy to
If it exceeds 0.75, there is a problem that defects are likely to occur. Also, the Si 1-y Ge y layer 1 by the LPCVD method
The film forming conditions of 4 are such that the temperature is 600 to 800 ° C. and the pressure is 20 to
100 Torr, hydrogen flow rate is 10~50slm (standard liters / min), SiH 4 flow rate 20~500sccm (standard cc
/ Min), and the GeH 4 flow rate is preferably 0.01 to 20 sccm.

【0009】次いで上記Si1-yGey層14表面にLP
CVD法,超高真空化学気相成長法(UHV−CVD
法),ガスソース分子線エピタキシー法(GSMBE
法),分子線エピタキシー法(MBE法)等によりSi
層13をエピタキシャル成長させて堆積する(図1
(c))。ここでLPCVD法によるSi層13の成膜
条件は温度が600〜1000℃、圧力が20〜100
Torr、水素流量が10〜50slm、SiH4流量が20〜
500sccmであることが好ましい。Si層13の成膜に
はSiH2Cl2,Si26等の原料ガスを用いてもよ
い。Si1-yGey層14のエピタキシャル成長時に酸素
(O2)ガスを導入することにより、Si1-yGey層1
4に酸素を含ませる工程では、Si1-yGey層14への
酸素の含有量が1×1020〜2×1022atoms/ccと
なるように酸素ガスを導入することが好ましい。
[0009] Then LP in the Si 1-y Ge y layer 14 surface
CVD, ultra-high vacuum chemical vapor deposition (UHV-CVD)
Method), gas source molecular beam epitaxy method (GSMBE)
Method), molecular beam epitaxy method (MBE method), etc.
Layer 13 is epitaxially deposited and deposited (FIG. 1).
(C)). Here, the conditions for forming the Si layer 13 by the LPCVD method are as follows: a temperature of 600 to 1000 ° C. and a pressure of 20 to 100 ° C.
Torr, hydrogen flow rate is 10-50 slm, SiH 4 flow rate is 20-
Preferably it is 500 sccm. In forming the Si layer 13, a source gas such as SiH 2 Cl 2 or Si 2 H 6 may be used. By introducing oxygen (O 2 ) gas during the epitaxial growth of the Si 1-y Ge y layer 14, the Si 1-y Ge y layer 1
In the step of including an oxygen in 4, it is preferable that the content of oxygen in the Si 1-y Ge y layer 14 is to introduce oxygen gas so that 1 × 10 20 ~2 × 10 22 atoms / cc.

【0010】次に上記シリコン基板11を熱酸化炉に入
れて熱処理する。この熱処理の条件は次の通りであるこ
とが好ましい。先ず不活性ガス雰囲気で700〜900
℃の範囲の所定温度に昇温した熱酸化炉にシリコン基板
を入れる。次いで1〜100体積%の酸素を含む不活性
ガス雰囲気或いは酸素雰囲気で、2〜10℃/分の昇温
速度で1300〜1350℃の所定温度まで昇温し、こ
の温度に0〜5時間保持する。次に1300〜1350
℃の範囲の所定温度に保持した状態で炉内を100体積
%酸素雰囲気にして1〜5時間保持する。更に1300
〜1350℃の所定温度に保持した状態で炉内を1〜1
00体積%の酸素を含む不活性ガス雰囲気に戻した後、
或いは酸素雰囲気のまま、2〜10℃/分の降温速度で
700〜900℃の所定温度まで降温する。この熱処理
によりSi1-yGey層14であった領域が酸化されて絶
縁層であるSi1-xGex2層12に変化するととも
に、Si層13表面に表面酸化層15(SiO2層)が
形成される(図1(d))。上記SOI基板10をHF
エッチングして表面酸化膜15を除去することにより、
SOI基板10の製造が完了する(図1(e))。
Next, the silicon substrate 11 is heat-treated in a thermal oxidation furnace. The conditions for this heat treatment are preferably as follows. First, 700-900 in an inert gas atmosphere
The silicon substrate is placed in a thermal oxidation furnace that has been heated to a predetermined temperature in the range of ° C. Then, in an inert gas atmosphere or an oxygen atmosphere containing 1 to 100% by volume of oxygen, the temperature is raised to a predetermined temperature of 1300 to 1350 ° C. at a rate of 2 to 10 ° C./min and kept at this temperature for 0 to 5 hours. I do. Next, 1300-1350
While maintaining a predetermined temperature in the range of ° C., the inside of the furnace is set to a 100% by volume oxygen atmosphere, and is maintained for 1 to 5 hours. 1300
1 to 1350 ° C.
After returning to an inert gas atmosphere containing 00% by volume of oxygen,
Alternatively, the temperature is lowered to a predetermined temperature of 700 to 900 ° C. at a temperature lowering rate of 2 to 10 ° C./min in an oxygen atmosphere. This heat treatment oxidizes the region that was the Si 1-y Ge y layer 14 to change to the Si 1-x Ge x O 2 layer 12 which is an insulating layer, and also formed a surface oxide layer 15 (SiO 2 Layer) is formed (FIG. 1D). The SOI substrate 10 is HF
By etching to remove the surface oxide film 15,
The manufacture of the SOI substrate 10 is completed (FIG. 1E).

【0011】このようなSOI基板10の製造方法は従
来の貼り合わせ法、水素イオン注入分離法及び高圧水流
分離法と比較して、製造プロセスが単純であり、量産に
適し、製造コストを低減することができる。またSi
1-yGey層14及びSi層13をLPCVD法等により
エピタキシャル成長させるため、均一に堆積できる。こ
の結果、Si層13を精度良くかつ広い厚さ範囲で制御
できるとともに、Si層13及びSi1-xGex2層1
2の界面を平滑にすることができ、また結晶晶性の良好
な(結晶欠陥の極めて少ない)Si層13を形成するこ
とができる。更に製造プロセスが単純であるため、SO
I基板10内のパーティクルや金属汚染の管理を容易に
行うことができる。
The manufacturing method of such an SOI substrate 10 has a simple manufacturing process, is suitable for mass production, and reduces the manufacturing cost, as compared with the conventional bonding method, hydrogen ion implantation separation method and high pressure water flow separation method. be able to. Also Si
For epitaxially grown by the 1-y Ge y layer 14 and the Si layer 13 LPCVD method or the like, can be uniformly deposited. As a result, the Si layer 13 can be controlled accurately and in a wide thickness range, and the Si layer 13 and the Si 1-x Ge x O 2 layer 1 can be controlled.
2 can be smoothed, and the Si layer 13 having good crystallinity (very few crystal defects) can be formed. In addition, because the manufacturing process is simple, SO
It is possible to easily manage particles and metal contamination in the I-substrate 10.

【0012】[0012]

【実施例】次に本発明の実施例を詳しく説明する。 <実施例1>図1に示すように、先ずシリコン基板11
(面方位(001)の単結晶基板)表面にLPCVD法
によりSi1-yGey層14(但し、0.05≦y≦0.
75)をエピタキシャル成長させて堆積した(図1
(b))。このSi1-yGey層14の成膜条件は温度が
780℃、圧力が50Torr、水素流量が50slm、Si
4流量が30sccm、GeH4流量が5.7sccmであっ
た。次いで上記Si1-yGey層14表面にLPCVD法
によりSi層13をエピタキシャル成長させて堆積した
(図1(c))。このSi層13の成膜条件は温度が7
80℃、圧力が50Torr、水素流量が50リットル/sc
cm、SiH4流量が60sccmであった。ここでSi1-y
y層14及びSi層13の厚さを分光エリプソメトリ
(物体表面で反射される楕円偏光を観測することによ
り、物体自身並びに物体表面に付着した層や薄膜の厚さ
を調べる方法)により測定したところ、それぞれ0.1
2μm及び0.4μmであった。またSi1-yGey層1
4中のGe濃度を分光エリプソメトリ法により測定した
ところ30atomic%であった。更にSi1-yGey層14
のエピタキシャル成長時に酸素(O2)ガスを導入する
ことにより、Si1-yGey層14に酸素が1.0×10
20atoms/cc入っていた。
Next, embodiments of the present invention will be described in detail. <Embodiment 1> As shown in FIG.
(Single-crystal substrate with plane orientation (001)) A Si 1-y Ge y layer 14 (provided that 0.05 ≦ y ≦ 0.
75) was epitaxially grown and deposited (FIG. 1).
(B)). The conditions for forming the Si 1-y Ge y layer 14 are as follows: temperature 780 ° C., pressure 50 Torr, hydrogen flow rate 50 slm, Si
The H 4 flow rate was 30 sccm and the GeH 4 flow rate was 5.7 sccm. Next, a Si layer 13 was epitaxially grown and deposited on the surface of the Si 1-y Ge y layer 14 by the LPCVD method (FIG. 1C). The conditions for forming the Si layer 13 are as follows.
80 ° C, pressure 50 Torr, hydrogen flow 50 liter / sc
cm and the SiH 4 flow rate was 60 sccm. Where Si 1-y G
(By observing the elliptically polarized light reflected by the object surface, a method of examining the thickness of the layer or a thin film deposited on the object itself and the object surface) thickness spectroscopic ellipsometry e y layer 14 and the Si layer 13 as measured by After that, each 0.1
They were 2 μm and 0.4 μm. The Si 1-y Ge y layer 1
The Ge concentration in Sample No. 4 was measured by spectroscopic ellipsometry and found to be 30 atomic%. Further, the Si 1-y Ge y layer 14
By introducing oxygen (O 2 ) gas during the epitaxial growth of oxygen, oxygen is introduced into the Si 1-y Ge y
20 atoms / cc.

【0013】次に上記シリコン基板11を熱酸化炉に入
れて熱処理した。この熱処理の条件は次の通りであっ
た。先ずアルゴンガス雰囲気で800℃に昇温された熱
酸化炉にシリコン基板を入れ、次いで1.5体積%の酸
素を含むアルゴンガス雰囲気にガスを置換した。次に5
℃/分の昇温速度で1320℃まで昇温し、1320℃
に保持した状態で炉内を100体積%酸素雰囲気にして
4時間保持した。更に1350℃に保持した状態で炉内
を1.5体積%の酸素を含むアルゴンガス雰囲気に戻し
た後に、5℃/分の降温速度で800℃まで降温した。
熱処理後のシリコン基板11を下記のように分析したと
ころ、Si1-yGey層14であった領域がSiO2
(Si1-xGex2層12のxにゼロを代入)に変化
し、Si層13表面にも表面酸化層15(SiO2層)
が観察された(図1(d))。しかし、SiO2層と表
面酸化層15との間のSi層13であった領域は結晶性
の良好な(結晶欠陥の極めて少ない)Si層13に保た
れていた。
Next, the silicon substrate 11 was heat-treated in a thermal oxidation furnace. The conditions of this heat treatment were as follows. First, the silicon substrate was placed in a thermal oxidation furnace heated to 800 ° C. in an argon gas atmosphere, and then the gas was replaced with an argon gas atmosphere containing 1.5% by volume of oxygen. Then 5
The temperature was raised to 1320 ° C at a rate of
The atmosphere in the furnace was kept at 100% by volume in an atmosphere of oxygen and kept for 4 hours. After the furnace was returned to an argon gas atmosphere containing 1.5% by volume of oxygen while maintaining the temperature at 1350 ° C., the temperature was lowered to 800 ° C. at a rate of 5 ° C./min.
When the silicon substrate 11 after the heat treatment was analyzed as described below, the region that was the Si 1-y Ge y layer 14 became the SiO 2 layer (x was substituted for x of the Si 1-x Ge x O 2 layer 12). The surface oxide layer 15 (SiO 2 layer) on the surface of the Si layer 13
Was observed (FIG. 1 (d)). However, the region which was the Si layer 13 between the SiO 2 layer and the surface oxide layer 15 was kept in the Si layer 13 having good crystallinity (very few crystal defects).

【0014】上記SOI基板10について、分光エリプ
ソメトリにより表面酸化層15、Si層13及びSiO
2層の厚さを測定したところ、それぞれ0.5μm、
0.1μm及び0.27μmであった。また分光エリプ
ソメトリによりSOI基板10の面内21点測定を行っ
たところ、上記各層の厚さはほぼ均一であり、その誤差
は1%程度であった。また上記SOI基板10をセコエ
ッチングした後にHFエッチングして、Si層13の結
晶欠陥の分布を調べたところ、結晶欠陥の極めて少ない
良好な結晶性を確認できた。Si層13の結晶性につい
ては、SOI基板10の断面の透過型電子顕微鏡(TE
M)による観察、及びSOI基板10のX線トポグラフ
ィによる測定で確認できた。
With respect to the SOI substrate 10, the surface oxide layer 15, the Si layer 13, and the SiO
When the thickness of the two layers was measured, each was 0.5 μm,
They were 0.1 μm and 0.27 μm. Further, when 21 points were measured in the plane of the SOI substrate 10 by spectroscopic ellipsometry, the thicknesses of the respective layers were substantially uniform, and the error was about 1%. The SOI substrate 10 was subjected to HF etching after being subjected to Secco etching, and the distribution of crystal defects in the Si layer 13 was examined. As a result, good crystallinity with very few crystal defects was confirmed. Regarding the crystallinity of the Si layer 13, the transmission electron microscope (TE
M) and the measurement of the SOI substrate 10 by X-ray topography.

【0015】また表面酸化層15を除去する前の状態で
SOI基板10の表面粗さを原子間力顕微鏡(AFM)
により観察した。一方、SiO2層及びSi層13間の
界面の粗さをHFエッチングにより表面酸化層15を取
り除き、KOHエッチングによりSi層13を取除いた
後に、原子間力顕微鏡により観察した。この結果、SO
I基板10の表面粗さ及びSiO2層及びSi層13間
の界面の粗さはいずれも平滑であった。またSOI基板
10の内部にSiO2層が形成されていることは、二次
イオン質量分析法(SIMS:数keV〜20keVの
エネルギを有する一次イオンで資料表面の微小点を衝撃
し、表面物質をスパッタイオン化して、質量分析で分析
する方法)による酸素の深さ分布測定により確認でき
た。更にオージェ電子分光法(AES:高エネルギの電
子線を試料表面に放射することにより原子が励起されて
オージェ電子を放出し、このオージェ電子のスペクトル
を測定することにより試料表面近傍に存在する元素を分
析する方法)/X線光電子分光法(ESCA:試料表面
に特性X線を照射することにより光電子が励起され、こ
の光電子を分析して試料表面の組成及び電子結合状態を
調べる方法)による測定では、SiO 2層のストイキオ
メトリがGeを全く含まないSiO2のみの化学量論値
であることを確認できた。
Also, before removing the surface oxide layer 15,
The surface roughness of the SOI substrate 10 is measured by an atomic force microscope (AFM)
Was observed. On the other hand, SiOTwoBetween the layer and the Si layer 13
The surface roughness of the interface oxide layer 15 is removed by HF etching.
And the Si layer 13 was removed by KOH etching.
Later, it was observed with an atomic force microscope. As a result, SO
Surface roughness of I-substrate 10 and SiOTwoBetween layer and Si layer 13
The roughness of the interface was smooth. Also SOI substrate
SiO inside 10TwoThe formation of the layer is secondary
Ion mass spectrometry (SIMS: several keV to 20 keV
Impacts small points on the surface of data with primary ions having energy
And sputter ionize the surface material and analyze by mass spectrometry
Can be confirmed by measuring the oxygen depth distribution
Was. Auger electron spectroscopy (AES:
Atoms are excited by radiating a probe beam onto the sample surface.
Emits Auger electrons and the spectrum of the Auger electrons
Of the element near the sample surface by measuring
Method) / X-ray photoelectron spectroscopy (ESCA: sample surface)
By irradiating characteristic X-rays to the
Analyzes the photoelectrons of the sample to determine the composition and
In the measurement by the method of TwoLayer of stoichio
SiO whose measurement does not contain any GeTwoOnly stoichiometric values
Was confirmed.

【0016】[0016]

【発明の効果】以上述べたように、本発明によれば、シ
リコン基板表面にSi1-xGex2層を形成し、Si1-x
Gex2層表面にSi層を形成したので、Si層及びS
1-xGex2層の界面が平滑でSi層の厚さが均一で
ある良好なSOI基板となる。またシリコン基板表面に
Si1-yGey層をエピタキシャル成長させて堆積し、S
1-yGey層表面にSi層をエピタキシャル成長させて
堆積し、上記シリコン基板を熱酸化処理することにより
Si1-yGey層を酸化してSi1-xGex2層に変化さ
せ、更にSi1-yGey層の堆積中に酸素ガスを導入する
ことによりSi 1-yGey層に酸素を含ませれば、従来の
貼り合わせ法等と比較して、製造プロセスが単純であ
り、量産に適し、製造コストを低減することができる。
またSi1- yGey層及びSi層をLPCVD法等により
エピタキシャル成長させるため、均一に堆積できる。こ
の結果、Si層を精度良く制御できるとともに、Si層
及びSi1-xGex2層の界面を平滑にすることがで
き、更に結晶性の良好な(結晶欠陥の極めて少ない)S
i層を形成することができる。また製造プロセスが単純
であるため、SOI基板内のパーティクルや金属汚染の
管理を容易に行うことができる。更にSi1-yGey層に
酸素を含んでいるため、Si1-yGey層が速やかに酸化
されてSi1-xGex2層になる。
As described above, according to the present invention, the system
Si on the surface of the recon substrate1-xGexOTwoForming a layer, Si1-x
GexOTwoSince the Si layer was formed on the layer surface, the Si layer and the S layer
i1-xGexOTwoThe interface of the layers is smooth and the thickness of the Si layer is uniform.
A good SOI substrate is obtained. Also on the silicon substrate surface
Si1-yGeyLayers are epitaxially deposited and
i1-yGeyEpitaxial growth of a Si layer on the layer surface
By depositing and thermally oxidizing the silicon substrate
Si1-yGeyOxidize the layer to Si1-xGexOTwoChanged into layers
And then Si1-yGeyIntroduce oxygen gas during layer deposition
The Si 1-yGeyIf oxygen is included in the layer,
The manufacturing process is simpler than the bonding method
Therefore, it is suitable for mass production and can reduce manufacturing cost.
Also Si1- yGeyLayer and Si layer by LPCVD method etc.
Because of epitaxial growth, uniform deposition can be achieved. This
As a result, the Si layer can be accurately controlled and the Si layer
And Si1-xGexOTwoThe interface between layers can be smoothed
S with good crystallinity (very few crystal defects)
An i-layer can be formed. Simple manufacturing process
Therefore, particles and metal contamination in the SOI substrate
Management can be performed easily. Furthermore, Si1-yGeyIn layers
Because it contains oxygen, Si1-yGeyLayer oxidizes quickly
Being Si1-xGexOTwoLayer.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明実施形態のSOI基板の製造手順を示す
工程図。
FIG. 1 is a process chart showing a procedure for manufacturing an SOI substrate according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

10 SOI基板 11 シリコン基板 12 Si1-xGex2層 13 Si層 14 Si1-yGey層 15 表面酸化層(SiO2層)Reference Signs List 10 SOI substrate 11 Silicon substrate 12 Si 1-x Ge x O 2 layer 13 Si layer 14 Si 1-y Ge y layer 15 Surface oxide layer (SiO 2 layer)

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 シリコン基板(11)と、 前記シリコン基板(11)表面に形成されたSi1-xGex
2層(12)(但し、0≦x≦0.5)と、 前記Si1-xGex2層(12)表面に形成されたSi層(1
3)とを備えたSOI基板。
1. A silicon substrate (11), and Si 1-x Ge x O formed on a surface of the silicon substrate (11).
Two layers (12) (provided that 0 ≦ x ≦ 0.5) and a Si layer (1) formed on the surface of the Si 1-x Ge x O 2 layer (12).
3) an SOI substrate comprising:
【請求項2】 シリコン基板(11)表面にSi1-yGey
(14)(但し、0.05≦y≦0.75)をエピタキシャ
ル成長させて堆積する工程と、 前記Si1-yGey層(14)表面にSi層(13)をエピタキシ
ャル成長させて堆積する工程と、 前記Si1-yGey層(14)及び前記Si層(13)を堆積した
前記シリコン基板(11)を熱酸化処理することにより前記
Si1-yGey層(14)を酸化してSi1-xGex 2層(12)
(但し、0≦x≦0.5)に変化させる工程とを含むS
OI基板の製造方法であって、 前記Si1-yGey層(14)の堆積中に酸素ガスを導入する
ことにより前記Si1- yGey層(14)に酸素を含ませるこ
とを特徴とするSOI基板の製造方法。
2. A silicon substrate (11) having a surface1-yGeylayer
(14) (However, 0.05 ≦ y ≦ 0.75)
Depositing by growing the silicon;1-yGeyEpitaxy of Si layer (13) on layer (14) surface
A step of growing and depositing the silicon;1-yGeyDeposited layer (14) and said Si layer (13)
By subjecting the silicon substrate (11) to a thermal oxidation treatment,
Si1-yGeyOxidize layer (14) to Si1-xGexO TwoLayer (12)
(Where 0 ≦ x ≦ 0.5).
A method for manufacturing an OI substrate, comprising:1-yGeyIntroduce oxygen gas during the deposition of layer (14)
The Si1- yGeyLayer (14) should contain oxygen.
And a method for manufacturing an SOI substrate.
JP2000284568A 2000-09-20 2000-09-20 Manufacturing method of SOI substrate Expired - Fee Related JP4501263B2 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008258488A (en) * 2007-04-06 2008-10-23 Oki Electric Ind Co Ltd Method of manufacturing semiconductor device
KR100970551B1 (en) * 2003-02-10 2010-07-16 매그나칩 반도체 유한회사 Method of manufacturing soi wafer

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0479372A (en) * 1990-07-23 1992-03-12 Nissan Motor Co Ltd Manufacture of semiconductor substrate
JPH07263538A (en) * 1994-03-23 1995-10-13 Komatsu Electron Metals Co Ltd Soi substrate and manufacture thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0479372A (en) * 1990-07-23 1992-03-12 Nissan Motor Co Ltd Manufacture of semiconductor substrate
JPH07263538A (en) * 1994-03-23 1995-10-13 Komatsu Electron Metals Co Ltd Soi substrate and manufacture thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100970551B1 (en) * 2003-02-10 2010-07-16 매그나칩 반도체 유한회사 Method of manufacturing soi wafer
JP2008258488A (en) * 2007-04-06 2008-10-23 Oki Electric Ind Co Ltd Method of manufacturing semiconductor device

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