JP2002093852A - Manufacturing method of semiconductor device, and the semiconductor device - Google Patents

Manufacturing method of semiconductor device, and the semiconductor device

Info

Publication number
JP2002093852A
JP2002093852A JP2000281053A JP2000281053A JP2002093852A JP 2002093852 A JP2002093852 A JP 2002093852A JP 2000281053 A JP2000281053 A JP 2000281053A JP 2000281053 A JP2000281053 A JP 2000281053A JP 2002093852 A JP2002093852 A JP 2002093852A
Authority
JP
Japan
Prior art keywords
semiconductor element
bonding
semiconductor device
electrode
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000281053A
Other languages
Japanese (ja)
Other versions
JP4601141B2 (en
Inventor
Satoshi Ikeda
敏 池田
Kazuhiro Nobori
一博 登
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2000281053A priority Critical patent/JP4601141B2/en
Publication of JP2002093852A publication Critical patent/JP2002093852A/en
Application granted granted Critical
Publication of JP4601141B2 publication Critical patent/JP4601141B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device, where damages and positional discrepancies of a semiconductor element generated by the applied load are reduced and ultrasonic vibration to it, when jointing metal electrodes to it using ultrasonic waves, and a precise junction having weighted unevenness of its load and junction-strength distributions can be performed. SOLUTION: In the manufacturing method of a semiconductor device, where metal electrodes 4, 5 are jointed to a semiconductor element 1 by ultrasonic waves for mounting via the electrodes 4, 5 the semiconductor element 1on an electric-circuit board, prior to jointing processes respectively, there are provided irregular portions 4a, 5a on the jointing surfaces of the metal electrodes 4, 5 for jointing therethrough the electrodes 4, 5 to the element 1 so as to be jointed to the element 1 their sides, whereon the irregular portions 4a, 5a re provided. Thereby, even if oxide films 13 are formed on the surfaces of the electrode portions of the semiconductor element 1 when jointing by the ultrasonic wave, the irregular portions 4a, 5a are so passed respectively through the oxide films 13 that the metal electrodes 4, 5 are jointed properly to the semiconductor element 1.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は半導体素子を実装す
る半導体装置の製造方法に関し、特に金属電極を半導体
素子に超音波接合し、この金属電極を介して半導体素子
を電気回路基板上に実装する半導体装置の製造方法に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device on which a semiconductor element is mounted, and more particularly, to a method for ultrasonically bonding a metal electrode to a semiconductor element and mounting the semiconductor element on an electric circuit board via the metal electrode. The present invention relates to a method for manufacturing a semiconductor device.

【0002】[0002]

【従来の技術】一般に半導体素子を実装する半導体装置
としては、半導体素子と金属電極とをワイヤボンディン
グにより接続する構造が多くとられる。しかし、この構
造ではワイヤボンディングによる配線インダクタンスの
増加によるノイズ発生や信頼性の低下などの問題が避け
られないため、金属電極を半導体素子に超音波接合して
半導体装置の電極部とし、回路基板と短い配線距離で信
号ならびに電力を授受できるように図られた半導体装置
が注目されている。
2. Description of the Related Art Generally, a semiconductor device on which a semiconductor element is mounted has a structure in which a semiconductor element and a metal electrode are connected by wire bonding. However, this structure inevitably causes problems such as noise generation and reduced reliability due to an increase in wiring inductance due to wire bonding. 2. Description of the Related Art A semiconductor device designed to be able to transmit and receive a signal and electric power with a short wiring distance has attracted attention.

【0003】以下、従来構造の半導体装置について図面
を参照しながら説明する。従来の半導体装置の例を図6
に示す。半導体素子1はMOSFETであり、半導体素
子本体14の第1主面14a上に第1主電極としてのド
レイン(図示せず)を有し、第2主面14b上にアルミ
などからなる第2主電極としてのソース11および制御
電極としてのゲート12をそれぞれ有する。半導体素子
1のドレインは、半導体素子本体14の第1主面14a
上において、表面をニッケルめっき処理された銅板から
なる第1主電極用の装置電極2に対して、半田を用いた
第1主電極用の接合手段3により接合され、外部ドレイ
ン端子として働く。
Hereinafter, a semiconductor device having a conventional structure will be described with reference to the drawings. FIG. 6 shows an example of a conventional semiconductor device.
Shown in The semiconductor element 1 is a MOSFET, has a drain (not shown) as a first main electrode on the first main surface 14a of the semiconductor element main body 14, and has a second main electrode made of aluminum or the like on the second main surface 14b. It has a source 11 as an electrode and a gate 12 as a control electrode. The drain of the semiconductor element 1 is connected to the first main surface 14 a of the semiconductor element body 14.
Above, the first main electrode device electrode 2 made of a copper plate whose surface is nickel-plated is joined by the first main electrode joining means 3 using solder, and serves as an external drain terminal.

【0004】半導体素子1のソース11は、表面を金め
っき処理された立方体形状の銅片からなる第2主電極用
の金属電極8に対して、超音波接合により機械的および
電気的に接続される。半導体素子1のゲート12は、表
面を金めっき処理された立方体形状の銅片からなる制御
電極用の金属電極9に対して、超音波接合により機械的
および電気的に接続される。
A source 11 of the semiconductor element 1 is mechanically and electrically connected to a metal electrode 8 for a second main electrode made of a cubic copper piece having a gold-plated surface by ultrasonic bonding. You. The gate 12 of the semiconductor element 1 is mechanically and electrically connected to the control electrode metal electrode 9 made of a cubic copper piece having a gold plated surface by ultrasonic bonding.

【0005】第2主電極用の金属電極8ならびに制御電
極用の金属電極9は、前記第2主面14aと接合される
接合面が平坦になるよう成形されている。第2主電極用
の金属電極8ならびに制御電極用の金属電極9の超音波
接合は以下のようにして行う。図7に示すように、半導
体素子1の第2主面14bが上方に向くように、半導体
素子1を超音波接合ステージ51に載置した状態で、超
音波出力ホーン52が接続された超音波出力ヘッド53
により、第2主電極用金属電極8ならびに制御電極用金
属電極9を下方に加圧しながら超音波振動を与えて超音
波接合を行う。
[0005] The metal electrode 8 for the second main electrode and the metal electrode 9 for the control electrode are formed so that the bonding surface to be bonded to the second main surface 14a is flat. The ultrasonic bonding of the metal electrode 8 for the second main electrode and the metal electrode 9 for the control electrode is performed as follows. As shown in FIG. 7, in a state where the semiconductor element 1 is mounted on the ultrasonic bonding stage 51 so that the second main surface 14b of the semiconductor element 1 faces upward, the ultrasonic output horn 52 is connected to the ultrasonic wave. Output head 53
Thereby, ultrasonic vibration is applied while pressing the second main electrode metal electrode 8 and the control electrode metal electrode 9 downward, thereby performing ultrasonic bonding.

【0006】この超音波接合を行うに際して、図6、図
7に示すように、半導体素子1のアルミからなるソース
11およびゲート12の表面には、大気中にさらされる
ことで必然的に酸化膜13が形成されており、この酸化
膜13が超音波接合には障害となる。そのため、このよ
うな金属電極8、9の半導体素子1に対する接合におい
ては、まず金属電極8、9を介して第1加重を加えて酸
化膜13を破壊し、合金を形成しやすい条件とした後、
第2加重のもとに超音波振動を与えて接合を行う。
When performing this ultrasonic bonding, as shown in FIGS. 6 and 7, the surfaces of the source 11 and the gate 12 made of aluminum of the semiconductor element 1 are inevitably exposed to the air to form an oxide film. 13 are formed, and this oxide film 13 hinders the ultrasonic bonding. Therefore, in joining such metal electrodes 8 and 9 to the semiconductor element 1, first, the first load is applied via the metal electrodes 8 and 9 to break the oxide film 13, and the conditions are set so that an alloy can be easily formed. ,
Ultrasonic vibration is applied under the second load to perform joining.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、このよ
うな従来の半導体装置の製造方法においては、超音波接
合時にアルミなどからなる金属電極8、9の表面に形成
された酸化膜13を貫通するための第1加重に伴う運動
量を接合面積に比例して大きく取る必要があり、大電流
を扱う用途、即ち接合面積を大きく取る用途では第1加
重により半導体素子1を破壊する可能性が高くなってい
た。
However, in such a conventional method for manufacturing a semiconductor device, since the oxide film 13 formed on the surfaces of the metal electrodes 8 and 9 made of aluminum or the like is penetrated during ultrasonic bonding. It is necessary to increase the momentum associated with the first weight in proportion to the bonding area, and in applications where a large current is used, that is, in applications where the bonding area is large, there is a high possibility that the semiconductor element 1 will be broken by the first weight. Was.

【0008】さらに、加重や超音波振動により金属電極
8、9が半導体素子1のソース11やゲート12に対し
て位置ずれを生じやすく、正確な接合がなされない可能
性が大きかった。
Further, the metal electrodes 8 and 9 are likely to be displaced from the source 11 and the gate 12 of the semiconductor element 1 due to weighting or ultrasonic vibration, and there is a high possibility that accurate joining is not performed.

【0009】さらに、加重や超音波振動により金属電極
8、9の水平度が損なわれた場合、接合面積に大きな変
動を生じるとともに加重分布のむらを生じ、正確な接合
がなされない可能性が大きくなる。
Further, when the horizontality of the metal electrodes 8 and 9 is impaired due to weighting or ultrasonic vibration, a large variation occurs in the bonding area and uneven weight distribution, and there is a high possibility that accurate bonding is not performed. .

【0010】上記のような問題により、従来の半導体装
置の製造方法によれば、期待された電気的特性が安定し
て得られず、また製品歩留まりが低下したり、信頼性が
低下するという課題を有していた。
Due to the problems described above, according to the conventional method of manufacturing a semiconductor device, the expected electric characteristics cannot be obtained stably, and the product yield and reliability are reduced. Had.

【0011】本発明は上述した課題を考慮してなされた
もので、半導体素子に金属電極を超音波接合する際の加
重や超音波振動に伴う半導体素子へのダメージや位置ず
れが小さく、加重分布および接合強度分布のむらが少な
い正確な接合を行うことができる半導体装置の製造方法
を提供することを目的とする。
The present invention has been made in consideration of the above-described problems, and has a small load and a small displacement to the semiconductor element due to the weight when applying the ultrasonic bonding of the metal electrode to the semiconductor element and the ultrasonic vibration. It is another object of the present invention to provide a method of manufacturing a semiconductor device capable of performing accurate bonding with less unevenness in bonding strength distribution.

【0012】[0012]

【課題を解決するための手段】上述した課題を解決して
目的を達成するために、具体的には以下のような手法を
講じる。
In order to solve the above-mentioned problems and attain the object, the following method is specifically adopted.

【0013】請求項1に対応する発明は、半導体素子に
金属電極を超音波接合し、前記金属電極を介して前記半
導体素子を電気回路基板上に実装する半導体装置の製造
方法において、接合工程に先んじて前記金属電極におけ
る前記半導体素子と接合される接合面に凹凸部を設け、
前記金属電極の前記凹凸部が設けられている側を半導体
素子に超音波接合させることを特徴とする。
According to a first aspect of the present invention, in a method of manufacturing a semiconductor device in which a metal electrode is ultrasonically bonded to a semiconductor element and the semiconductor element is mounted on an electric circuit board via the metal electrode, the bonding step may be Prior to providing a concave and convex portion on the bonding surface of the metal electrode and the semiconductor element,
The side of the metal electrode on which the uneven portion is provided is ultrasonically bonded to a semiconductor element.

【0014】請求項2に対応する発明は、請求項1に記
載の半導体装置の製造方法において、接合面に設ける凹
凸部は前記接合面を凹凸面を持った成形治具を介して加
圧成形することにより形成されることを特徴とする。
According to a second aspect of the present invention, in the method of manufacturing a semiconductor device according to the first aspect, the uneven portion provided on the bonding surface is formed by pressing the bonding surface via a forming jig having the uneven surface. It is characterized by being formed by doing.

【0015】請求項3に対応する発明は、請求項1に記
載の半導体装置の製造方法において、接合面に設ける凹
凸部は前記接合面を研磨成形することにより形成される
ことを特徴とする。
According to a third aspect of the present invention, in the method of manufacturing a semiconductor device according to the first aspect, the uneven portion provided on the bonding surface is formed by polishing and forming the bonding surface.

【0016】請求項4に対応する発明は、請求項1に記
載の半導体装置の製造方法において、接合面に設ける凹
凸部は前記接合面を化学反応により侵食させることによ
り形成されることを特徴とする。
According to a fourth aspect of the present invention, in the method of manufacturing a semiconductor device according to the first aspect, the uneven portion provided on the bonding surface is formed by eroding the bonding surface by a chemical reaction. I do.

【0017】請求項5に対応する発明は、半導体素子に
超音波接合された金属電極を介して前記半導体素子が電
気回路基板上に実装された半導体装置であって、金属電
極における半導体素子との接合面に凹凸部が設けられて
超音波接合されていることを特徴とする。
According to a fifth aspect of the present invention, there is provided a semiconductor device in which the semiconductor element is mounted on an electric circuit board via a metal electrode ultrasonically bonded to the semiconductor element. It is characterized in that an uneven portion is provided on the bonding surface and ultrasonic bonding is performed.

【0018】[0018]

【発明の実施の形態】以下、本発明の半導体装置および
その製造方法の好適な実施の形態について、図面を参照
しながら説明する。なお、従来の半導体装置ならびにそ
の製造に関わる装置と略同様な部分には同一符号を付し
て説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of a semiconductor device and a method of manufacturing the same according to the present invention will be described below with reference to the drawings. In addition, the same reference numerals are given to substantially the same parts as those of the conventional semiconductor device and the device related to the manufacture thereof, and the description will be made.

【0019】(実施の形態1)図1は本発明の第1の実
施の形態に係る半導体装置を示した概略的な断面図であ
る。半導体素子1はMOSFETであり、半導体素子本
体14の第1主面14a上に第1主電極としてのドレイ
ン(図示せず)を有し、第2主面14b上にアルミなど
からなる第2主電極としてのソース11および制御電極
としてのゲート12をそれぞれ有する。半導体素子1の
ドレインは、半導体素子本体14の第1主面14a上に
おいて、表面をニッケルめっき処理された銅板からなる
第1主電極用の装置電極2に対して、半田を用いた第1
主電極用の接合手段3により接合され、外部ドレイン端
子として働く。
(First Embodiment) FIG. 1 is a schematic sectional view showing a semiconductor device according to a first embodiment of the present invention. The semiconductor element 1 is a MOSFET, has a drain (not shown) as a first main electrode on the first main surface 14a of the semiconductor element main body 14, and has a second main electrode made of aluminum or the like on the second main surface 14b. It has a source 11 as an electrode and a gate 12 as a control electrode. The drain of the semiconductor element 1 is formed on the first main surface 14a of the semiconductor element main body 14 by soldering to the device electrode 2 for the first main electrode made of a copper plate whose surface is nickel-plated.
It is joined by the joining means 3 for the main electrode and functions as an external drain terminal.

【0020】半導体素子1のソース11は、表面を金め
っき処理された凹凸付き立方体形状の銅片からなる第2
主電極用の金属電極4に対して、超音波接合により機械
的および電気的に接続される。半導体素子1のゲート1
2は、接合面に凹凸を設けた立方体形状の銅片からなる
制御電極用の金属電極5に対して、超音波接合により機
械的および電気的に接続される。
The source 11 of the semiconductor element 1 is made of a second copper piece having a cubic shape with projections and depressions, the surface of which is plated with gold.
It is mechanically and electrically connected to the metal electrode 4 for the main electrode by ultrasonic bonding. Gate 1 of semiconductor element 1
Numeral 2 is mechanically and electrically connected to a control electrode metal electrode 5 made of a cubic copper piece having projections and depressions on a bonding surface by ultrasonic bonding.

【0021】ここで本実施の形態の半導体装置では、上
記金属電極4、5の表面のうち、半導体素子1と接合さ
れる接合面には超音波接合工程に先んじて凹凸部4a,
5aを設けている。
Here, in the semiconductor device of the present embodiment, among the surfaces of the metal electrodes 4 and 5, the bonding surfaces to be bonded to the semiconductor element 1 are provided with the uneven portions 4a and 4a prior to the ultrasonic bonding step.
5a is provided.

【0022】図2に本実施の形態にかかる半導体装置の
構成要素である金属電極4、5の接合面に凹凸部4a,
5aを形成する方法を、金属電極4を例に用いて図示す
る。すなわち、金めっきした立方体状の銅片からなる金
属電極4の接合面となる面に、凹凸面61を持ちかつ金
属電極4より硬い物質からなる成形治具60をプレス装
置ステージ70に設置し、成形治具60の凹凸面61が
金属電極4の接合面となる面に良好に転写されるよう
に、金属電極4の全体形状を損なわない大きさの圧力・
時間・温度にてプレス装置ヘッド71でプレスする。
FIG. 2 shows an uneven portion 4a on the joining surface of the metal electrodes 4 and 5, which are components of the semiconductor device according to the present embodiment.
The method for forming 5a is illustrated using the metal electrode 4 as an example. That is, a forming jig 60 having a concave-convex surface 61 and made of a substance harder than the metal electrode 4 is set on the press device stage 70 on a surface serving as a bonding surface of the metal electrode 4 formed of a gold-plated cubic copper piece, A pressure and a pressure that does not impair the overall shape of the metal electrode 4 so that the uneven surface 61 of the forming jig 60 is well transferred to the surface serving as the bonding surface of the metal electrode 4.
Pressing is performed by the press device head 71 at the time and temperature.

【0023】以上の工程により金属電極4の接合面とな
る面には意図する凹凸部4aが形成されるので、この面
を接合面として半導体素子1のアルミ電極部(ソース1
1)と対向させて、超音波接合を行う。なお、図1の上
部に、本実施の形態で実現される金属電極4、5の形状
を、接合面である凹凸部4a,5aを上にして示す。
By the above steps, the intended concave and convex portions 4a are formed on the surface to be the bonding surface of the metal electrode 4, and this surface is used as the bonding surface to form the aluminum electrode portion (source 1) of the semiconductor element 1.
Ultrasonic bonding is performed in a manner opposed to 1). In the upper part of FIG. 1, the shapes of the metal electrodes 4 and 5 realized in the present embodiment are shown with the concave and convex portions 4a and 5a serving as bonding surfaces facing upward.

【0024】図3は、本実施の形態に係る半導体装置
の、超音波接合に際しての第1加重を加えた瞬間の、超
音波接合装置の一部を含む断面図である。図3に示すよ
うに、半導体素子1の第2主面14bが上方に向くよう
に、半導体素子1を超音波接合ステージ51に載置した
状態で、超音波出力ホーン52が接続された超音波出力
ヘッド53により、第2主電極用の金属電極4ならびに
制御電極用の金属電極5を下方に加圧しながら超音波振
動を与えて超音波接合を行うと、金属電極4、5の接合
面に形成された凹凸部4a,5aが酸化膜13より深く
しかもアルミ電極であるソース11やゲート12の厚み
分よりは浅く打ち込まれた状態になり、加重や超音波振
動により金属電極4、5が半導体素子1の電極部(ソー
ス11やゲート12)に対して位置ずれを生じにくくな
るため、正確な接合が可能となる。
FIG. 3 is a cross-sectional view of the semiconductor device according to the present embodiment, including a part of the ultrasonic bonding apparatus, at the moment when the first weight is applied at the time of ultrasonic bonding. As shown in FIG. 3, with the semiconductor element 1 placed on the ultrasonic bonding stage 51 such that the second main surface 14 b of the semiconductor element 1 faces upward, the ultrasonic output horn 52 is connected to the ultrasonic wave. When the output head 53 presses the metal electrode 4 for the second main electrode and the metal electrode 5 for the control electrode downward while applying ultrasonic vibration to perform ultrasonic bonding, the bonding surface of the metal electrodes 4 and 5 is formed. The formed concavo-convex portions 4a and 5a are implanted deeper than the oxide film 13 and shallower than the thickness of the source 11 and the gate 12, which are aluminum electrodes. Positional displacement with respect to the electrode portion (source 11 and gate 12) of the element 1 is less likely to occur, and thus accurate bonding is possible.

【0025】また、第1加重の不足や凹凸部4a,5a
の段差寸法や形状などが原因で酸化膜13が貫通しなか
った場合でも、超音波振動により酸化膜13が破壊され
て、十分な接合がなされる可能性がある。超音波振動は
金属同士が接する面の周縁部いわゆるエッジにおいてよ
り伝達しやすいため、上記のような場合においても従来
の半導体装置の製造方法に比べて、エッジの多い電極接
合面を実現できる本実施の形態の半導体装置の製造方法
を採用することで容易に接合可能である。
In addition, the first weight is insufficient and the uneven portions 4a, 5a
Even if the oxide film 13 does not penetrate due to the step size, shape, etc., the oxide film 13 may be broken by the ultrasonic vibration and sufficient bonding may be performed. Since the ultrasonic vibration is more easily transmitted at the periphery of the surface where the metals come into contact with each other, that is, at the edge, even in the above-described case, compared to the conventional method of manufacturing a semiconductor device, the present embodiment can realize an electrode bonding surface having many edges. The semiconductor device can be easily joined by employing the method of manufacturing a semiconductor device according to the embodiment.

【0026】さらに、加重や超音波振動により金属電極
4、5の水平度が損なわれた場合、従来の方法では接合
面積に大きな変動を生じるとともに加重分布のむらを生
じていたが、従来方法に比較して接合面積の変動および
加重分布のむらは本実施の形態の半導体装置の製造方法
の採用で、より小さく抑えられるため、より正確な接合
が可能となる。
Further, when the horizontality of the metal electrodes 4 and 5 is impaired by the weighting or the ultrasonic vibration, the conventional method causes a large variation in the joint area and the unevenness of the weight distribution. Then, the variation of the bonding area and the unevenness of the weight distribution can be suppressed to a smaller size by employing the method of manufacturing a semiconductor device of the present embodiment, so that more accurate bonding can be performed.

【0027】なお、金属電極4、5の凹凸部4a,5a
の形状としては、図1に示すように、上方ほど水平断面
積が小さくなる形状(例えば図1に示すような、角錐形
状など)であると、凹凸部4a,5aが酸化膜13より
深く食い込み易くなって好適であるが、これに限るもの
ではなく、どのような形状の凹凸部4a,5aであろう
と、平面の場合と比べてソース11やゲート12に良好
に食い込んで接合し易くなる。
The uneven portions 4a, 5a of the metal electrodes 4, 5
As shown in FIG. 1, if the horizontal cross-sectional area becomes smaller toward the upper side (for example, a pyramid shape as shown in FIG. 1), the concave and convex portions 4a and 5a bite deeper than the oxide film 13. It is easy and preferable, but the present invention is not limited to this. Irrespective of the shape of the uneven portions 4a and 5a, the recesses 4a and 5a can be more easily cut into the source 11 and the gate 12 than in the case of a flat surface, and can be easily joined.

【0028】(実施の形態2)図4は本発明の第2の実
施の形態に係る半導体装置を示した概略的な断面図であ
る。図1に示すものと同様な構成要素には同一符号を付
してその詳しい説明を省略し、ここでは異なる部分につ
いて述べる。
(Embodiment 2) FIG. 4 is a schematic sectional view showing a semiconductor device according to a second embodiment of the present invention. The same components as those shown in FIG. 1 are denoted by the same reference numerals, detailed description thereof will be omitted, and different portions will be described here.

【0029】すなわち、第1の実施の形態においては、
半導体素子1に超音波接合される金属電極として、プレ
ス工程により接合面に凹凸部4a,5aを設けた凹凸付
き金属電極4、5を用いていたが、本実施の形態にかか
る半導体装置ならびにその製造方法では、金属電極4、
5に代るものとして、研磨工程により接合面に凹凸部6
a,7aを設けた研磨加工凹凸付き金属電極6、7を用
いている。
That is, in the first embodiment,
As the metal electrodes to be ultrasonically bonded to the semiconductor element 1, the metal electrodes 4 and 5 having the concave and convex portions 4 a and 5 a provided on the bonding surfaces by a pressing process are used. In the manufacturing method, the metal electrode 4,
As an alternative to 5, an uneven portion 6 may be formed on the joining surface by a polishing process.
Polished metal electrodes 6 and 7 provided with a and 7a are used.

【0030】図5に本実施の形態にかかる半導体装置の
構成要素である金属電極6、7の接合面に凹凸部6a,
7aを形成する方法を、金属電極6を例に用いて図示す
る。すなわち、立方体状の銅片からなる金属電極6を研
磨試料固定具81に固定した上で、金属電極6の接合面
となる面を、金属電極6より硬い物質からなる研磨粒を
表面に固着した回転する研磨ディスク82により研磨す
る。
FIG. 5 shows an uneven portion 6a,
The method for forming 7a is illustrated using the metal electrode 6 as an example. That is, after the metal electrode 6 made of a cubic copper piece was fixed to the polishing sample fixture 81, the surface to be the bonding surface of the metal electrode 6 was bonded to the surface with abrasive grains made of a substance harder than the metal electrode 6. Polishing is performed by the rotating polishing disk 82.

【0031】以上の工程により金属電極6の接合面とな
る面には溝状の凹凸部6aが形成されるので、この面を
接合面として半導体素子1のアルミ電極部(ソース1
1)と対向させて、超音波接合を行う。なお、接合に先
んじて、金属電極6の表面に金めっき処理を施すと金属
電極6の表面に酸化膜が生じにくくなるため、より接合
が簡易になる。図4の上部に、本実施の形態で実現され
る金属電極6、7の形状を、接合面である凹凸部6a,
7aを上にして示す。
Since the groove-shaped concave and convex portions 6a are formed on the surface serving as the bonding surface of the metal electrode 6 by the above steps, this surface is used as the bonding surface to form the aluminum electrode portion (source 1) of the semiconductor element 1.
Ultrasonic bonding is performed in a manner opposed to 1). Note that if gold plating is performed on the surface of the metal electrode 6 prior to bonding, an oxide film is less likely to be formed on the surface of the metal electrode 6, so that bonding is further simplified. In the upper part of FIG. 4, the shapes of the metal electrodes 6 and 7 realized in the present embodiment are shown by the uneven portions 6 a and
7a is shown facing up.

【0032】ここで、上記第1の実施の形態において
は、金属電極4、5をプレスする際に、金属電極4、5
の全体形状を損なわないようにプレス圧を制御する必要
があり、また成形後の電極高さの正確な制御が困難であ
ったが、本実施の形態を用いれば、金属電極6、7の全
体形状はほとんど損なわれず、研磨時間などの条件を変
化させることで成形後の電極高さの正確な制御が可能と
なる。
Here, in the first embodiment, when the metal electrodes 4 and 5 are pressed, the metal electrodes 4 and 5 are pressed.
It was necessary to control the pressing pressure so as not to impair the overall shape of the metal electrodes, and it was difficult to accurately control the electrode height after molding. The shape is hardly impaired, and the height of the electrode after molding can be accurately controlled by changing conditions such as the polishing time.

【0033】なお、金属電極6、7の凹凸部6a,7a
の形状としては、図4に示すように、上方ほど水平断面
積が小さくなる三角形状であると、凹凸部6a,7aが
酸化膜13より深く食い込み易くなって好適であるが、
これに限るものではなく、どのような形状の凹凸部6
a,7aであろうと、平面の場合と比べてソース11や
ゲート12に良好に食い込んで接合し易くなる。
The uneven portions 6a, 7a of the metal electrodes 6, 7
As shown in FIG. 4, a triangular shape having a smaller horizontal cross-sectional area toward the top as shown in FIG. 4 is preferable because the uneven portions 6a and 7a can easily penetrate deeper than the oxide film 13.
The shape is not limited to this, and the shape of the uneven portion 6 is not limited.
Regardless of whether they are a and 7a, they can be easily sunk into the source 11 and the gate 12 and joined easily as compared with the case of a plane.

【0034】また、上記第1、第2の実施の形態におけ
る金属電極4〜7の凹凸部4a〜7aの形状を、接合面
を化学反応により侵食させることにより形成してもよ
い。また、上記第1、第2の実施の形態においては、金
属電極4、5は金属片としているが、これらの実施形態
と同様に、金属電極4、5が回路基板と電気的に接続し
て信号ならびに電力を授受できるような他の形状、例え
ば板形状や柱形状とした変形構成も、本発明の主旨より
容易に導出が可能であることは言うまでもない。
Further, the shapes of the concave and convex portions 4a to 7a of the metal electrodes 4 to 7 in the first and second embodiments may be formed by eroding a bonding surface by a chemical reaction. In the first and second embodiments, the metal electrodes 4 and 5 are metal pieces. However, as in these embodiments, the metal electrodes 4 and 5 are electrically connected to the circuit board. It is needless to say that other shapes, such as a plate shape or a column shape, capable of transmitting and receiving signals and power can be easily derived from the gist of the present invention.

【0035】さらに、上記第1、第2の実施の形態にお
いては、半導体素子1としてMOSFETを用いた例に
ついてのみ説明したが、半導体素子1として異なる種類
のもの、例えばIGBTやダイオード、さらにはこれら
を集積化したICなどを用いた場合にも同様の効果が得
られることは本発明の主旨より明らかである。
Further, in the above-described first and second embodiments, only an example in which a MOSFET is used as the semiconductor element 1 has been described. However, a different type of semiconductor element 1 such as an IGBT or a diode, It is clear from the gist of the present invention that the same effect can be obtained even when an IC or the like in which is integrated.

【0036】[0036]

【発明の効果】以上のように、本発明の半導体装置の製
造方法によれば、金属電極の半導体素子と接合される接
合面に凹凸部を設けて、金属電極における凹凸部側を半
導体素子に超音波接合することで、超音波接合時に半導
体素子の電極部表面の酸化膜を貫通するための第1加重
を従来の製造方法(接合方法)に比較して小さい値で十
分となり、この結果、第1加重により半導体素子を破壊
する可能性が低減される。
As described above, according to the method of manufacturing a semiconductor device of the present invention, the uneven surface is provided on the bonding surface of the metal electrode to be bonded to the semiconductor element, and the uneven side of the metal electrode is formed on the semiconductor element. By performing the ultrasonic bonding, the first load for penetrating the oxide film on the surface of the electrode portion of the semiconductor element at the time of the ultrasonic bonding can be reduced by a small value as compared with the conventional manufacturing method (bonding method). The possibility that the semiconductor element is destroyed by the first weight is reduced.

【0037】さらに、加重や超音波振動により金属電極
が半導体素子の電極部に対して位置ずれを生じにくくな
るため、正確な接合が可能となる。さらに、加重や超音
波振動により金属電極の水平度が損なわれた場合、従来
の方法では接合面積に大きな変動を生じるとともに加重
分布のむらを生じていたが、従来方法に比較して接合面
積の変動および加重分布のむらは小さく抑えられるた
め、より正確な接合が可能となり、良好な電気的特性が
安定して得られ、製品歩留まりの向上ならびに信頼性の
向上が実現できる。
Further, since the metal electrode is less likely to be displaced from the electrode portion of the semiconductor element due to the load or the ultrasonic vibration, accurate bonding can be performed. Furthermore, when the horizontality of the metal electrode is impaired due to weighting or ultrasonic vibration, the conventional method causes a large variation in the bonding area and a non-uniform weight distribution, but the variation in the bonding area compared to the conventional method. Further, since the unevenness of the weight distribution can be suppressed to a small value, more accurate bonding can be performed, good electrical characteristics can be stably obtained, and an improvement in product yield and an improvement in reliability can be realized.

【0038】すなわち本発明の製造方法を採用すると、
従来の半導体の接合方法を用いた場合に比べて、電気的
特性の改善とともに製品歩留まりの向上と信頼性の向上
を可能にする優れた半導体装置を実現できる。
That is, when the production method of the present invention is adopted,
As compared with the case of using a conventional semiconductor bonding method, it is possible to realize an excellent semiconductor device capable of improving the electrical characteristics, improving the product yield, and improving the reliability.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1の実施の形態に係る半導体装置を
示した概略的な断面図であり、上部には、金属電極単体
の斜視図も示す。
FIG. 1 is a schematic cross-sectional view showing a semiconductor device according to a first embodiment of the present invention, and a perspective view of a single metal electrode is also shown at the top.

【図2】同実施の形態に係る半導体装置の製造方法に用
いる金属電極の接合面に凹凸部を形成する工程を示す断
面図である。
FIG. 2 is a cross-sectional view showing a step of forming an uneven portion on a bonding surface of a metal electrode used in the method for manufacturing a semiconductor device according to the embodiment.

【図3】同実施の形態に係る半導体装置の製造方法にお
ける半導体装置に金属電極を超音波接合する工程を示す
断面図である。
FIG. 3 is a cross-sectional view showing a step of ultrasonically bonding a metal electrode to the semiconductor device in the method for manufacturing a semiconductor device according to the embodiment.

【図4】本発明の第2の実施の形態に係る半導体装置を
示した概略的な断面図であり、上部には、金属電極単体
の斜視図も示す。
FIG. 4 is a schematic sectional view showing a semiconductor device according to a second embodiment of the present invention, and also shows a perspective view of a single metal electrode in an upper part.

【図5】同実施の形態に係る半導体装置の製造方法に用
いる金属電極の接合面に凹凸部を形成する工程を示す断
面図である。
FIG. 5 is a cross-sectional view showing a step of forming an uneven portion on the bonding surface of the metal electrode used in the method for manufacturing a semiconductor device according to the embodiment.

【図6】従来の半導体装置を示した概略的な断面図であ
る。
FIG. 6 is a schematic sectional view showing a conventional semiconductor device.

【図7】同従来の半導体装置の製造方法において金属電
極を超音波接合する工程を示す断面図である。
FIG. 7 is a cross-sectional view showing a step of ultrasonically bonding metal electrodes in the conventional semiconductor device manufacturing method.

【符号の説明】[Explanation of symbols]

1 半導体素子 4〜7 金属電極 4a〜7a 凹凸部 11 ソース(電極部) 12 ゲート(電極部) 13 酸化膜 14 半導体素子本体 51 超音波接合ステージ 52 超音波出力ホーン 53 超音波出力ヘッド 60 成形治具 61 凹凸面 81 研磨試料固定具 82 研磨ディスク DESCRIPTION OF SYMBOLS 1 Semiconductor element 4-7 Metal electrode 4a-7a Uneven part 11 Source (electrode part) 12 Gate (electrode part) 13 Oxide film 14 Semiconductor element main body 51 Ultrasonic bonding stage 52 Ultrasonic output horn 53 Ultrasonic output head 60 Molding jig Tool 61 Uneven surface 81 Abrasive sample fixture 82 Abrasive disk

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 半導体素子に金属電極を超音波接合し、
前記金属電極を介して前記半導体素子を電気回路基板上
に実装する半導体装置の製造方法において、接合工程に
先んじて前記金属電極における前記半導体素子と接合さ
れる接合面に凹凸部を設け、前記金属電極の前記凹凸部
が設けられている側を半導体素子に超音波接合させるこ
とを特徴とする半導体装置の製造方法。
An ultrasonic bonding of a metal electrode to a semiconductor element,
In a method of manufacturing a semiconductor device in which the semiconductor element is mounted on an electric circuit board via the metal electrode, an uneven portion is provided on a bonding surface of the metal electrode to be bonded to the semiconductor element prior to a bonding step, A method of manufacturing a semiconductor device, comprising: ultrasonically bonding a side of an electrode provided with the uneven portion to a semiconductor element.
【請求項2】 接合面に設ける凹凸部は前記接合面を凹
凸面を持った成形治具を介して加圧成形することにより
形成される請求項1に記載の半導体装置の製造方法。
2. The method of manufacturing a semiconductor device according to claim 1, wherein the uneven portion provided on the bonding surface is formed by press-forming the bonding surface via a forming jig having the uneven surface.
【請求項3】 接合面に設ける凹凸部は前記接合面を研
磨成形することにより形成される請求項1に記載の半導
体装置の製造方法。
3. The method of manufacturing a semiconductor device according to claim 1, wherein the uneven portion provided on the bonding surface is formed by polishing and shaping the bonding surface.
【請求項4】 接合面に設ける凹凸部は前記接合面を化
学反応により侵食させることにより形成される請求項1
に記載の半導体装置の製造方法。
4. The uneven portion provided on the joint surface is formed by eroding the joint surface by a chemical reaction.
13. The method for manufacturing a semiconductor device according to item 5.
【請求項5】 半導体素子に超音波接合された金属電極
を介して前記半導体素子が電気回路基板上に実装された
半導体装置であって、金属電極における半導体素子との
接合面に凹凸部が設けられて超音波接合されていること
を特徴とする半導体装置。
5. A semiconductor device in which the semiconductor element is mounted on an electric circuit board via a metal electrode ultrasonically bonded to the semiconductor element, wherein an uneven portion is provided on a bonding surface of the metal electrode with the semiconductor element. A semiconductor device characterized by being subjected to ultrasonic bonding.
JP2000281053A 2000-09-18 2000-09-18 Semiconductor device manufacturing method and semiconductor device Expired - Fee Related JP4601141B2 (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007324278A (en) * 2006-05-31 2007-12-13 Fujitsu Ltd Semiconductor device and manufacturing method therefor
JP2013000792A (en) * 2011-06-21 2013-01-07 Seidensha Electronics Co Ltd Ultrasonic metal joining method, and ultrasonic metal joining device
JP2019057686A (en) * 2017-09-22 2019-04-11 日本電気株式会社 Electronic apparatus and junction method
JP2020131229A (en) * 2019-02-18 2020-08-31 株式会社アルテクス Metal joining method

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JPH06151437A (en) * 1992-11-06 1994-05-31 Matsushita Electric Ind Co Ltd Electrode structure of semiconductor device, its formation, and packaging body
JPH06151507A (en) * 1992-11-10 1994-05-31 Matsushita Electric Ind Co Ltd Terminal electrode on circuit board, forming method thereof and mounted body
JPH075485A (en) * 1993-06-17 1995-01-10 Sanyo Electric Co Ltd Liquid crystal display device
JPH07302671A (en) * 1994-04-30 1995-11-14 Aisin Seiki Co Ltd Connector terminal junction method and connector terminal structure
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JPS63304648A (en) * 1987-06-04 1988-12-12 Matsushita Electric Ind Co Ltd Bump formation
JPH01136354A (en) * 1987-11-24 1989-05-29 Casio Comput Co Ltd Semiconductor device
JPH0513419A (en) * 1991-07-03 1993-01-22 Rohm Co Ltd Bump forming method for semiconductor element
JPH06151437A (en) * 1992-11-06 1994-05-31 Matsushita Electric Ind Co Ltd Electrode structure of semiconductor device, its formation, and packaging body
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Publication number Priority date Publication date Assignee Title
JP2007324278A (en) * 2006-05-31 2007-12-13 Fujitsu Ltd Semiconductor device and manufacturing method therefor
JP2013000792A (en) * 2011-06-21 2013-01-07 Seidensha Electronics Co Ltd Ultrasonic metal joining method, and ultrasonic metal joining device
JP2019057686A (en) * 2017-09-22 2019-04-11 日本電気株式会社 Electronic apparatus and junction method
JP2020131229A (en) * 2019-02-18 2020-08-31 株式会社アルテクス Metal joining method
JP7318904B2 (en) 2019-02-18 2023-08-01 株式会社アルテクス metal joining method

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