JP2002091382A - Drive circuit and drive unit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a drive circuit and a driver unit enabling a flexible connection. SOLUTION: The drive circuit for driving light emitting elements, comprises a 1st communication part for communication of receiving or transmitting data via a common line, a 2nd communication part for communication of receiving or transmitting data via a common line, a reception processing part for processing the received data, and a communication control part which brings the 1st and 2nd communication parts into a receiving state at an initial setting, and controls the communication parts so that when either of the 1st and 2nd communication parts receives the data, the reception processing part is made to perform reception processing of the data received thereafter by one communication part based on the data reception, and the data is transmitted from the other communication part.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving circuit for driving a light emitting element such as an LED (light emitting diode), and a driving unit used for an LED display, an LED lighting device and the like.

[0002]

2. Description of the Related Art In general, a dynamic driving method is used as a driving method of an LED display. For example, as shown in FIG. 1, in the case of an LED display configured with an M row × N column dot matrix, the anode terminals of the LEDs 11a, which are light emitting elements located in each row, are commonly connected to one common source line 12, The cathode terminals of the LEDs located in each column are commonly connected to the current line 13 in that column. Each of the current lines 13 is connected to a constant current source 14a. The M rows of common source lines 12 are sequentially turned on at a predetermined cycle, and an LED driving current is supplied to the N columns of current lines 13 according to the image data corresponding to the turned-on lines. As a result, an LED driving current corresponding to the image data is applied to the LED 11a of each pixel, and an image is displayed.

[0003] In the case of a large LED display to be installed outdoors, it is generally configured by combining a plurality of LED units, and each LED unit displays each part of full screen data. In the LED unit, LEDs each having one set of RGB are arranged in a dot matrix on a substrate.
The same operation as the ED display is performed. Many large LED displays use a large number of LEDs,
For example, in the case of 300 × 400, 120,000 LEs in total
D is used.

FIG. 2 shows a signal flow in a conventional drive circuit for each LED unit. A driving circuit of the image display device shown in FIG. 2 includes a display unit 1 in which a plurality of light emitting elements are arranged in a matrix, and a vertical driving unit 2 which selects each row of the display unit 1, applies a voltage, and sequentially switches in a vertical direction. And a plurality of stages of horizontal driving units 3 for supplying a driving current according to the display data to each column for the selected row of the display unit 1.

[0005] In the case of luminance gradation control in the pulse modulation method, gradation data (DATA) is input to the horizontal drive unit 3 of the image display device. The display unit 1 is sequentially switched for each row by the vertical drive unit 2. The lighting control unit 1 is synchronized with the start of image display for each horizontal line corresponding to each row of the display unit 1.
The lighting control signal input to 5 becomes valid. A latch (LATCH) signal for holding image data is input in synchronization with the lighting control signal. The gradation data of each color is stored in a memory unit 1 of an LED driver unit (LED Drivers 1 to N) constituting the horizontal driving unit 3 of the image display device.
The shift clock (SCLK) synchronized with the shift register is input to the control unit 18 within the valid period of the data. The LED driver section is configured as a driver IC in which the horizontal drive section 3 having a predetermined number of constant current outputs is integrated into an IC, for example.

The driving current for each horizontal line supplied to the display unit 1 is controlled by the constant current driving units 14 provided in the horizontal driving unit 3.
Supplies. The vertical drive unit control address is synchronized with the lighting control signal, and a control signal synchronized from the decoder 16 is input to the vertical drive unit 2, and accordingly, the constant current drive of the horizontal drive unit 3 connected to each column is performed. A drive current is supplied from the unit 14. The display is switched on and off by the vertical drive unit 2 for each row of the display unit 1 sequentially.

In the conventional LED display, the connection between the LED units, which are the components of the display, is such that the direction of the signal line input to the drive circuit is uniquely fixed. Therefore, the connection from the control circuit to the LED unit is one-way, and as shown in FIG. 3, the connection from the control circuit to each LED unit requires a cable connection for the line from the control circuit.

[0008]

However, in a conventional LED unit, each LED driver section (LED D) corresponding to a drive circuit for driving a light emitting element is provided.
Since the communication directions in the first to N. rivers 1 to N) were fixed, they could not be flexibly connected.
In the conventional LED display unit,
For example, there is also a problem that the wiring becomes long due to the pattern wiring in the same LED display unit, and pulse distortion and pulse width fluctuation due to signal reflection occur. In particular, since the frequency of the grayscale clock needs to be increased as the number of grayscales increases, the influence on the circuit operation increases, and the influence on the data bus due to radiation noise and the like cannot be ignored. Therefore, P
A countermeasure such as mounting an LL circuit and supplying a low-frequency clock can be considered.
There is a problem that the cost of C becomes high, and the gamma correction of the image cannot be performed due to the modulation of the gradation reference clock.

The present invention has been made in view of the above problems, and has as its object to provide a drive circuit and a drive unit that enable flexible connection.

[0010]

In order to achieve the above object, a drive circuit according to the present invention is a drive circuit for driving a light emitting element, which can communicate either data reception or data transmission by a common line. 1 communication unit, a second communication unit capable of communicating any of data reception and transmission by a common line, a reception processing unit for performing data reception processing, and the first communication unit and The second communication unit is set to a reception state, and when data is received by one of the first communication unit or the second communication unit, the data is received by one of the communication units based on the data reception. And a communication control unit that controls the reception processing unit to perform reception processing of the subsequent data and controls data transmission from the other communication unit.

Further, in the drive circuit according to the present invention, the communication control unit controls the other communication unit to transmit data based on a synchronous clock at the time of data reception.

Further, in the drive circuit according to the present invention, the first communication section and the second communication section each have a reception buffer and a transmission buffer, and the communication control section includes the reception buffer in each communication section. And a select signal that makes any of the transmission buffers valid,
Control is performed in each communication unit so as to select either reception or transmission.

Further, in the drive circuit according to the present invention, the initial settings are received by the first communication unit and the second communication unit by inputting a reset signal to the drive circuit or receiving reset data in a reception processing unit. Set to state.

Further, the drive unit of the present invention is a drive unit having a plurality of drive circuits for driving a light emitting element, wherein each drive circuit can communicate either data reception or data transmission by a common line. Drive circuits are connected in series by the common line, and at the time of initial setting, each drive circuit controls so that the two communication units receive data. When data is received by the communication unit, the data received by one communication unit is transmitted from the other communication unit based on the data reception, and the other drive circuits are connected by a common line. In order, when data is received by one communication unit, based on the data reception, data received by one communication unit thereafter is transmitted from the other communication unit. By performing the signal to set the communication direction.

Further, in the drive unit according to the present invention, when the data is received by one of the communication units, the drive circuit converts the data subsequently received by the one of the communication units based on a synchronization clock at the time of data reception. Transmission is performed from the other communication unit.

Further, the drive unit of the present invention further has a drive control unit for controlling the drive of the light emitting element by transmitting data to one communication unit of a drive circuit connected to an end of the drive unit. .

In the drive unit according to the present invention, the initial setting may be performed by inputting a reset signal from the drive control unit to a drive circuit or receiving reset data in a reception processing unit and the second communication unit and the second communication unit. Are set to the receiving state.

[0018]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 4 shows a conceptual diagram of a drive circuit according to the present invention. A first communication unit 101 capable of communicating any of data reception and transmission by a common line L, a second communication unit 102 capable of communicating any of data reception and transmission by a common line L,
A communication control unit 103 that controls communication in the first and second communication units 101 and 102, a reception processing unit that performs a reception process of data received by the driving circuit, and drives a light emitting element based on the received data. It comprises a driving unit 105.

The data received by the first communication unit 101 via the line L is connected to the second communication unit 102 so as to be able to transmit to the line L, and transmitted to the reception unit 104 via the communication control unit 103. You can enter the received data. Similarly, the second communication unit 10 via the line L
2 is connected to the first communication unit 101 so as to be able to transmit to the line L, and the communication control unit 10
3, the data received by the receiving unit 104 can be input. The communication control unit 103 sets the first communication unit and the second communication unit in a reception state at the time of initial setting, and when data is received by the first communication unit or the second communication unit, the data Based on the reception, control is performed such that the one or more communication units receive the data after the reception and the other communication unit transmits the data. In this way, the drive circuit of the present invention can be set to perform communication in only one direction based on the received data after the initial setting.

The communication control unit 103 detects the received data based on the synchronous clock at the time of data reception, and controls the communication between the first communication unit 101 and the second communication unit 102, that is, the data is received by one of them. In response to this, based on the data reception, the reception processing unit 104 performs reception processing on the data after the reception by the one communication unit,
It is preferable to control so that data is transmitted from the other communication unit. This is because there is no need to transmit data indicating the communication direction, and the communication direction can be set quickly.

In addition, by using a drive unit having two communication units capable of receiving and transmitting data by a common line according to the present invention and using a drive unit connected in series by a common line, flexible connection is possible. Becomes
For example, a connection configuration in which the drive unit 300 is connected as a star to the drive control unit 400 shown in FIG. 3, and the drive control unit 400 and each drive unit 300 shown in FIG. 5 are connected in series with the same data communication direction. 6 and a connection mode in which the drive control unit 400 and each drive unit 300 shown in FIG. 6 are connected in series with data communication directions alternately different.

Here, a drive circuit in the drive unit 300 is replaced with a drive control unit 400 provided outside.
Although the example in which the control is performed by receiving data from the control unit has been described, a drive control unit may be provided inside the drive unit. In this case, the communication between the drive control units and the communication between the drive circuits can be performed hierarchically by connecting the drive control units in the plurality of drive units and performing communication.

In particular, the connection form shown in FIG. 6 can prevent the communication line from being lengthened by the wiring while connecting the respective drive circuits in series. To realize a large-screen display device, it is necessary to increase the pixel pitch size, which increases the size of one LED unit. In this case, if the number of output ports of the control circuit is reduced, as shown in FIG. Configuration must be taken. In this configuration, the signal wiring from the upper unit to the lower unit becomes longer as the unit becomes longer, and the cable length becomes longer.
Since the influence of the reflection distortion of signal transmission becomes large and the cable length is restricted, it is extremely effective to realize the connection form as shown in FIG. 6 in a large display device. Also, as shown in FIG. 7, the outdoor drive unit and the like have a louver or the like for blocking external light,
In general, since the structure is not vertically symmetric, it is difficult to change the communication direction by exchanging one type of drive unit in the vertical direction. The drive unit of the present invention does not need to prepare two types of drive units having different communication directions in order to realize the connection configuration of FIG.

Here, the data necessary for the driving circuit includes a driving current value of the light emitting element, gradation control data, and the like. Usually, one drive circuit is highly integrated and multiple light emitting elements are driven, and multiple drive circuits (Drivers) are provided according to the number of pixels.
Connect. FIG. 6 shows a configuration in which the drive circuits are connected in series at the communication terminals of the communication unit. Each drive circuit according to the present invention has a communication terminal of the first communication unit and a communication terminal of the second communication unit, and the connection in FIG. Input direction from the part and the second
An example of connection in a case where the input direction from the communication unit can be used in any of the input directions is shown. With such a connection form, the connection from the upper drive circuit group to the lower drive circuit group can be minimized. Since the cable can be wired and the wiring length is short, data transmission quality can be improved, and a more stable data transmission system can be constructed.

FIG. 8 is a block diagram schematically showing an example of the communication function part of the drive circuit according to the present invention. The drive circuit of the present invention can be set in any communication direction by hardware autonomy. The left and right communication terminals (the communication terminals of the first communication unit and the second communication unit) are connected to the left communication terminal DA.
As TA_L and the right communication terminal DATA_R, the communication units for the left and right terminals have a reception buffer and a transmission buffer having a gate control function. In the figure, the reception buffer 711 receives data on the left communication terminal DATA_L side, and the transmission buffer 712 transmits data.
However, the gate is controlled so that only one of them operates effectively. The gate control signal (select signal) in the initial state is valid on the receiving buffer side for both left and right terminals. The reception data detection unit 731 and the reception data detection unit 732 output a detection signal (data reception detection flag) when receiving data from one of the left and right terminals, and control the gate of each transmission / reception buffer. For example, when data reception is detected on the left side, the voltage level of the data reception detection flag F1 is inverted from the reception data detection unit 731, the gate of the transmission buffer 722 on the right side is enabled, and the reception buffer 721 on the right side is disabled. . At this time, the reception data selection circuit 740 is connected to the left communication terminal DA.
The data received from TA_L is selected, and the
Send to 0. Similar processing is performed when data is received from the right side. As a precondition, data reception is uniquely determined on either side. In other words, the system does not change the data receiving direction.

[0026]

FIG. 9 shows a specific embodiment of the communication function part in the drive circuit of the present invention. The signal transmission method shows an example in which a DS code method using a data signal (DATA_L / DATA_R in the figure) and a strobe signal (STROBE_L / STROBE_R) is adopted, and the DS code is a data signal DATA and a strobe signal ST on the receiving side.
By taking the exclusive OR (hereinafter referred to as EXOR) of ROBE, a synchronous clock signal can be obtained.
Left and right terminals (communication terminals of the first communication unit and the second communication unit)
Are reception buffers with negative logic gate control (805, 8 in the figure).
08) and a transmission buffer with positive logic gate control (8 in the figure).
06, 807), and each gate control is performed by a left data reception detection unit 803 and a right data reception detection unit 804 by a gate control signal (select signal; LBus_CTL).
/ RBus_CTL).

Here, the operation when data is input to the left communication terminal will be described. Left data reception detector 8
In No. 03, when two bits of data are received by the EXOR 803a, a one-pulse clock can be generated, and at the falling edge of the clock, the flip-flop 803b is latched to a High output. The flip-flop 803b outputs a low level “0” at the time of reset. That is, when 2 bits of data are input, RBus_CTL becomes LO
The transition from W "0" to HIGH "1" causes the right transmission buffer 807 of the right communication buffer gate to be ON and the right reception buffer R808 to be OFF. At this time, since there is no data reception from the right side, the left communication buffer control bus L
The gate control signal LBus_CTL at b1 is LOW
State, and the gate state of the left communication buffer is
Left receiving buffer 805 is ON, left transmitting buffer 80
6 is turned off. Immediately after the reset, the reception buffer of the left and right communication buffers is in an ON state, that is, an input enabled state, and the transmission buffer is OFF until data is received.
It is in a state. Thereafter, when either the left or right data reception is detected, the reception side turns on the reception buffer, the non-reception side turns on the transmission buffer, and the communication directions of the left and right buffers are the left and right data reception detection units 803, 80.
4 is fixed until a reset signal (Xreset) is input. After further determining the communication direction, the data selection circuit 80
In 2, data on the receiving side is selected by selection control of both the gate control signal LBus_CTL in the left communication buffer control bus Lb 1 and the gate control signal RBus_CTL in the right communication buffer control bus Lb 2, and is input to the reception processing unit 801. . As described above, after resetting both the left and right directions, the state is changed from the input enabled state, and after data reception, the non-receiving side is changed from the input to the output state.

Here, a reset signal (Xreset) is supplied from outside the drive circuit (for example, a drive circuit control unit).
Although the example in which is input is shown, it is configured that the reset data indicating the initial setting is transmitted from the drive control unit or the like to each drive circuit, and the initial setting is performed when the reset processing unit receives the reset data. You may. Further, it is possible to configure so that the reception processing unit that has received the reset data generates a reset signal and inputs the reset signal to the left and right data reception detection units 803 and 804.

FIGS. 10A and 10B show an example of an LED unit (drive unit) 300 in which drive circuits (drv1 to drv8 in the figure) having a direction control function of the present invention are connected in series and mounted. FIG. 10C shows an operation time chart of the gate control signal for determining the transmission / reception direction of the drive circuit in one LED unit at the time of data reception. FIG. 10A shows an example in which data is input from the left connector CON_L, and FIG. 10B shows an example in which data is input from the right connector CON_R.

As shown in FIG. 10C, when there are eight driving circuits in one LED unit, by inputting 16-bit data, eight synchronous clock pulses RCLK can be generated. At the falling edge of the clock pulse RCLK, each drive circuit (dr
v1 to drv8), the gate control signal RBus_CTL in the right communication buffer control bus Lb2 or the gate control signal LBu in the left communication buffer control bus Lb1.
By sequentially turning on s_CTL, the data communication direction of all drive circuits can be determined in the order of connection. FIG.
FIG. 10A shows an operation time chart at the time of inputting data on the left side of FIG. 10A.

FIG. 11 is a block diagram schematically showing an example of an image display device according to the drive unit of the present invention. The image display device shown in this figure has the following configuration. (A) The display unit 1 in which a plurality of light emitting elements 11 are arranged in a matrix of M rows × N columns. (B) A vertical drive unit (drive circuit) 2 for applying a current to each row of the display unit 1 while selecting each row. (C) A horizontal drive unit 3 that supplies a drive current to each column of the display unit 1 according to image data corresponding to a selected row. (D) The unit communication section 5, the driver communication section 6, and the first
Drive control unit (drive control unit) 4 including the reference clock generation unit 7 described above. (E) A correction data storage unit 9 storing correction data for correction.

The operation of each component is controlled by the drive control unit 4. This image display device receives only data for controlling the image display device from an external controller that supplies image data, and performs autonomous generation of a signal necessary for driving the inside of the image display device inside the image display device to perform lighting display. . The driving circuit of this embodiment shows a method of driving the light emitting element 11 by current control.

The display section 1 has a plurality of light emitting elements 11 arranged in a matrix of M rows × N columns on a substrate on which a conductive pattern is formed. As the light emitting element 11, an LED or the like is used. In this embodiment, three light emitting diodes capable of emitting light of red, green, and blue (RGB) are disposed adjacent to each other in units of three to constitute one pixel. RG for each pixel
The LED adjacent to B can realize full color display. However, the present invention is not limited to this configuration, and two colors can be arranged close to each other, or two or more LEDs can be arranged for one color.

As the light emitting diode, a semiconductor light emitting device capable of emitting various lights can be used. As a semiconductor element, GaP, GaAs, GaN, InN, AlN, G
aAsP, GaAlAs, InGaN, AlGaN, A
An example in which a semiconductor such as lGaInP or InGaAlN is used for a light emitting layer is given. Also, the structure of the semiconductor is MI
Homostructures, heterostructures, and double heterostructures having an S junction, PIN junction, or PN junction can be given.

The emission wavelength of the semiconductor light emitting device can be variously selected from ultraviolet light to infrared light depending on the material of the semiconductor layer and the degree of mixed crystal thereof. Furthermore, in order to provide a quantum effect, a single quantum well structure or a multiple quantum well structure in which the light emitting layer is a thin film can be used.

In addition to the three primary colors of RGB, a light emitting diode using a combination of light from an LED chip and a fluorescent substance excited and emitted by the LED chip can be used. In this case, by using a fluorescent substance that is excited by light from the light emitting diode and converts to a long wavelength, a light emitting diode that can emit white light with high linearity using one type of light emitting element can be obtained.

Further, light emitting diodes having various shapes can be used. More specifically, a light emitting element that electrically connects an LED chip as a light emitting element to a lead terminal and uses a light emitting element itself, such as a shell type, a chip type LED, or the like, which is covered with a mold resin or the like, may be used.

The drive control unit 4 includes a unit communication unit 5, a driver communication unit 6, and a first reference clock generation unit 7. The unit communication unit 5 transmits and receives various data to and from the external communication unit and the unit communication unit 5 of another image display device connected to the next stage, and further gives an instruction to the driver communication unit 6. The driver communication unit 6 corrects the image data (IMDATA) input from the outside according to the variation in the light emitting element characteristics of each pixel, and outputs the corrected data to the horizontal drive unit 3. On the other hand, the horizontal drive unit 3 includes a driver communication unit 6 and a horizontal drive communication unit 8 for performing data reception processing.

In FIG. 11, the driver communication unit 6 is a DM
A control unit 6A. DM as the driver communication unit 6
The A control unit 6A includes a memory (RAM) for temporarily storing image data. In order to exchange a lot of data at high speed, the DMA control unit 6A is directly connected to the RAM.
Is read out at high speed by hardware, and data transfer to the horizontal drive unit 3 is performed.

The first reference clock generator 7 switches the current source of each row of the vertical driver 2. In addition, it functions as a timing generation unit 7A that generates a gradation reference clock as a first reference clock for controlling the lighting gradation. The gray scale reference clock is sent from the timing generation unit 7A to each horizontal drive unit 3. However, in the present embodiment, the first reference clock generator 7 is provided in the drive controller 4 to transmit the grayscale reference clock. However, the first reference clock generator 7 is provided on the horizontal driver 3 side. Thus, a configuration in which the timing is autonomously generated can be adopted.

The drive control section 4 further includes an image data correction section and an image data storage section. The image data input from the outside is converted into a light emitting element 11 for each pixel by an image data correcting unit.
The DMA control unit 6A is corrected according to the variation in the characteristics, and
Is output to each horizontal drive unit 3 from the control unit. Correction data for this correction is stored in the correction data storage unit 9. The image data correction unit reads information data for correction from the correction data storage unit 9 and performs data correction. The correction data storage unit 9 is configured by a memory element such as a ROM, preferably an E ² PROM.

The correction data for correcting the variation for each light emitting element 11 is stored in the correction data storage unit 9. The correction data storage unit 9 is configured by a ROM that stores correction data calculated in advance. In the drive circuit illustrated in FIG. 11, the image data correction unit is provided separately from the drive control unit 4, but may be incorporated in the drive control unit 4. The correction data includes, for example, luminance correction data for correcting luminance for each light emitting element.

The connection portion, which is a physical interface of a signal, is a means for serially transmitting data from the controller to the LED unit, and can be electrically connected using wiring, or directly using optical fibers and electromagnetic waves. Can also be transmitted.

The vertical drive section 2 is a common driver for applying a current in the row direction of the display section 1, and is composed of semiconductor switching elements and the like. In FIG. 11, one vertical drive unit 2 switches a common line of each row in a predetermined order to apply a current. The row selected by the vertical drive unit 2 in one operation may be one row of the display unit 1 or a plurality of rows.

The horizontal drive unit 3 has a plurality of stages connected as shown in FIG. An LED driver constituting each horizontal control unit 3 is connected to each column of the light emitting elements 11, and LED drivers 1 to N for N columns are connected in series. Adjacent LED drivers are electrically connected by respective horizontal drive side communication units 8.

The horizontal drive unit 3 includes a horizontal drive side communication unit 8,
Memory unit 17, lighting control unit 15, constant current drive unit
It consists of. The memory unit 17 includes a shift register and the like. The horizontal drive unit 3 includes LEs arranged in each column direction.
D, and sequentially supplies current to the LEDs in the vertical direction in synchronization with the switching of the vertical drive unit 2 to perform dynamic lighting. The horizontal drive unit 3 includes a semiconductor switching element and a driver IC.

The horizontal drive section 3 has a horizontal drive side communication section 8. The horizontal drive side communication unit 8 communicates with the drive control unit 4 and the horizontal drive side communication unit 8 provided in the horizontal control unit 3 at the next stage. The horizontal drive side communication section 8 can obtain a synchronous clock signal by taking an exclusive OR (hereinafter, referred to as EXOR) of the data signal DATA and the strobe signal STROBE. The left and right terminals (communication terminals of the first communication unit and the second communication unit) are provided with a reception buffer with negative logic gate control and a transmission buffer with positive logic gate control. The right data reception detection unit 4 generates a gate control signal (select signal). As a result, when data reception is detected at one of the left and right communication terminals, the receiving side turns on the receiving buffer, the non-receiving side turns on the transmitting buffer,
The communication directions of the left and right buffers are fixed until a reset is input.

Further, the horizontal drive side communication unit 8 sends the D of the drive control unit 4 to the memory unit 17 provided in the horizontal drive unit 3.
The data sent from the MA control unit 6A is written.
In the example of FIG. 11, the DMA control unit 6A sends the image data to the memory unit 17, and the memory unit 17 holds the image data with a shift register. Each of the horizontal drive units 3 is configured to be assigned individual identification information 23, and image data or the like to which the identification information 23 of the destination horizontal drive unit 3 is added is transmitted from the drive control unit 4 of the image display device. You. After recognizing that the data is addressed to itself, the horizontal drive unit 3 performs reception processing.

On the other hand, the drive control section 4 has a unit communication section 5. The unit communication unit 5 receives control data from an external controller that transmits data for image display, and sends a memory to the DMA control unit 6A of the drive control unit 4,
Performs write and read operations on registers and the like. For example, if the unit communication unit 5 receives the image data from the external controller and rewrites the image data in the image data storage RAM provided in the DMA control unit 6A, the image display is updated. The control data of the image display device includes control of the drive circuit, temperature information inside the image display device, monitor information of the power supply voltage, detection of disconnection between the display device and the drive circuit, and failure due to abnormal temperature rise of the horizontal drive unit 3. And a process of confirming a signal pattern wiring failure inside the image display device, checking a data communication state between the control unit and the horizontal drive unit 3, and writing luminance correction data. The unit communication unit 5 exchanges these data between the external controller and the image display device according to a predetermined communication method.

The DMA controller 6A performs high-speed autonomous hardware data transfer to the horizontal drive side communication unit 8 in a predetermined format using image data, luminance correction data, and the like.
Particularly, in the case of an image display device using LEDs, the image refresh rate is about 4 times higher than the image refresh rate at a normal video rate.
A double to 16 times image refresh rate is required.
For this reason, at the time of dynamic driving, it is necessary to read out image data and luminance correction data directly from the memory by hardware processing and to perform high-speed data transfer.

FIG. 12 shows a time chart in a frame cycle operation at a 1/4 duty. In the present embodiment, a method is described in which the identification information 23 is given to the horizontal drive unit 3 and writing to a memory in the horizontal drive unit 3 and synchronization control are performed in a packet format from an external controller. Identification ID 23a as identification information 23 to be given
Is, for example, an identification number or the like unique to an IC constituting each horizontal drive unit 3. In FIG. 12, among the signals sent from the external controller to the image display device, a packet for detecting vertical synchronization is csp (Cycle Start Pa).
control data packets to each of the horizontal drive units 3 from 1 to N are denoted by ud1 to udN. On the other hand, the response packet transmitted from the horizontal drive unit 3 to the external controller is defined as res. In the present embodiment, full-duplex bidirectional communication is used, but a similar method is also possible in half-duplex bidirectional communication.

In the image display device, the DMA controller 6
The control data sent to the horizontal drive unit 3 from the
a_0 to data_3. Further, in FIG.
vsync is generated in the image display device according to the vertical synchronization detection data csp. This data determines the cycle of a packet for transmitting each frame data, and is used as a frame synchronization of each horizontal drive unit 3 and as a data latch trigger.

The drive controller 4 receives the vertical synchronization detection data csp sent from the external controller, recognizes the head of the image frame data, and performs vertical synchronization. By this synchronization detection, the lighting control signal (B
LANK), and generates a vertical drive unit control address based on a predetermined display speed. In FIG. 12, the vertical synchronization period is 60H.
An example of 4 × speed lighting with respect to z is shown, and one vertical driving cycle for performing one screen display of one image display device is 240 Hz.
Becomes In this case, the drive duty ratio is ４ for one frame packet section (about 16 ms) of the vertical synchronization cycle of 60 Hz, and the control is performed under four common lines. In this embodiment, the variable function of the refresh rate is realized by making the lighting double speed variable. Also, various data such as image data and brightness adjustment data are used for vertical synchronization detection data cs.
During one period of p, data is transferred by N (ud1 to udN), which is the number of the horizontal drive units 3 to be controlled. After receiving the data in each horizontal drive unit 3, the data is reflected in the next vertical cycle. Therefore, during reception of various data, writing to the memory in each horizontal drive unit 3 is performed, and the image data currently displayed is the data transferred in the previous vertical cycle.

FIG. 13 shows the DMA which is the driver communication unit 6.
The figure shows a data format configuration in a case where transmission data is communicated in a packet format when the control unit 6A controls each horizontal drive unit 3. The data packet 20 of this format includes a control field 21 and an information field 22. The control field 21 further includes identification information 23 (ID section) and control identification information 24 (CMD section).
Divided into

The control field 21 is a part for storing various kinds of identification information added to the actual data. The identification information 23 indicates information for identifying each horizontal driving unit 3. Each of the horizontal driving units 3 individually has an identification I as identification information 23.
Since D23a is given, it can be said that this information indicates the destination of the data to be transmitted.

The control identification information 24 is information indicating the type of control for controlling the horizontal drive unit 3. As the type of data, for example, a horizontal synchronization signal (HS
YNC) data, image data, gradation data, luminance adjustment data, rewriting of luminance correction data, reading of failure data, and the like.

The information field 22 indicates the contents of control data which is actual data according to the control identification information 24 of the CMD section. This enables individual control of each horizontal drive unit 3.

The data packet includes data to be transmitted to all the horizontal driving units, in addition to data such as image data to be transmitted to the individual horizontal driving units. Data packets to be transmitted to all the horizontal drive units include, for example, HSYNC and an automatic ID assignment command. These data packets have a common ID 2 as identification information 23.
3B is set.

FIG. 14 is a block diagram showing a state in which the drive control unit 4 transmits a data packet 20 in the format shown in FIG. 13 and each horizontal drive unit 3 receives the data packet. In this embodiment, a plurality of horizontal drive units 3 are connected in series to a drive control unit 4. The horizontal drive unit 3 has one input and one output, and is provided between the driver communication unit 6 of the drive control unit 4 and the horizontal communication unit of the horizontal drive unit 3 and via the horizontal communication unit. The spaces are connected. The packet data output from the drive control unit 4 can be transparently transferred to all the horizontal drive units 3.

In this embodiment, the flow of data communication is performed only in one direction. In FIG. 14, the horizontal drive side communication unit 8 of the horizontal drive unit 3 can output data only in one direction. A plurality of horizontal driving units 3 connected in series
Are connected in a ring through the drive control unit 4. Therefore, the data packet 20 output from the driver communication unit 6 of the drive control unit 4 transparently loops through each horizontal drive unit 3 and is connected to the last stage in the transmission direction of the data packet 20. The data packet 20 output from the horizontal drive communication unit 8 is transmitted to the driver communication unit 6 of the drive control unit 4.
Is input to That is, the configuration is such that the data packet 20 transmitted from the drive control unit 4 loops through each horizontal drive unit 3 in a loop and is returned to the drive control unit 4. However, the drive circuit of the present invention can be configured by bidirectional communication.

When the identification information 23 is set in each horizontal drive unit 3, each horizontal drive unit 3 monitors the ID which is the identification information 23 of the data packet 20, and the value of the ID matches its own identification ID 23a. At this time, the accompanying packet data is stored in the memory unit 17 inside the driving device. In FIG. 14, the drive control unit 4 includes data packets 201, 202,
203 are sequentially sent to the horizontal drive unit 3. ID =
The first horizontal driving unit 3 (LED driver 1) performs a receiving process when the data packet 201 passes, and
Is stored in the memory unit 17, and the horizontal drive unit 3 (L
The ED driver 2) stores DATA2 in the memory unit 17 when the data packet 202 passes.

Here, an example of the LED display unit has been described. However, the driving circuit and the driving unit of the present invention include:
For example, the present invention can be applied to a lighting device including a light emitting element such as an LED.

[0063]

As described above, according to the present invention, it is possible to provide a drive circuit and a drive unit capable of flexible connection. Furthermore, even if data is input from either of the two communication units, communication is possible through a common line, and the connection between the drive circuit and the drive unit can be minimized, thereby improving data transmission quality. And a more stable data transmission system can be constructed.

[Brief description of the drawings]

FIG. 1 is a circuit diagram schematically illustrating a driving method of an image display device.

FIG. 2 is a block diagram showing a driving circuit of a conventional image display device.

FIG. 3 is a diagram showing a connection example of a drive circuit in a conventional image display device.

FIG. 4 is a conceptual diagram of a drive circuit according to the present invention.

FIG. 5 is a diagram showing a connection configuration in which drive circuits are connected in series with the same data communication direction;

FIG. 6 is a diagram showing a connection configuration in which drive circuits are connected in series with data communication directions being alternately different directions;

FIG. 7 is a schematic diagram of a drive unit having a louver.

FIG. 8 is a block diagram schematically showing an example of a communication function part of a drive circuit according to the present invention.

FIG. 9 is a circuit diagram showing a specific example of a communication function part in the drive circuit of the present invention.

FIG. 10 is a schematic diagram showing an example of setting a communication direction in a drive unit according to the present invention.

FIG. 11 is a block diagram showing a driving circuit of the image display device according to one embodiment of the present invention.

FIG. 12 is a timing chart showing a frame cycle operation of the drive circuit of FIG. 3;

FIG. 13 is a conceptual diagram showing a format of transmission data.

FIG. 14 is a block diagram showing the flow of data reception in packet format.

[Explanation of symbols]

101: first communication unit 102: second communication unit 103: communication control unit 104: reception processing unit 105: drive unit 300: drive unit 400: drive control Units 711, 721: reception buffer 721, 722: transmission buffer 731, 732: reception data detection unit 740: reception data selection circuit 750, 801: reception processing unit 802: data selection Circuit 805: Left receiving buffer 806: Left transmitting buffer 807: Right transmitting buffer 808: Right receiving buffer 1: Display unit 2: Vertical driving unit 3: Horizontal driving unit 4: Drive control unit 5: Unit communication unit 6 Driver communication unit 6A DMA control unit 7 First reference clock generation unit 7A Timing generation unit 8 Horizontal drive communication unit 9 Correction data Data storage section 11a LED12 Common source line 13 Current line 14 Constant current drive section 14a Constant current source 15 Lighting control section 16 Decoder 17 Memory section 18 Control section 20 Data packets 201 and 202 , 203 ... data packet 21 ... control field 22 ... information field 23 ... identification information 23a ... identification ID 23A ... individual ID 23B ... common ID 24 ... control identification information

Claims (8)

[Claims] In a driving circuit for driving a light emitting element, a first communication unit capable of communicating either data reception or data transmission by a common line, and one of data reception and transmission by a common line A communicable second communication unit, a reception processing unit that performs data reception processing, and sets the first communication unit and the second communication unit to a reception state at an initial setting, and the first communication unit or the first communication unit When data is received by one of the second communication units, the data is received by the one communication unit and the reception processing unit performs reception processing on the basis of the data reception. And a communication control unit that controls data transmission from the unit. 2. The drive circuit according to claim 1, wherein the communication control unit controls to transmit data from the other communication unit based on a synchronous clock at the time of data reception. 3. The first communication unit and the second communication unit each include a reception buffer and a transmission buffer, and the communication control unit determines which of the reception buffer and the transmission buffer in each communication unit. The drive circuit according to claim 1, wherein control is performed such that each of the communication units selects one of reception and transmission in accordance with a select signal that is set to an effective state. 4. The initial setting is such that the first communication unit and the second communication unit are set to a reception state by inputting a reset signal to a drive circuit or receiving reset data in a reception processing unit. 4. The driving circuit according to any one of 1 to 3. 5. A drive unit having a plurality of drive circuits for driving a light emitting element, wherein each drive circuit has two communication units capable of communicating either data reception or data transmission by a common line, The drive circuits are connected in series by the common line. At the time of initial setting, each drive circuit controls so that data is received by both communication units, and data is received by one of the communication units. Then, based on the data reception, data transmitted to one communication unit thereafter is transmitted from the other communication unit, and the other drive circuits are connected in the order in which they are connected by the common line.
A drive unit that sets a communication direction by transmitting data received by one communication unit from the other communication unit based on the data reception when data is received by one communication unit. 6. When data is received by one of the communication units, the drive circuit transmits data received by one of the communication units from the other communication unit based on a synchronization clock at the time of data reception. 6. The drive unit according to claim 5, wherein the drive unit is used. 7. The drive unit according to claim 5, further comprising a drive control unit that controls driving of the light emitting element by transmitting data to one communication unit of a drive circuit connected to an end of the drive unit. Drive unit. 8. The initial setting is such that the first communication unit and the second communication unit enter a reception state by inputting a reset signal from the drive control unit to a drive circuit or receiving reset data in a reception processing unit. The drive unit according to claim 7, which is set.