JP2002079707A - Light-emitting array, optical printer head using the light-emitting element array and method for driving optical printer head - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an optical printer head, etc., which can easily reduce variations in emission intensity of light-emitting elements and can be made compact and low-cost. SOLUTION: The optical printer head is constituted of a plurality of light- emitting diodes (L1-L128) arranged in an array, field effect transistors (TR1-TR128) connected in series to the light-emitting diodes, shift transistors (FF1-FF128) for exciting the field effect transistors separately by supplying driving signals separately to gates of the field effect transistors, and an emission control means for letting the light-emitting diodes emit light by supplying emission signals having different signal levels corresponding to the light-emitting diodes to the light-emitting diodes to which the field effect transistors are connected when the field effect transistors are excited separately.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting element array in which a plurality of light emitting elements such as light emitting diodes are arranged in a row, an optical printer head using the light emitting element array, and driving of the optical printer head. It is about the method.

[0002]

2. Description of the Related Art FIG. 17 is a plan view showing a light emitting element array as a semiconductor light emitting device of a first conventional example for constituting an optical printer head (see Japanese Patent Application Laid-Open No. 61-205153). In the figure, 101 is a light emitting element array as a semiconductor light emitting device, 103 is a light emitting diode (LE)
D) is a light emitting element, and 113 is an electrode pad. The light emitting element array 101 has the light emitting elements 103 integrated in an array at an integration density of about 10 to 48 per mm. Electrode pads 113 for these light emitting elements 103
Are provided in a one-to-one correspondence, and the electrode pads 113 and the external circuit are connected by bonding wires. Therefore, power supply power is supplied to the light emitting element 103 through the bonding wire.
Will be supplied.

The electrode pads 113 are distributed on both sides of the substrate 1 and arranged in a staggered manner in order to secure a sufficient space for enabling wire bonding connection. The light emitting element 103 has, for example, 64 to 256 elements per chip formed monolithically, and
One light emitting element array 101 is configured. An optical print head is formed by mounting one or a plurality of such light emitting element arrays 101 on one circuit board.

FIG. 18 is a perspective view of a first conventional optical printer head constructed using the light emitting element array 101 of the first conventional example. In the figure, 101 is a light emitting element array, 110 is a circuit board on which the light emitting element array 101 is mounted, 111 is a conductive pattern provided on the circuit board 110, 112 is an electrode pad 1 of the light emitting element array 101.
13 is a bonding wire connecting the conductive pattern 111 on the circuit board 110; 120 is an FPC (flexible printed wiring board); 119 is a driver for driving the light emitting element array 101; 121 is wiring from a data input terminal of the driver 119; Yes, conductive pattern 11 on substrate 110
1 is formed at substantially the same pitch as the pitch of the light emitting elements 103.

When assembling such an optical printer head, first, the light emitting element array 101 is mounted on the circuit board 110 by die bonding and bonded, and then the electrode pads 113 of the bonded light emitting element array 101 and the circuit board 11 are mounted.
0 and the conductive pattern 111 on the bonding wire 11
Connect with 2. On the other hand, the output wiring (toward the light emitting element array 101) of the driver 119 connected to the FPC 120 by inner lead bonding or the like is connected to the circuit board 11
It is connected to the conductive pattern 111 on the zero by laser or thermocompression. Accordingly, the output wiring of the light emitting element 103 and the output wiring of the driver 119 are in one-to-one correspondence, and a current is supplied to the light emitting element 103 via the bonding wire 112. The input signal and applied voltage to the driver 119 are F
The light is supplied to the light emitting element 103 and the driver 119 via the wiring 121 of the PC 120.

FIG. 19 is a perspective view of a second conventional optical printer head. In the figure, 101 is a light emitting element array, 112 is a bonding wire, 119 is a driver,
Reference numeral 121 denotes an input wiring (input signal pattern) provided on the circuit board 110 to supply an input signal to the driver 119.

In the optical printer head shown in FIG. 19, a light emitting element array 101 and a driver 1 are first mounted on a circuit board 110.
19 is mounted and bonded by die bonding or the like. Next, the electrode pads 113 of the light emitting element array 101 and the output electrodes of the driver 119 are directly connected one to one by the bonding wires 112.

On the other hand, the input electrode of the driver 119 is
10 and directly connected to the input signal pattern 121 via the bonding wire 112 similarly to the output electrode.

Comparing the above two conventional examples, the connection method between the driver 119 and the light emitting element array 101 is different. That is, in the first conventional optical printer head, the output wiring of the driver 119 is once bonded to the conductive pattern 111 on the circuit board 110 and then connected to the light emitting element array 101 as shown in FIG. 19, the driver 119 and the light emitting element array 101 are directly bonded and connected as shown in FIG.

Both the first optical printer head and the second conventional optical printer head use a two-chip driver 11 to emit and drive the one-chip light emitting element array 101.
9 is common.

The arrangement of the electrode pads 113 of the light emitting element array 101 is generally staggered in the arrangement direction of the light emitting elements 103 as shown in FIG. It is also possible to form the light emitting element array 101 on only one side (one side extraction method) with respect to the light emitting element 103. In this case, the light emitting element array 101 of one chip can emit and drive with the driver 119 of one chip.

However, according to the first and second conventional optical printer heads, since the number of bonding between the light emitting element array 101 and the external driver 119 is extremely large in each of the optical printer heads, a high bonding pitch precision is obtained. Therefore, it has been difficult to improve the productivity of the optical printer head.

In the above-described conventional first and second optical printer heads, half or the same number of driver ICs as the total number of light emitting element arrays are provided. Therefore, a large space and a mounting process for mounting the optical printer head are required, and this is an obstacle to a reduction in the manufacturing cost of the optical printer head.

Further, in the above-described conventional first and second optical printer heads, since the light emitting element array and the driver IC are arranged in parallel, it is difficult to reduce the width of the optical printer head in the sub-scanning direction. This has been a major obstacle in reducing the size of the optical printer head.

Furthermore, in the semiconductor light emitting device of the first conventional example used in the first and second optical printer heads, the accuracy of the wire bonding step and the limit of narrowing the pitch of the electrode pads are limited by the distance between the light emitting elements. This is a major impediment to narrowing the pitch, making it difficult to achieve a light emitting element pitch of less than 22 μm, for example, required at 1200 dpi (dots / inch).

In view of the above, by forming a driver monolithically in the light emitting element array 101 in which only the light emitting elements 103 and the electrode pads 113 are formed, the number of bondings performed in the above-described conventional example can be reduced. A method has been proposed in which the quality can be greatly reduced, the reliability can be improved, the manufacturing cost can be reduced, and high-quality printing can be performed by narrowing the pitch of the light emitting elements.

FIG. 20 is a plan view of a light emitting element array which is a semiconductor light emitting device according to a second conventional example for constituting an optical printer head (see US Pat. No. 4,587,717). Here, the monolithic circuit is formed by forming the light emitting element 103, which is a GaP light emitting diode, the output circuit 122a and the signal processing circuit 122b constituting the drive circuit 122 in the same chip on the silicon substrate 2 in a monolithic manner. An output circuit 122a is connected to the light emitting element 103.
Are supplied in parallel, serial, or mixed serial / parallel.

FIG. 21 is a sectional view of a light emitting element array which is a semiconductor light emitting device according to a third conventional example for constituting an optical printer head (see Japanese Patent Publication No. 6-94216). In the figure, reference numeral 102 denotes a silicon substrate, on which a plurality of light emitting elements 103, which are light emitting diodes, and a plurality of driver elements 109 for driving these light emitting elements 103 are provided.
3 and each driver element 109 are monolithically integrated so as to correspond one-to-one. By this, 64-25
A light-emitting element array 101 having about six light-emitting elements 103 and driver elements 109 is formed.

In the figure, reference numeral 124 denotes an element isolation layer, which performs optical isolation between adjacent light emitting elements 103 and electrical isolation between the light emitting element 103 and the driver element 109. This element isolation layer 124 is provided on the silicon substrate 102 around the light emitting element 103. The wiring portion 106 electrically connects the light emitting element 103 and a driver element 109 corresponding to the light emitting element 103. The electrode pads 113 are formed on the silicon substrate 102, and are provided in a number necessary for supplying a signal for driving the light emitting element 103 via the driver element 109, for example, about 6 to 7 for one chip light emitting element array 101. Can be Diffusion resistance 1
The reference numeral 08 forms an ohmic contact with the light emitting element 103 and performs insulation separation from the silicon substrate 102 to limit the current between the light emitting element 103 and the driver element 109. Note that the insulating layer 107 is provided over the driver element 109.

FIG. 22 shows the light emitting element array 1 shown in FIG.
It is an equivalent circuit diagram of No. 01. Although this equivalent circuit diagram is for one light emitting element 103, each light emitting element 10
Diffusion resistor 10 functioning as current limiting resistor for 3
8 and the driver element 109 are connected. That is, the light emitting element 103 is configured to selectively emit light by the driver element 109 and a logic circuit (register) (not shown). To make the light emitting element 103 emit light,
The driver element 109 is turned on to apply a constant voltage Vdd. At this time, a current flowing through the light emitting element 103 is supplied via the diffusion resistor 8.

FIG. 23 is a perspective view of a third conventional optical printer head constituted by using a plurality of light emitting element arrays 101 of FIG. In the figure, 110 is a circuit board,
A plurality of light emitting element arrays 101 are arranged and mounted on the circuit board 110 such that the arrangement of all the light emitting elements 103 is linear, and fixed by an adhesive. The electrode pads of the light emitting element array 101 and the circuit pattern (conductive pattern) 111 formed on the circuit board 110 are connected by bonding wires 112. A logic circuit signal and power are supplied to each light emitting element array 101 via an interface input connector 125 provided on the circuit board 110 so as to be electrically connected to the circuit pattern 111.

In the light emitting element array of the third conventional example, the constant voltage Vdd is applied to each light emitting element 1 of the light emitting element array.
03 are commonly applied. In this case, each light emitting element 103
Is driven by controlling a transistor of a driver element by a logic circuit (shift register) not shown.

In this case, the number of bonding pads is 6 to 7 for supplying a logic circuit signal and a constant voltage for driving the light emitting element.
Although it is only about this, it is difficult to correct the light emission variation in the light emitting element array 101 and between the light emitting elements due to the constant voltage driving.

In a conventional light emitting element array,
Usually, the light emission intensity of the light emitting element 103 is
1 and between manufacturing lots of the light emitting element array 101. Since such variations directly affect the printing quality of a printer using an optical printer head, variations in emission intensity are generally ± 10% within the light emitting element array.
Only a part of the light-emitting element arrays, which are suppressed to less than 1, are treated as non-defective, and many other light-emitting element arrays are determined to be defective and discarded. is there.

Therefore, in a conventional optical printer head, a driver for driving a light emitting element array is provided with a function of correcting a variation in light emission intensity between the light emitting element arrays.
A method of increasing the yield of the light emitting element array and improving the yield has been adopted.

This correction is performed by measuring a variation in light emission intensity when the light emitting element array wired and mounted on the optical printer head is driven at a constant voltage as an initial value, and then adjusting the light emission intensity within the light emitting element array and between the light emitting element arrays. There is a method of adjusting the drive voltage (current) of each light emitting element so as to be uniform, and there are the following two methods in this method.

The first correction method adjusts (trims) the resistance component connected in series to the light emitting element according to the initial value, thereby adjusting the value of the current flowing through the light emitting element when a constant voltage is applied. How to

The second correction method is a method of adjusting the output of a transistor constituting a driver element by using correction data superimposed on image data according to an initial value.

FIG. 24 is a block diagram of a driver circuit that performs 16-stage correction by the second correction method. Here, at least four transistors having different outputs per dot of the light emitting element are required, and a shift register having the same number of parallel outputs as the number of light emitting elements driven for inputting correction data to each transistor is required. And at least four correction circuits 126 formed by latches.

When the first correction method is applied to the third conventional example, it is necessary to adjust the resistance value of the diffusion resistor 108 shown in FIG. However, it is difficult to adjust the diffusion resistance value by adjusting the concentration and depth of the dopant diffusion and the annealing after the wiring is mounted on the optical printer head. In addition to the diffusion resistance, it is necessary to monolithically form a thin film resistance wiring capable of trimming the resistance value and other trimming circuits.

When the second correction method is applied to the third conventional example, it is necessary to further monolithically form a plurality of stages of shift registers and latches corresponding to each gradation.

From these facts, in the light-emitting element array of the third conventional example, the scale of the driver circuit formed monolithically increases with its function, and the chip size increases, so that the number of chips per wafer can be reduced. The number will be reduced.

Further, the manufacturing yield of the light emitting element array decreases in proportion to the scale of the driver circuit formed monolithically. This is the same for the light emitting element array of the second conventional example. That is, the second and third
Due to the problems of the conventional light emitting element array, the effect of improving the process yield by greatly reducing the number of connection terminals and the effect of reducing the cost by reducing the number of driver chips reduces the manufacturing cost and reliability of the optical printer head. Offset. Therefore, it can be said that the second and third conventional examples are low-feasibility technologies in terms of manufacturing cost.

The present invention has been made in view of such circumstances, and a light-emitting element array capable of easily reducing the variation in light-emitting intensity of the light-emitting element and achieving reduction in size and cost. An object of the present invention is to provide an optical printer head using the light emitting element array and a method for driving the optical printer head.

[0035]

A light emitting element array according to the present invention includes a plurality of light emitting elements arranged in a row and a light emitting element connected in series to each light emitting element for supplying a light emitting signal to each light emitting element. A switching element having a control terminal and conduction driving means for individually conducting each switching element by individually supplying a conduction driving signal to a control terminal of each switching element, which are integrally provided on a semiconductor substrate. It is.

According to this configuration, since the switching elements connected in series are individually turned on, the light emitting elements connected to the switching elements are individually driven. Therefore, when a switching element is turned on, a light emitting signal having a changed signal level is supplied to a light emitting element connected to the switching element so as to correspond to each light emitting element. Variations in light emission intensity can be easily corrected, while gradation control required for high quality printing can be easily performed. Further, since the entire circuit configuration is simplified as compared with the conventional one, the size of the light emitting element array can be reduced and the manufacturing cost can be reduced.

Further, the light emitting element array according to the present invention is arranged in a row, a plurality of light emitting elements divided into a plurality of driving groups, and the light emitting elements of each driving group are connected in series. A switching element with a control terminal for supplying a light-emitting signal to each light-emitting element, which is divided into a plurality of drive groups corresponding to the drive groups, and a control terminal of a switching element of each drive group which is the same for each drive group The driving elements are divided into a plurality of driving groups corresponding to the driving groups of the light emitting elements, by individually supplying the conduction driving signals at the timing to individually turn on the switching elements of each driving group at the same timing for each driving group. And a conduction driving means provided on a semiconductor substrate.

According to this configuration, the switching elements connected in series in each driving group are individually turned on at the same timing for each group, so that the light emitting elements connected to the switching elements are changed for each driving group. At the same timing. Therefore, when a switching element of each drive group is turned on, a light emitting signal whose signal level is changed corresponding to each light emitting element is supplied to a light emitting element connected to the switching element, Variations in light emission intensity of each light emitting element can be easily corrected, while gradation control required for high quality printing can be easily performed.

Further, since the entire circuit configuration is simplified as compared with the conventional one, the size of the light emitting element array can be reduced and the manufacturing cost can be reduced. Further, since the light emitting elements of each driving group are driven in parallel at the same timing for each driving group, the driving speed of the light emitting elements can be increased, and as a result, an optical printer using this light emitting element array The print operation of the head can be speeded up.

Further, the optical printer head according to the present invention comprises:
A plurality of light-emitting elements arranged in a row, switching elements connected in series to each light-emitting element and having a control terminal for supplying a light-emitting signal to each light-emitting element, and individually conducting to the control terminal of each switching element A light emitting element array including a conduction driving means for individually conducting each switching element by supplying a driving signal, and a driving signal supplied to the conduction driving means to drive the conduction driving means, and the switching element A light emission control means for supplying a drive signal to the light emitting element to which the switching element is connected when individually turned on to individually drive the light emitting element.

According to this configuration, the switching elements connected in series are individually turned on, and a light emitting signal is supplied to the light emitting elements connected to the turned on switching elements to be individually driven. Therefore, when a switching element is turned on, a light emitting signal having a changed signal level is supplied to a light emitting element connected to the switching element so as to correspond to each light emitting element. Variations in light emission intensity can be easily corrected, while gradation control required for high quality printing can be easily performed. Further, since the size of the light emitting element array and the manufacturing cost can be reduced, the size and cost of the optical printer head can be reduced.

Further, the optical printer head according to the present invention is
Arranged in a row, a plurality of light-emitting elements divided into a plurality of drive groups, connected in series to each light-emitting element, divided into a plurality of drive groups corresponding to the drive groups of the light-emitting elements, each light-emitting element A switching element with a control terminal for supplying a light-emitting signal, and a switching element for each drive group by individually supplying a conduction drive signal to the control terminal of the switching element for each drive group at the same timing for each drive group. A light-emitting element array including conduction driving means divided into a plurality of drive groups corresponding to the drive groups of the light-emitting elements, which are individually made conductive at the same timing for each drive group, and divided into the plurality of drive groups. The conduction drive signal is supplied to the conduction drive means at the same timing for each drive group, and the conduction drive means is driven by each drive group. Each drive group is driven at the same timing for each loop, and when the switching elements divided into the plurality of drive groups are individually turned on at the same timing for each drive group, the drive elements of the respective drive groups to which the switching elements are connected are connected. A light emission control unit that supplies a light emission signal to the light emitting element and individually drives the light emitting element.

According to this configuration, the switching elements connected in series in each drive group are individually turned on at the same timing for each group, and a light emitting signal is sent to the light emitting element connected to the turned on switching element. It is supplied and driven individually at the same timing for each group. Therefore, when a switching element of each drive group is turned on, a light emitting signal whose signal level is changed corresponding to each light emitting element is supplied to a light emitting element connected to the switching element, Variations in light emission intensity of each light emitting element can be easily corrected, while gradation control required for high quality printing can be easily performed.

Further, since the size of the light emitting element array can be reduced and the manufacturing cost can be reduced, the size and cost of the optical printer head can be reduced. Further, since the light emitting elements of each driving group are driven in parallel at the same timing for each driving group, the printing operation of the optical printer head can be speeded up.

Further, the method for driving an optical printer head according to the present invention is characterized in that a plurality of switching elements respectively connected in series to a plurality of light emitting elements are individually turned on, and when the switching elements are individually turned on. A light emitting signal whose signal level is changed corresponding to each light emitting element is supplied to the light emitting element to which the switching element is connected, and the light amount of the light emitting element is individually adjusted.

According to this method, it is possible to easily correct the variation in the light emission intensity of each light emitting element by a simple method, while easily performing the gradation control necessary for the high quality of the print. Further, by adopting this driving method, the size of the light emitting element array and the manufacturing cost can be reduced, so that the size and cost of the optical printer head can be reduced.

[0047]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a light emitting element array which is a semiconductor light emitting device of the present invention and an optical printer head constructed using the light emitting element array will be described in detail with reference to the accompanying drawings. In addition, each figure schematically shows the structure obtained during the manufacturing process of the light emitting element array and the optical printer head, and the shapes, sizes, and arrangement relations of the components so that the present invention can be understood. Things.

FIG. 1 is a sectional view of a main part of an optical printer head formed using a light emitting element array according to the first embodiment of the present invention. The optical printer head according to the present invention is configured by mounting a plurality of light emitting element arrays on a circuit board. In FIG. 1, a light emitting element array 1 which is a semiconductor light emitting device has a line shape (row shape) on a silicon substrate 2.
A plurality of light emitting elements 3 each composed of a light emitting diode arranged in
A plurality of output transistor circuits 4 including a field effect transistor as a switching element with a control terminal provided in a one-to-one correspondence, a shift register circuit 5 for controlling on / off of each output transistor circuit 4, and the like are semiconductors. It is formed using a manufacturing technique. The output transistor circuit 4 and the shift register circuit 5 constitute a driver circuit 9 for controlling the driving of the light emitting diode.

Incidentally, as the switching element provided corresponding to each light emitting element 3, a bipolar transistor or the like can be used in addition to the field effect transistor. An electrode pad 1 connected to an output transistor circuit 4, a shift register circuit 5, etc., is formed on a silicon substrate 2.
4 to 18 are formed by appropriate means such as printing.

In the light emitting element array 1 having such a configuration,
First, a driver circuit 9 including an output transistor circuit 4 and a shift register circuit 5 is formed on a silicon substrate 2, and then a plurality of light emitting elements 3 are formed in a row. Finally, a wiring section 6, an insulating layer 7, and a resistance layer 8, electrode pads 14 to 18 and the like are formed.

That is, the light emitting element 3 is formed on the silicon substrate 2 after the driver circuit 9 is formed. The wiring section 6 made of a metal thin film is formed after forming the driver circuit 9 made of a silicon semiconductor and the light emitting element 3 made of a compound semiconductor.

The driver circuit 9 is formed before the formation of the light emitting element 3 because the silicon semiconductor has a higher heat history than the light emitting element made of the compound semiconductor. Further, the wiring portion 6 made of a metal thin film reacts with a semiconductor even at a low temperature of 400 ° C. or less to break a circuit, and thus is formed after forming a silicon semiconductor and a compound semiconductor formed at a relatively high temperature.

Output transistor circuit 4 requiring fine wiring
Driver circuit 9 comprising a shift register circuit 5
It is appropriate to use a silicon CMOS circuit whose microfabrication technology has been established and whose manufacturing cost is low. Further, it is appropriate to use a compound semiconductor having high luminous efficiency and high reliability for the light emitting element 3.

The silicon substrate 2 is formed by a conventionally known semiconductor manufacturing technique. On the other hand, the formation of the compound semiconductor on the silicon substrate 2 is performed by a two-stage growth method using a conventionally known MOCVD (organic metal chemical vapor deposition) method.

Since the driver circuit 9 is composed of the output transistor circuit 4 and the shift register circuit 5 having a simple structure, the wiring portion 6 of the driver circuit 9 has at least one metal thin film except for the wiring made of polysilicon. In this case, the manufacturing cost can be reduced and the reliability can be improved.

The switching elements forming the output transistor circuit 4 are formed by field effect transistors such as CMOS, NMOS, PMOS, etc., and doping type of the silicon substrate 2, diode characteristics of the light emitting element 3, or driving power supply. An appropriate characteristic is selected according to the sign. Of course, as described above, another switching element such as a bipolar transistor can be used instead of the field effect transistor.

Further, in the light emitting element 3 having diode characteristics such as a light emitting diode, the connection relationship between the cathode electrode or the anode electrode and the output transistor circuit 4 is appropriately determined by the wiring layout, the structure of the output transistor circuit 4, and the like. . That is, in the present embodiment, since an N-channel field effect transistor is formed as a switching element of the output transistor circuit 4, for example, the source of the field effect transistor is set to the anode of the light emitting element 3, and the drain is set to the light emitting element. A gate is connected to a shift register circuit 5 via a buffer to a common power supply line for supplying a drive signal to the anode of the shift register 3. Note that all the cathode sides of the light emitting elements 3 are connected to a common line connected to the ground (GND).

The output transistor circuit 4 constituting the driver circuit 9 may be formed using a compound semiconductor having high mobility. Thereby, the output transistor circuit 4
Can be reduced in size. Further, the light-emitting element 3 may be formed using an inorganic or organic EL material.

The resistance layer 8 used for current limiting
May be omitted when the external driver 19 (FIG. 3) has a current limiting function. The power supply lines to each output transistor circuit having a multilayer wiring structure are insulated by an insulating film such as silicon oxide (SiO ₂ ), but may be insulated by an air bridge instead of silicon oxide.

The light emitting element array 1 configured as described above
Are mounted on the circuit board 10, each of the electrode pads 14 to 18 and the circuit board 1 on which an external driver is mounted.
An optical printer head is configured by connecting a circuit pattern 11 formed on printing 0 by an appropriate means such as printing with a bonding wire 12.

FIG. 2 is a plan view showing an example of a circuit configuration of the light emitting element array 1 according to the present invention. That is, the light emitting element array 1 includes three types of functional elements (circuits) of the light emitting element 3, the output transistor circuit 4, and the shift register circuit 5.
It consists of.

The number of the electrode pads 14 to 18 can be reduced to five as in this embodiment. in this case,
Electrode pad 14 is for ground (GND), electrode pad 1
Reference numeral 5 denotes a driver circuit power supply (VDD), an electrode pad 16 is used for a reset signal (RST), an electrode pad 17 is used for a block signal (BLK), and an electrode pad 18 is used for a light emitting element drive signal (I). That is, the electrode pads 14 to 18
Functions as terminals for receiving supply of the above four types of signals from an external driver. As described above, in the present embodiment, the number of electrode pads can be reduced to five, so that not only can the size and cost of the light emitting element array 1 be reduced, but also the mounting cost for the circuit board 10 can be dramatically reduced. Can be reduced.

The silicon substrate 2 has a rectangular shape, and the plurality of light emitting elements 3 are arranged along one long side of the silicon substrate 2 and the plurality of electrode pads 14 to
18 are arranged along the other long side. Therefore, as shown in FIG. 1, the connection direction between the light emitting element array 1 and the circuit pattern 11 of the circuit board 10 is one direction, and the mounting process can be simplified.

Further, the light emitting element 3 and the electrode pads 14 to 18
In order to arrange the driver circuit 9 between them, the interval between the light emitting element 3 and the electrode pads 14 to 18 is at least 200 μm. Thereby, the reflected light of the light emitting element 3 by the bonding wire 12 connected to the electrode pads 14 to 18 can be reduced, and the printing quality can be improved.

Here, the longitudinal direction of the silicon substrate 2 on which the light emitting elements 3 are arranged in a row is referred to as a chip length, and the direction perpendicular thereto is referred to as a chip width. The chip length of the light emitting element array 101 having the above configuration is determined by the arrangement pitch of the light emitting elements 3 corresponding to the printing resolution. That is, 600 dpi
Is 42μm, 21μ at 1200dpi
Therefore, when 128 light emitting elements 3 are arranged in a row, the chip length is 5.4 mm at 600 dpi and 2.7 mm at 1200 dpi.

The pitch per output of the output transistor circuit 4 and the shift resist circuit 5 is substantially the same as the pitch of the light emitting element 3.

FIG. 3 is a diagram showing an equivalent circuit of the light emitting element array 1 shown in FIG. Here, L1 to L128 indicate the light emitting elements 3 including the light emitting diodes arranged in a row, and TR1 to TR128 indicate the respective light emitting elements L1 to L128.
1 shows a field-effect transistor that forms the output transistor circuit 4 connected to the first embodiment. Also, BF1 to BF1
Reference numeral 28 denotes a buffer connected to the field-effect transistors TR1 to TR128, and FF1 to FF128 denote flip-flops included in the shift register circuit 5 that supplies a drive signal to the field-effect transistors TR1 to TR128. . Note that the field effect transistor T
R1 to TR128 are N-channel type in the present embodiment. Further, the field-effect transistors TR1 to TR
It is preferable to use 128 with a back gate from the viewpoint of operation stability.

Here, the cathodes of the light emitting elements L1 to L128 are connected to a first common line CM1 connected to the ground (GND), and the anodes are connected to the sources of the field effect transistors TR1 to TR128. . Each drain of the field effect transistors TR1 to TR128 is connected to a second common line CM2 connected to the electrode pad 18 for the light emitting element drive signal (I), and each gate of the field effect transistors TR1 to TR128 is The buffers are connected to the Q-output terminals of the corresponding flip-flops FF1 to FF128 via the buffers BF1 to BF128.

The φ input terminals of the flip-flops FF1 to FF128 are connected to a block signal (BL) via a buffer.
K) is connected to the third common line CM3 connected to the electrode pad 17 for K). First stage flip flop F
The S-input terminal of F1 and the R-input terminals of the second and subsequent flip-flops FF2 to FF128 are connected to a fourth common line CM4 connected to an electrode pad 16 for a reset signal (RST) via an amplifier. It is connected to the.

The first stage flip-flop FF1
Are set by a reset signal (RST) and are set as D flip-flops with a set so that they are reset at the falling edge of the next block signal (BLK). Flip flops FF2 to FF12 in the second and subsequent stages
8 is a D-type flip-flop with reset.
Also, Do1 to Do128 are flip-flop FFs.
1 shows driving signals output from Q-terminals of FF128.

Each flip flop FF1 to FF128
Are supplied to the gates of the field effect transistors TR1 to TR128 via the two-stage buffers BF1 to BF128 in order to drive the high output field effect transistors TR1 to TR128. This buffer BF
1 to BF128 are flip-flops FF1 to FF12
8 can be omitted by incorporating a buffer circuit in the Q-output section, whereby the light emitting element array 1 can be downsized. The reset signals and the block signals are supplied from the electrode pads 16 and 17 to the flip-flops FF1 to FF128 via a protection circuit for protecting against excessive voltage due to noise entering from the external driver side. Is preferred.

The ground (GND) electrode pad 14 and the driver circuit power supply (VDD) electrode pad 15 are connected to the shift register circuit 5 and the like constituting the driver circuit 9 via wiring (not shown). It has become.

FIG. 4 is a diagram showing a signal sequence for explaining the operation of the light emitting element array 1 configured as a circuit as shown in FIG.

The flip-flops FF1 to FF128 constituting the shift register circuit 5 are supplied with a reset signal (RS
T) and a block signal (BLK) are input from the electrode pad 16 and the electrode pad 17, respectively. First, the first flip-flop FF
1 is set by the reset signal input from the electrode pad 16 and reset at the falling edge of the block signal input from the electrode pad 17. At the same time as this reset, the flip-flop FF2 of the second stage is set, and reset at the falling edge of the next block signal.

Similarly, the flip-flops FF3 to FF128 of the third and subsequent stages are set at the same time as the flip-flops of the preceding stage are reset, and are reset at the falling edge of the sequentially input block signal. As described above, the flip-flops FF1 to FF128 are sequentially set and reset, so that the driving signal Do1 is output from each Q- terminal.
To Do128 are sequentially output. That is, each of the flip-flops FF1 to FF128 outputs a drive signal from the Q- terminal when set by the reset signal,
When reset at the falling edge of the block signal, the output of the drive signal is stopped.

As described above, the flip flops FF1 to FF1
The drive signals Do1 to Do128 are sequentially output from the FF128, and the respective field effect transistors TR1 to TR128 are output.
, The field effect transistors TR1 to TR128 are turned on by conducting between the drain and the source for the supply period of the drive signal. That is, flip flops FF1 to FF128
The shift register circuit 5 is configured to supply drive signals to the gates, which are control terminals of the field-effect transistors TR1 to TR128, in the order of the arrangement of the light-emitting elements L1 to L128. A driving means for selectively (individually) conducting between the drain and the source of the transistors TR1 to TR128 is configured.

On the other hand, each of the field effect transistors TR1 to TR1
A light emitting element driving signal (image data), which is a light emitting signal, is supplied from the electrode pad 18 via the second common line CM2 in synchronization with the ON state of the TR 128, whereby the corresponding light emitting elements L1 to L128 are sequentially driven. Is done. That is, the image data serially supplied from the external driver via the electrode pad 18 is converted into parallel image data, the image data is distributed to the light emitting elements L1 to L128, and the light emission output of each light emitting element L1 to L128 is changed. Will be controlled.

The CLK signal shown in FIG.
A clock signal generated by an external circuit for synchronizing the overall operation.

While the plurality of output transistor circuits 4 are sequentially switched on / off by the drive signal from the shift register circuit 5 in this manner, the second transistor on the anode side is made to correspond to the serial data input from the electrode pad 18. By varying the value of the current flowing through the common line CM2, the plurality of light emitting elements 3 (L1 to L128) are selectively (individually) emitted and driven one by one.

That is, when the light emitting elements 3 emit light, the current level (high level) flowing through each light emitting element 3 can be adjusted,
The amount of light of the light emitting elements 3 is individually adjusted by adjusting the energizing time by a constant value current flowing through each light emitting element 3, which is necessary for correcting the light emitting variations of the light emitting elements 3 and improving the quality of printing. Gray scale control is performed. As a result, from each of the light-emitting elements 3, a light-emitting output whose light-emitting output is corrected according to the variation and a light-emitting output whose gradation is controlled in accordance with the image data are obtained.

In the present embodiment, the correction of the light emission variation of the light emitting elements 3 and the gradation control are performed by adjusting the value of the current flowing through the light emitting elements 3 and the conduction time. Even if the amount of current (current value × time) is adjusted, or the voltage level applied to the light emitting element 3 or the voltage application time is adjusted, it is possible to perform the correction of the light emission variation of the light emitting element 3 and the gradation control. it can.

Further, in this embodiment, an N-channel field effect transistor is used as the field-effect transistor constituting the output transistor circuit 4, but a P-channel transistor may be used. In this case, the anode of the light emitting element 3 is connected to the first common line CM1, and the cathode is connected to the second common line C1 via a field effect transistor.
What is necessary is just to connect to M2. Furthermore, in this case,
The current of the second common line CM2 is set to a low level. In this embodiment, the field effect transistor is connected to the anode of the light emitting element 3 and the second common line C.
Although the connection is made between the first common line CM1 and the second common line CM1, the connection between the first common line CM1 and the cathode of the light emitting element 3 may be made. In this case, the common line connected to the ground is called a second common line CM2, and the electrode pad 1
8 is referred to as a first common line CM1.

FIG. 5 is a plan view showing the configuration of an optical printer head 24 in which a plurality of light emitting element arrays 1 according to the first embodiment of the present invention are mounted on a circuit board 10 on which an external driver 25 is mounted. It is. The light-emitting output of each light-emitting element of each light-emitting element array 1 is controlled by serial data (light-emitting element drive signal) supplied from an external driver 25 having a function of correcting a variation in light-emitting intensity and a function of controlling gradation. The driver circuit 9 (FIG. 1) for switching each light emitting element is driven in synchronization with a reset signal or a block signal from the external driver 25.

The external driver 25 is, for example, a constant current output circuit for generating a light emitting element drive signal to be supplied to each light emitting element 3, and a current for performing variation correction of light emission intensity of the light emitting element 3 and gradation control. A predetermined circuit such as a shift register for correction or time correction, an operation switching circuit for sequentially switching the light emitting element drive signal supplied to the light emitting element 3 for each corresponding light emitting element, and a clock counter for outputting a clock signal are provided. It is formed integrally on a semiconductor substrate.

From the above constant current output circuit, a light emitting element drive signal to be supplied to a plurality of light emitting element arrays 1 constituting the optical printer head is simultaneously output. The driver circuit power supply supplied to the electrode pad 15 and the reset signal supplied to the electrode pad 16 correspond to the external driver 2
The output from the control circuit provided in the preceding stage of 5 is supplied via the external driver 25. When a voltage is applied to the light emitting element 3 as a light emitting element drive signal, a constant voltage output circuit can be used instead of the constant current output circuit.

The external driver 2 configured as described above
Reference numeral 5 indicates that each output terminal is connected to the electrode pads 16 to 18 shown in FIG. 3, and a reset signal, a block signal, and a light emitting element drive signal are output at the timing shown in FIG. 4 and supplied to the corresponding electrode pads 16 to 18. You. Here, each light emitting element 3
A correction value is stored in a memory such as a control circuit provided at a preceding stage in accordance with a variation in light emission intensity of each light emitting element 3. The stored correction value Is supplied to each light emitting element 3 on the basis of.

The optical printer head 2 configured as described above
In No. 4, the number of bonding wires per one (one chip) of the light emitting element array 1 is five, which is smaller than that of the conventional light emitting element array having 128 light emitting elements. The number of the bonding wires 12 used for the connection with the connection 11 can be reduced from 1/13 to 1/26. Accordingly, the mounting cost can be significantly reduced, and the cost and reliability of the optical printer head can be reduced.

Further, the number of electrode pads requiring an occupied area larger than that of the circuit pattern 11 can be reduced to 1/13 or 1/26 as described above. Accordingly, the length of the circuit board 10 in the short direction can be significantly reduced, and not only the cost of the optical printer head 24 can be reduced, but also the size of the optical printer head 24 can be reduced.

As described above, the light emitting element array 1 according to the first embodiment of the present invention and the light emitting element array 1
The optical printer head 24 is configured by connecting one end of each of the light emitting elements 3 arranged in a row to the first common line CM1 and connecting the other end to the second common line CM2 via a switching element. And the light emitting elements 3 are selectively driven, so that the level of the current flowing through each light emitting element 3 and the energizing time can be individually adjusted, and the voltage level applied to each light emitting element 3 The voltage holding time can be adjusted individually.
And the gradation control can be easily performed.

Further, the area occupied by the driver circuit and the electrode pads, the number of bonding wires, and the number of external drivers are reduced, so that the manufacturing cost and size of the optical printer head can be reduced, and the mounting time thereof can be significantly reduced. Thus, the work of assembling the optical printer head can be simplified. By providing a distance of 200 μm or more between the electrode pads 14 to 18 and the light emitting element 3 of the light emitting element array, light from the light emitting element is reflected by the bonding wires 12 and the like near the electrode pads 14 to 18. This can be effectively prevented, and the reliability of the optical printer head can be improved.

FIG. 6 is a sectional view of an essential part of an optical printer head formed by using the light emitting element array according to the second embodiment of the present invention. FIG. 7 is a circuit configuration of the light emitting element array according to the present invention. It is a top view which shows an example. In these figures, the same components as those according to the first embodiment shown in FIGS. 1 and 2 are denoted by the same reference numerals, and detailed description thereof will be omitted. explain.

That is, the light emitting element array 1a according to the second embodiment is different from the light emitting element array 1 according to the first embodiment in that a driver circuit including an output transistor circuit and a shift register circuit operates in parallel with each other. (N is a natural number of 2 or more) groups, and the light-emitting elements connected to a common signal line for each group and made drivable by the driver circuits of each group are divided into groups. In that each driver circuit is connected to a different drive signal line.

That is, the light-emitting element array 1a according to the second embodiment includes a plurality of light-emitting elements 3 each composed of light-emitting diodes arranged in a line (in a row) on a silicon substrate 2; A plurality of output transistor circuits 4 including field-effect transistors provided to control current supply to the semiconductor device, a shift register circuit 5 for controlling the on / off of each output transistor circuit 4, and electrode pads 14 to 19 are formed. , A driver circuit 9 including an output transistor circuit 4 and a shift register circuit 5 are divided into N groups (N is a natural number of 2 or more) operating in parallel with each other. As a result, the plurality of light emitting elements 3 are also divided into N groups corresponding to the divided driver circuits 9.

More specifically, in the present embodiment, the output transistor circuit 4 and the shift register circuit 5 constituting the driver circuit 9 are composed of the first and second output transistor circuits 4.
a, 4b and the first and second shift register circuits 5a,
5b (that is, set to N = 2), the shift register circuit 5 is connected to a common signal line for both groups, and the divided driver circuits 9 are connected to each other in each group. They are driven in parallel (that is, driven simultaneously in groups). As described above, the driver circuits 9 are driven in parallel for each group, so that the light emitting elements 3 that are divided corresponding to the divided driver circuits 9 are also driven in parallel for each group.

The number of electrode pads 14 to 19 can be reduced to six as in this embodiment. in this case,
Electrode pad 14 is for ground (GND), electrode pad 1
5 is a driver circuit power supply (VDD1), electrode pad 16
Is a reset signal (RST), an electrode pad 17 is for a block signal (BLK), an electrode pad 18 is for a first light emitting element drive signal (VDD2), and an electrode pad 19 is for a second light emitting element drive signal (VDD3). It is said. That is, the electrode pads 14 to 19 function as terminals for receiving supply of the above five types of signals from the external driver.

The silicon substrate 2 has a rectangular shape as in the first embodiment, and a plurality of light emitting elements 3
Are arranged along one long side of the silicon substrate 2, and the plurality of electrode pads 14 to 19 are arranged along the other long side. Therefore, as shown in FIG.
And the circuit pattern 11 of the circuit board 10 is connected in one direction, so that the mounting process can be simplified.

Further, the light emitting element 3 and the electrode pads 14 to 19
Since the driver circuit 9 is disposed therebetween, the distance between the light emitting element 3 and the electrode pads 14 to 19 is set to 200 μm or more as in the first embodiment. Thereby, the reflected light of the light emitting element 3 by the bonding wire 12 connected to the electrode pads 14 to 19 can be reduced, and the printing quality can be improved.

The light emitting element array 1a thus configured
Is a circuit board 1 on which a plurality thereof are mounted on a circuit board 10 and each of the electrode pads 14 to 19 and an external driver are mounted.
An optical printer head is formed by connecting the circuit pattern 11 on the substrate 0 with the bonding wire 12.

FIG. 8 is a diagram showing an equivalent circuit of the light emitting element array 1a shown in FIG. Here, L1 to L128 are:
1 shows a light emitting element 3 composed of light emitting diodes arranged in a row. Among these light emitting elements L1 to L128, light emitting elements L1 to L64 are included in a first group, and light emitting elements L65 to L128 are included in a second group. In the present embodiment, the light emitting elements L1 to L1 belonging to the first group
L64 is sequentially driven from the light-emitting element L1 to the light-emitting element L64, and the light-emitting elements L65 to L128 belonging to the second group are from the light-emitting element L128 to the light-emitting element L65 in the opposite direction to the first group. Are sequentially driven.

Each of the light emitting elements L1 to TR128 is
The field effect transistor that forms the output transistor circuit 4 connected to L128 is shown. Among these field effect transistors TR1 to TR128, the first group includes the field effect transistors TR1 to TR64 (the first group forms the first output transistor circuit 4a), and the field effect transistors TR1 to TR64 form the first group. The transistors TR65 to TR128 form a second group (the second group forms the second output transistor circuit 4b). The field effect transistors TR1 to TR128 are N-channel transistors with a back gate in the present embodiment.

Further, BF1 to BF128 indicate buffers connected to the field effect transistors TR1 to TR128. These buffers BF1 to BF128
, The buffers BF1 to BF64 are a first group, and the buffers BF65 to BF28 are a second group.

FF1 to FF128 indicate flip-flops constituting the shift register circuit 5 for supplying a drive signal to the field effect transistors TR1 to TR128. These flip-flops FF1 to FF128
The first group includes flip-flops FF1 to FF64 (the first group forms the first shift register circuit 5a), and the second group includes flip-flops FF65 to FF128. (The second shift register circuit 5b is configured by the second group).

The flip-flops FF1 to FF64 belonging to the first group are sequentially set from the flip-flop FF1 to the flip-flop FF64, and the flip-flops FF6 belonging to the second group.
5 to FF128 are flip-flop FF128 to flip-flop F which are in the opposite direction to the first group.
It is configured to be set in order toward F65.

That is, among the flip-flops FF1 to FF64 belonging to the first group, the flip-flop FF1 is the first stage and the flip-flop FF64 is the last stage. Also, flips belonging to the second group
The flip-flops FF65 to FF128 have the flip-flop FF128 as the first stage, and the flip-flop FF65.
Is the final stage.

Here, the light emitting elements L1 to L64 belonging to the first group and the light emitting elements L belonging to the second group
Each of the cathodes 65-L128 is connected to a first common line CM1 connected to the ground (GND), and each anode is connected to a field effect transistor T belonging to the first group.
R1 to TR64 and the sources of the field effect transistors TR65 to TR128 belonging to the second group. Each drain of the field-effect transistors TR1 to TR64 belonging to the first group is connected to one of the second light-emitting element driving signal electrode pads 18 by the second light-emitting element driving signal.
And the drains of the field-effect transistors TR65 to TR128 belonging to the second group are connected to the electrode pads 19 for the second light emitting element drive signal.
Is connected to the other second common line CM2 ′.

The gates of the field effect transistors TR1 to TR64 belonging to the first group are connected to corresponding flip flops FF1 belonging to the first group via buffers BF1 to BF64 belonging to the first group.
FF64 to the Q-output terminals of the field-effect transistors TR65 to TR128 belonging to the second group.
Of the buffer BF6 belonging to the second group
5 through BF128 to the Q-output terminals of the flip-flops FF65 to FF128 belonging to the corresponding second group.

The φ input terminals of the flip-flops FF1 to FF64 belonging to the first group and the flip-flops FF65 to FF128 belonging to the second group are used for the block signal (BLK) via the protection circuit PC1 and the buffer BF129. Is connected to the common signal line CM3 connected to the electrode pad 17 of the first embodiment. First stage flip-flop FF1 belonging to the first group and first stage flip-flop F belonging to the second group
S-input terminal of F65, and flip-flops FF2 to FF64 of the second and subsequent stages belonging to the first group
And the second and subsequent flip-flops belonging to the second group
Each R-input terminal of the flops FF66 to FF128 is connected to a common signal line CM4 connected to the reset signal (RST) electrode pad 16 via the protection circuit PC2 and the Schmitt trigger circuit ST.

Here, the protection circuits PC1 and PC2 apply an excessive voltage due to noise from the external driver to each flip-flop.
This is for preventing application to the flops FF1 to FF128. However, when used in an environment where noise is not superimposed, these protection circuits PC1 and PC2 are not necessarily required.

The first-stage flip-flop FF1 belonging to the first group and the first-stage flip-flop FF128 belonging to the second group are set by a reset signal (RST), and the next block signal (BL) is set.
A D-type flip-flop with a set is set so that it is reset at the falling edge of K). The flip flops of the second and subsequent stages of each group are
It is a shape flip flop. Also, Do1 to Do12
Reference numeral 8 denotes a drive signal output from the Q-terminal of each of the flip-flops FF1 to FF128. Drive signals Do1 to Do1 output from the flip-flops FF2 to FF128
Do128 is a high-output field effect transistor TR1.
To drive the TR128, a two-stage buffer B
Field effect transistor TR via F1 to BF128
The buffers BF1 to BF128 can be omitted by incorporating a buffer circuit in the Q-output sections of the flip-flops FF1 to FF128, thereby providing light emission. The element array 1a can be reduced in size.

FIG. 9 is a diagram showing a signal sequence for explaining the operation of the light emitting element array 1a configured as a circuit as shown in FIG.

The flip-flops FF1 to FF64 belonging to the first group and the flip-flop FF6 belonging to the second group constituting the shift register circuit 5
Two signals, a reset signal and a block signal, are input to the 5-FF128 from the electrode pad 16 and the electrode pad 17, respectively. First, the first-stage flip-flop FF1 of the first group and the first-stage flip-flop FF128 of the second group are simultaneously set by the reset signal input from the electrode pad 16, and the block signal input from the electrode pad 17 is set. Is reset at the falling edge of. Simultaneously with this reset, the second-stage flip-flop FF of the first group
The flip-flops FF127 of the second stage of the second and second groups are set at the same time, and reset at the same time when the next block signal falls.

Similarly, the third and subsequent flip-flops FF3 to FF64 of the first group and the third and subsequent flip-flops FF126 to FF126 of the second group
Flip of the corresponding stage of each group of FF65
Each flop is set at the same time as resetting of the preceding flip-flop, and is simultaneously reset at the falling edge of the sequentially input block signal. Thus, the first
Flip-flops FF1 to FF6 belonging to the group
Flip-flop F belonging to the fourth and second groups
F126 to FF65 are sequentially set and reset in parallel, so that drive signals Do1 to Do are output from the respective Q- terminals.
64 and the drive signals Do128 to Do65 are sequentially output. That is, the flip-flop FF of each group
The drive signals Do1 to Do128 are output from the Q- terminal when the 1 to FF128 are set by the reset signal, and the output of the drive signals Do1 to Do128 is stopped when reset at the falling edge of the block signal.

As described above, the drive signals Do1 to Do64 and the drive signals Do128 to FF64 are output from the flip-flops FF1 to FF64 belonging to the first group and the flip-flops FF128 to FF65 belonging to the second group.
Do65 is sequentially output in parallel and the field-effect transistors TR1 to TR64 belonging to the first group and the field-effect transistors TR1 belonging to the second group
28 to TR65 are sequentially supplied in parallel to the gates, so that the field-effect transistors TR1 of each group are provided.
TR128 is a drive signal Do between the drain and the source.
It becomes conductive only for the supply period of 1 to Do128 and is turned on.

That is, the first shift register circuit 5a composed of the flip-flops FF1 to FF64 belonging to the first group is connected to the gate which is the control terminal of the field effect transistors TR1 to TR64 belonging to the first group. The first drive means for selectively (individually) conducting between the drain and the source of each of the field effect transistors TR1 to TR64 by sequentially supplying drive signals in the order of the arrangement of the light emitting elements L1 to L64. Constitute. The flip-flop FF1 belonging to the second group
The second shift register circuit 5b composed of 28 to FF65 has a gate which is a control terminal of the field effect transistors TR128 to TR65 belonging to the second group,
By supplying drive signals sequentially in the order of arrangement of the light emitting elements L128 to L65, each field effect transistor T
The second driving means for selectively (individually) conducting between the drain and the source of R128 to TR65 constitutes a field effect transistor TR1 belonging to the first group.
The first light emitting element drive signal (image data) is connected from the electrode pad 18 via one second common line CM2 to the field effect transistor in the on state in synchronization with the on state of the TR 64. Light emitting elements L1 to L64
And the other second common line CM2 from the electrode pad 19 in synchronization with the ON state of the field effect transistors TR128 to TR65 belonging to the second group.
', The second light emitting element drive signal (image data)
The light is supplied to the light-emitting elements L128 to L65 connected to the field-effect transistor in the on state, whereby the light-emitting elements L1 to L64 belonging to the first group and the light-emitting elements L128 to L65 belonging to the second group are turned on. Driven in parallel. That is, image data serially supplied from the external driver via the electrode pads 18 and 19 is converted into parallel image data, and the image data is distributed to the light emitting elements L1 to L128. Is controlled.

Note that the CLK signal shown in FIG.
A clock signal generated inside an external driver or the like for synchronizing the entire operation.

As described above, the ON / OFF of each field effect transistor of the first and second output transistor circuits 4a and 4b is parallelized for each group by the drive signals from the first and second shift register circuits 5a and 5b. By sequentially changing the current value and the like flowing through the two second common lines CM2 and CM2 'on the anode side in accordance with the serial data input from the electrode pads 18 and 19, a plurality of light emission is performed. The elements 3 (L1 to L128) are selectively (individually) emitted and driven one by one for each group.

That is, when the light emitting elements 3 emit light, the current level (high level) flowing through each light emitting element 3 can be adjusted,
The amount of light of the light emitting elements 3 is individually adjusted by adjusting the energizing time by a constant value current flowing through each light emitting element 3, which is necessary for correcting the light emitting variations of the light emitting elements 3 and improving the quality of printing. Gray scale control is performed. As a result, from each of the light-emitting elements 3, a light-emitting output whose light-emitting output is corrected according to the variation and a light-emitting output whose gradation is controlled in accordance with the image data are obtained.

In the present embodiment, the correction of the variation in the light emission of the light emitting elements 3 and the gradation control are performed by adjusting the value of the current flowing through the light emitting elements 3 and the energizing time. Even if the amount of current (current value × time) is adjusted, or the voltage level applied to the light emitting element 3 or the voltage application time is adjusted, it is possible to perform the correction of the light emission variation of the light emitting element 3 and the gradation control. it can.

In this embodiment, an N-channel field effect transistor is used as the field effect transistor constituting the output transistor circuit 4. However, a P-channel transistor may be used. In this case, the anode of the light emitting element 3 may be connected to the first common line CM1, and the cathode may be connected to the two second common lines CM2 and CM2 'via a field effect transistor. Furthermore, in this case, the two second common lines CM2, CM
The voltage of 2 'is set to the low level. In the present embodiment, the field effect transistor is connected to the anode of the light emitting element 3 and the second and third common lines CM2 and CM.
2 ', it may be connected between the cathode of the light emitting element 3 and the first common line CM1. In this case, the common line connected to the ground is called a second common line CM2, and the electrode pad 1
The two common lines connected to 8 and 19 are called first common lines CM1 and CM1 '.

FIG. 10 shows an optical printer head 2 in which a plurality of light emitting element arrays 1a according to the second embodiment of the present invention are mounted on a circuit board 10 on which an external driver 27 is mounted.
It is a block diagram which shows the structure of 4a. As described above, each light emitting element of each light emitting element array 1a emits light according to serial data (light emitting element drive signal) supplied from the external driver 27 having a function of correcting a variation in light emitting intensity and a function of controlling a gradation. Controlled. The driver circuit 9 (FIG. 6) for switching each light emitting element is driven in synchronization with a reset signal or a block signal from the external driver 27.

The external driver 27 has the same configuration as the external driver 25 in the first embodiment. Each output terminal is connected to the electrode pads 14 to 19 shown in FIG. 8, and is shown in FIG. Driver circuit power with timing,
A reset signal, a block signal, a light emitting element drive signal, and the like are output and supplied to each of the electrode pads 14 to 19. Here, as for the light emitting element drive signal supplied to each light emitting element 3, a correction value is stored in a memory such as a control circuit provided in the preceding stage in correspondence with the variation of the light emitting intensity of each light emitting element 3, The correction value is supplied to each light emitting element 3 based on the stored correction value.

The optical printer head 2 configured as described above
4a, the number of bonding wires per one (one chip) of the light emitting element array 1a is 6, which is smaller than that of the conventional light emitting element array having 128 light emitting elements. The number of bonding wires used for connection can be reduced to about 1/20.
Thus, the mounting cost can be significantly reduced, and the cost and reliability of the optical printer head 24a can be reduced.

Further, the number of electrode pads requiring an occupied area larger than that of the circuit pattern 11 can be reduced to about 1/20 as in the above. As a result, the length of the circuit board 10 in the short direction can be significantly reduced, and not only the cost of the optical printer head 24a can be reduced, but also the size of the optical printer head 24a can be reduced.

FIG. 11 is a diagram showing the relationship between the lighting direction of the light emitting elements 3 provided on the light emitting element array 1a and the printing direction. Light emitting element array 1 as shown in FIG.
If the lighting direction of the light emitting element 3 provided in the area a is one direction, if the printing operation is performed at high speed, the printing deviation between the divided groups becomes large, so that only low speed printing can be performed.

On the other hand, as shown in FIG. 11B, for example, when the lighting directions of the two groups of light emitting elements 3 are opposed to each other (that is, as in this embodiment, the light emitting elements of the two groups are set in the opposite directions to each other). Is driven).
Since there is no printing deviation between the divided groups, high-speed printing is possible.

Further, as in the case of FIG. 11B, for example, the lighting directions of the light emitting elements 3 of two groups are opposed to each other so that the printing direction is horizontal as shown in FIG. If the two groups of light emitting elements 3 are arranged obliquely with respect to the main scanning direction, higher-speed printing can be realized. Therefore, in the light emitting element array 1a of the second embodiment, for example, two groups of light emitting elements 3 can be arranged obliquely with respect to the main scanning direction.

In short, as shown in FIG. 11 (b) or (c), in order to prevent the printing displacement, the printing heads are provided at symmetrical positions on the right and left sides with the center between the adjacent groups as the center. It is important to drive the light emitting elements of each group simultaneously.

As described above, the light emitting element array 1a according to the second embodiment of the present invention and the optical printer head 24a formed by using the light emitting element array 1a are arranged in a line. One end of the element 3 is connected to a first common line C
M1 and the other end to the second common line CM
2, since the light emitting element 3 is selectively driven by being connected to the CM 2 'via a switching element,
The level of the current flowing through each light emitting element 3 and the current supply time can be individually adjusted, and the voltage level applied to each light emitting element 3 and the holding time of the applied voltage can be individually adjusted. And the gradation control can be easily performed. Further, the plurality of light emitting elements 3 arranged in a row are divided into two groups, and the light emitting elements 3 of each group are driven in parallel, so that the speed of the optical printer head can be increased. it can.

Further, the area occupied by the driver circuit and the electrode pads, the number of bonding pads, and the number of external drivers are each reduced, so that the manufacturing cost and size of the optical printer head can be reduced, and the mounting time thereof can be significantly reduced. Thus, the work of assembling the optical printer head can be simplified. By providing a distance of 200 μm or more between the electrode pads 14 to 19 of the light emitting element array and the light emitting element 3, light from the light emitting element is reflected by the bonding wires 12 and the like near the electrode pads 14 to 19. This can be effectively prevented, and the reliability of the optical printer head can be improved.

FIG. 12 is a sectional view of a main part of an optical printer head formed by using a light emitting element array according to the third embodiment of the present invention. FIG. 13 shows an example of a circuit configuration of the light emitting element array 1b. FIG. In these figures,
The same components as those according to the second embodiment shown in FIGS. 6 and 7 (or the first embodiment shown in FIGS. 1 and 2) are denoted by the same reference numerals, and are described in detail. The description will be omitted, and the differences will be mainly described below.

That is, the light emitting element array 1b according to the third embodiment is different from the light emitting element array 1a according to the second embodiment in that the drive signals of the shift register circuits 5 of each group are divided into M driving signals in each group. (M is a natural number of 2 or more) is commonly supplied to the output transistor circuits 4, and the M output transistor circuits 4 are connected to different drive signal lines.

That is, the light-emitting element array 1b according to the third embodiment includes a plurality of light-emitting elements 3 each composed of light-emitting diodes arranged in a line (in a row) on a silicon substrate 2; A plurality of output transistor circuits 4 including field-effect transistors provided to control current supply to the semiconductor device, a shift register circuit 5 for controlling on / off of each output transistor circuit 4, electrode pads 14 to 21, and the like are formed. , The output transistor circuit 4 and the driver circuit 9 including the shift register circuit 5 are divided into N (N is a natural number of 2 or more) groups operating in parallel with each other, and the shift register circuit 5 of each group is divided into N groups. The drive signal is commonly supplied to M (M is a natural number of 2 or more) output transistor circuits 4 in each group, and these M output transistors are provided. Star circuit 4 is obtained so as to be connected to different drive signal lines. As a result,
The plurality of light emitting elements 3 are also divided into N groups corresponding to the divided driver circuits 9, and the light emitting elements 3 connected to the M output transistor circuits 4 in each group can be driven simultaneously. You.

More specifically, in the present embodiment, the output transistor circuit 4 and the shift register circuit 5 constituting the driver circuit 9 are composed of the first and second output transistor circuits 4a and 4b, as in the second embodiment. And two groups of first and second shift register circuits 5a and 5b (that is, N = 2), and the shift register circuit 5 is connected to a common signal line for both groups. The divided driver circuits 9 are driven in parallel with each other for each group (that is, driven in groups at the same time). In addition, the first
Two second output transistor circuits 4a and 4b are simultaneously driven in each group (that is, M = 2). Thus, the driver circuit 9
Are driven in parallel for each group, so that the light-emitting elements 3 that are divided corresponding to the divided driver circuits 9 are also driven in parallel for each group, and that two light-emitting elements are simultaneously driven. become.

The number of electrode pads 14 to 21 can be reduced to eight as in this embodiment. in this case,
Electrode pad 14 is for ground (GND), electrode pad 1
5 is for a driver circuit power supply (VDD), the electrode pad 16 is for a reset signal (RST), the electrode pad 17 is for a block signal (BLK), the electrode pad 18 is for a first light emitting element drive signal (VDD11), the electrode pad Reference numeral 19 denotes a second light emitting element drive signal (VDD12), and the electrode pad 20 denotes a third light emitting element drive signal (VDD12).
Pad 21 for light emitting element drive signal (VDD21)
Are for the fourth light emitting element drive signal (VDD22).
That is, the electrode pads 14 to 21 function as terminals for receiving the supply of the above seven types of signals from the external driver.

The light emitting element 3 and the electrode pads 14 to 21
Is set to 200 in the same manner as in the first and second embodiments.
When the thickness is set to μm or more, the reflected light of the light emitting element 3 by the bonding wire 12 connected to the electrode pads 14 to 21 can be reduced, and the printing quality can be improved.

The light emitting element array 1b thus configured
Is a circuit board 1 on which a plurality thereof are mounted on a circuit board 10 and each of the electrode pads 14 to 21 and an external driver are mounted.
An optical printer head is formed by connecting the circuit pattern 11 on the substrate 0 with the bonding wire 12.

FIG. 14 shows the light emitting element array 1 shown in FIG.
It is a figure showing the equivalent circuit of b. Here, the light emitting elements L1 to L1
L64 is the first group, and the light emitting elements L65 to L12
The light-emitting elements L1 to L64 and L65 to L128 in each group are sequentially driven in units of two adjacent to each other.

The field effect transistors TR1 to TR
The first group up to R64 is the first group, and the second group is the field-effect transistors TR65 to TR128. The field-effect transistors TR1 to TR64,
Each of the TRs 65 to 128 is driven sequentially in units of two adjacent to each other.

The flip-flops FF1 to FF3
Up to 3 are the first group and flip flop F
F34 to FF66 are a second group. First
The flip-flops FF1 to FF33 of the group
Flip flop FF1 to flip flop FF
The flip flops FF34 to FF66 of the second group are also set in order from the flip flop FF34 to the flip flop FF66.

Here, the light emitting elements L1 to L1 of the first group
L64 and the second group of light emitting elements L65 to L12
8 are connected to the ground (GND).
Are connected to the common line CM1, and the respective anodes are connected to the first group of field effect transistors TR1 to TR64 and the second group of field effect transistors TR65 to TR65.
It is connected to each source of TR128.

Of the field-effect transistors TR1 to TR64 of the first group, the drains of the odd-numbered field-effect transistors have a second common line connected to the first light-emitting element drive signal electrode pad 18. CM2
And the drains of the even-numbered field-effect transistors are connected to a third common line CM3 connected to the third light emitting element drive signal electrode pad 19.

Further, among the field effect transistors TR65 to TR128 belonging to the second group, the drains of the odd-numbered field effect transistors are connected to the fourth light emitting element drive signal electrode pad 20 connected to the fourth electrode pad 20. And the drains of the even-numbered field-effect transistors are connected to the fifth light-emitting element drive signal electrode pad 21 through the fifth common line C4.
Connected to M5.

The gates of the field-effect transistors TR1 to TR64 of the first group are connected to each other via the buffers BF1 to BF32 of the first group in units of two field-effect transistors adjacent to each other. And the gates of the field-effect transistors TR65 to TR128 belonging to the second group are connected to the Q-output terminals of the flip-flops FF2 to FF33 of the second group in a unit of two adjacent field-effect transistors. Corresponding to the second group of flip-flops FF34 to FF6 via the buffers BF33 to BF64 of the second group.
6 is connected to the Q-output terminal.

Flip-flop FF of the first group
1 to FF33 and the φ input terminals of the flip-flops FF34 to FF66 of the second group are connected to the protection circuit PC
1 and the block signal (BL) via the buffer BF65.
K) to the sixth common line CM6 connected to the electrode pad 17. S-input terminals of the first-stage flip-flop FF1 of the first group and the first-stage flip-flop FF34 of the second group, and
Flip flop FF of the second and subsequent stages of the first group
The R-input terminals of the flip-flops FF35 to FF66 of the second and subsequent stages of the second group are connected to the reset signal (RST) electrode pad 16 via the protection circuit PC2 and the Schmitt trigger circuit ST. It is connected to the connected seventh common line CM7.

The flip-flops in the first stage of the first group
The FF FF1 and the flip-flop FF34 of the first stage of the second group are set by the reset signal (RST) and reset by the falling edge of the next block signal (BLK).
It is a flop. The flip-flops in the second and subsequent stages of each group are D-type flip-flops with reset.

FIG. 15 is a diagram showing a signal sequence for explaining the operation of the light emitting element array 1b configured as a circuit as shown in FIG.

First, the first-stage flip-flop FF1 of the first group and the first-stage flip-flop FF34 of the second group forming the shift register circuit 5 are formed.
Are simultaneously set by a reset signal input from the electrode pad 16, and reset simultaneously at the falling edge of the block signal input from the electrode pad 17. Simultaneously with this reset, the second-stage flip-flop FF2 of the first group and the second-stage flip-flop FF35 of the second group are simultaneously set, and are simultaneously reset at the falling edge of the next block signal.

Similarly, the flip-flops FF3 to FF33 in the third and subsequent stages of the first group and the flip-flops FF36 to FF in the third and subsequent stages of the second group are similarly provided.
The flip-flop of the corresponding stage of each group in F66 is set at the same time as the reset of the flip-flop of the preceding stage, and is simultaneously reset at the falling edge of the sequentially input block signal. Thus, the first group of flip-flops FF1 to FF33 and the second group of flip-flops FF34 to FF6
6 are sequentially set and reset in parallel, so that the drive signals Do1 to Do32 are output from the Q-terminals of the second and subsequent stages.
And drive signals Do33 to Do64 are sequentially output.
That is, flip flops FF2 to F
F33 and FF35 to FF66 receive drive signals Do1 to Do3 from the Q- terminal when set by the reset signal.
2, Do33 to Do64 are output, and when reset at the falling edge of the block signal, the drive signals Do1 to Do3 are output.
The outputs of Do32, Do33 to Do64 are stopped.

As described above, the flip-flops of the first group
The driving signals Do1 are supplied from the flops FF1 to FF33 and the flip-flops FF34 to FF66 of the second group.
To Do32 and the drive signals Do33 to Do64 are sequentially output in parallel, and two adjacent field-effect transistors of the first group of field-effect transistors TR1 to TR64 and the second group of field-effect transistors Are sequentially supplied in parallel to the gates of two adjacent field-effect transistors of the type transistors TR65 to TR128, so that the field-effect transistors TR1 to TR128 of each group are connected to the gates of the two field-effect transistors. The drive signal Do1 to
Only the supply periods of Do32 and Do33 to Do64 are simultaneously conducted and turned on.

That is, the first shift register circuit 5a composed of the first group of flip-flops FF1 to FF33 is provided with two field effect transistors TR1 to TR64 of the first group. Drive means for selectively supplying conduction between the drain and source of each of the two field effect transistors by sequentially supplying drive signals to the gates of the type transistors in the order of arrangement of the respective light emitting elements L1 to L64 Is configured. Further, the second shift register circuit 5b composed of the flip-flops FF34 to FF66 of the second group is connected to the field effect transistors TR65 to TR128 of the second group.
The drive signals are sequentially supplied to the gates of the two field-effect transistors in the order of the arrangement of the light-emitting elements L65 to L128, thereby selecting between the drain and source of each of the two field-effect transistors. While the second driving means for electrically conducting the electrode pad 1 is synchronized with the ON state of each of the two field effect transistors among the field effect transistors TR1 to TR64 of the first group.
8 and 19, the first and second light emitting element drive signals (image data) are supplied to the corresponding two light emitting elements among the light emitting elements L1 to L65 of the first group, and the second group. Field-effect transistors TR65-TR12
8, the third and fourth light emitting element drive signals (image data) are transmitted from the electrode pads 20 and 21 in synchronization with the on state of each of the two field effect transistors of the second group. L128 are supplied to the corresponding two light emitting elements, thereby forming the light emitting elements L1 of the first group.
To L64, and two light emitting elements of the second group of light emitting elements L65 to L128 are driven in parallel. That is, the image data serially supplied from the external driver via the electrode pads 18, 19, 20, 21 is converted into parallel image data, and the image data is distributed to the light emitting elements L1 to L128. The light emission output of L128 is controlled.

As described above, the on / off states of the two field effect transistors of each of the first and second output transistor circuits 4a and 4b are turned on / off by the drive signals from the first and second shift register circuits 5a and 5b. By changing the current values flowing through the four common lines CM2 to CM5 on the anode side in accordance with the serial data input from the electrode pads 18, 19, 20, 21 while sequentially switching in parallel for each group, A plurality of light emitting elements 3 (L1 to L
128) are selectively (individually) emitted and driven two by two for each group.

That is, when the light emitting elements 3 emit light, the current level (high level) flowing through each light emitting element 3 can be adjusted,
The amount of light of the light emitting elements 3 is individually adjusted by adjusting the energizing time by a constant value current flowing through each light emitting element 3, which is necessary for correcting the light emitting variations of the light emitting elements 3 and improving the quality of printing. Gray scale control is performed. As a result, from each of the light-emitting elements 3, a light-emitting output whose light-emitting output is corrected according to the variation and a light-emitting output whose gradation is controlled in accordance with the image data are obtained. At this time, since two light emitting elements 3 in each group emit light in parallel, the speed of the optical printer head can be further increased.

Further, since a plurality of output transistor circuits are controlled to be turned on / off by a drive signal by one flip-flop in the shift register circuit 5, the number of the light-emitting elements 3 can be reduced. Therefore, the drive circuit can be downsized, and the chip can be downsized.
Further, the cost of the chip can be reduced.

In the present embodiment, the correction of the variation in the light emission of the light emitting elements 3 and the gradation control are performed by adjusting the value of the current flowing through the light emitting elements 3 and the energizing time. Even if the amount of current (current value × time) is adjusted, or the voltage level applied to the light emitting element 3 or the voltage application time is adjusted, it is possible to perform the correction of the light emission variation of the light emitting element 3 and the gradation control. it can.

FIG. 16 shows an optical printer head 2 in which a plurality of light emitting element arrays 1b according to the third embodiment of the present invention are mounted on a circuit board 10 on which an external driver 29 is mounted.
It is a block diagram which shows the structure of 4b. As described above, each light emitting element of each light emitting element array 1b emits light according to serial data (light emitting element drive signal) supplied from an external driver 29 having a function of correcting a variation in light emission intensity and a function of gradation control. Controlled. The driver circuit 9 (FIG. 12) for switching each light emitting element is driven in synchronization with a reset signal or a block signal from the external driver 29.

The external driver 29 has the same configuration as the external driver 25 in the first embodiment, and each output terminal is connected to the electrode pads 14 to 21 shown in FIG.
And a driver circuit power supply, a reset signal, a block signal, a light emitting element drive signal, and the like are output at the timing shown in FIG. 10 and supplied to the electrode pads 14 to 21.
Here, as for the light emitting element drive signal supplied to each light emitting element 3, a correction value is stored in a memory such as a control circuit provided in the preceding stage in correspondence with the variation of the light emitting intensity of each light emitting element 3, The correction value is supplied to each light emitting element 3 based on the stored correction value.

The optical printer head 2 configured as described above
4b, the number of bonding wires per one (1 chip) of the light emitting element array 1b is 8, which is smaller than that of the conventional light emitting element array having 128 light emitting elements. The number of the bonding wires 12 used for the connection can be reduced to about 1/15. Thus, the mounting cost can be significantly reduced, and the cost and reliability of the optical printer head 24b can be reduced.

Also, the number of electrode pads requiring an occupied area larger than that of the circuit pattern 11 can be reduced to about one fifteenth as in the case described above. Accordingly, the length of the circuit board 10 in the short direction can be significantly reduced, and not only the cost of the optical printer head 24b can be reduced, but also the size of the optical printer head 24b can be reduced.

In the optical printer head 24b, similarly to the optical printer head 24a according to the second embodiment, when the lighting directions of the light emitting elements 3 are opposed to each other as shown in FIG. Since printing displacement does not occur, high-speed printing is possible, and if the light emitting elements 3 are arranged obliquely with respect to the main scanning direction so that the printing direction is horizontal as shown in FIG. Further high-speed printing can be realized.

As described above, the light emitting element array 1b according to the third embodiment of the present invention and the optical printer head 24b constituted by using the light emitting element array 1b are arranged in a line. One end is connected to a common line connected to the ground, and the other end is connected to a common line to which a light emitting element drive signal is supplied via a switching element,
Since the light emitting elements 3 are selectively driven, the current level flowing through each light emitting element 3 and the energizing time are individually adjusted, and the voltage level applied to each light emitting element 3 and the time for which the applied voltage is held are maintained. Can be individually adjusted, whereby the variation of the light emission intensity of the light emitting element 3 and the gradation control can be easily performed. Further, the plurality of light emitting elements 3 arranged in a row are divided into two groups,
Since the light emitting elements 3 in each group are driven in parallel while the two light emitting elements 3 in each group are driven at the same time, the speed of the optical printer head can be further increased.

Further, the area occupied by the driver circuit and the electrode pads, the number of bonding wires, and the number of external drivers are reduced, so that the manufacturing cost and the size of the optical printer head can be reduced, and the mounting time thereof can be significantly reduced. Thus, the work of assembling the optical printer head can be simplified. In addition, by providing an interval of 200 μm or more between the electrode pads 14 to 21 of the light emitting element array and the light emitting element 3, light from the light emitting element is reflected by the bonding wires 12 and the like near the electrode pads 14 to 21. This can be effectively prevented, and the reliability of the optical printer head can be improved.

[0162]

As described above, the light emitting element array according to the present invention is provided with a plurality of light emitting elements arranged in a row and connected in series to each light emitting element to supply a light emitting signal to each light emitting element. A switching element with a control terminal, and conduction drive means for individually conducting each switching element by individually supplying a conduction drive signal to the control terminal of each switching element. Things.

According to this, when the switching element is turned on, a light emitting signal whose signal level is changed corresponding to each light emitting element is supplied to the light emitting element connected to the switching element. In addition, while it is possible to easily correct the variation in the light emission intensity of each light emitting element, it is possible to easily perform the gradation control necessary for improving the quality of the print. Further, since the entire circuit configuration is simplified as compared with the conventional one, the size of the light emitting element array can be reduced and the manufacturing cost can be reduced. The switching element may be composed of a transistor, or the conduction driving means may be composed of a shift register having a plurality of flip-flops.

Further, in the light emitting element array of the present invention, the light emitting element, the switching element, and the conduction driving means are integrally formed on a semiconductor substrate, so that miniaturization and mass production can be easily achieved. .

Further, in the light emitting element array of the present invention, the conduction driving means of each drive group may be such that the switching elements of each corresponding drive group are simultaneously conducted in a plurality of units. According to this, since the light emitting elements of each drive group can be driven simultaneously in a plurality of units, the speed of the optical printer head can be further increased.

In the light emitting element array according to the present invention, an electrode pad to which one of the light emitting elements is commonly connected and the other of the light emitting elements are commonly connected to the semiconductor substrate. An electrode pad to which each first input terminal of the flip-flop is connected in common; an electrode pad to which each second input terminal of the flip-flop is connected in common; An electrode pad to which each drive power supply terminal of the flop is commonly connected may be formed.

According to this, since the number of electrode pads can be effectively reduced, downsizing of the light emitting element array is promoted. In addition, since the number of electrode pads is reduced, the number of bonding wires to the electrode pads can be reduced. As a result, the mounting cost can be reduced, and the reliability of the optical printer head can be improved.

In the light-emitting element array of the present invention, the semiconductor substrate has a rectangular shape, and the plurality of light-emitting elements are arranged along one long side, and the semiconductor substrate is arranged along the other long side. A plurality of electrode pads may be provided. According to this, the length of the circuit board for constituting the optical printer head in the short direction can be reduced, and the optical printer head can be reduced in size.

The light-emitting element array of the present invention is arranged in a row, and is connected in series to a plurality of light-emitting elements divided into a plurality of drive groups and each light-emitting element of each drive group.
A switching element having a control terminal for supplying a light-emitting signal to each light-emitting element, divided into a plurality of drive groups corresponding to the drive groups of the light-emitting elements, and a drive group connected to a control terminal of the switching element of each drive group. A plurality of driving groups corresponding to the driving groups of the light emitting elements, wherein the switching elements of each driving group are individually turned on at the same timing for each driving group by individually supplying a conduction driving signal at the same timing every time. And a conduction driving means, which is divided into two groups, on a semiconductor substrate.

According to this, when the switching element of each drive group is turned on, a drive signal having a changed signal level corresponding to each light emitting element is supplied to the light emitting element connected to the switching element. By doing
Variations in light emission intensity of each light emitting element can be easily corrected, while gradation control required for high quality printing can be easily performed. Further, since the entire circuit configuration is simplified as compared with the conventional one, the size of the light emitting element array can be reduced and the manufacturing cost can be reduced. further,
Since the light emitting elements of each drive group are driven in parallel at the same timing for each drive group,
As a result, the speed of the driving of the light emitting element can be increased, so that the printing operation of the optical printer head using the light emitting element array can be speeded up.

The switching element may be composed of a transistor, or the conduction driving means may be composed of a shift register having a plurality of flip-flops. Further, the light emitting element, the switching element, and the conduction driving unit may be integrally formed on a semiconductor substrate.

Further, in the light emitting element array of the present invention, on the semiconductor substrate, one electrode of each of the light emitting elements of each of the driving groups is commonly connected, and the other of the light emitting elements of each of the driving groups is connected. An electrode pad whose pole is connected in common for each drive group, an electrode pad to which each first input terminal of the flip-flop is connected in common, and a second input terminal of the flip-flop are connected to each other. An electrode pad commonly connected and an electrode pad commonly connected to each drive power supply terminal of the flip-flop may be formed.

According to this, since the number of electrode pads can be effectively reduced, downsizing of the light emitting element array is promoted. In addition, since the number of electrode pads is reduced, the number of bonding wires to the electrode pads can be reduced. As a result, the mounting cost can be reduced, and the reliability of the optical printer head can be improved.
Note that the semiconductor substrate may have a rectangular shape, the plurality of light emitting elements may be provided along one long side, and the plurality of electrode pads may be provided along the other long side. Good.

The optical printer head according to the present invention has a plurality of light emitting elements arranged in a row, a switching element with a control terminal connected in series to each light emitting element, and a control terminal of each switching element. A light-emitting element array including a conduction driving means for individually conducting each switching element by supplying a conduction driving signal to the light emitting element array; and supplying a conduction driving signal to the conduction driving means to drive the conduction driving means. When the switching elements are individually turned on, light emission control means for supplying a light emission signal to the light emitting elements connected to the switching elements and individually driving the light emitting elements.

According to this, when the switching element is turned on, a light emitting signal whose signal level is changed corresponding to each light emitting element is supplied to the light emitting element connected to the switching element. In addition, while it is possible to easily correct the variation in the light emission intensity of each light emitting element, it is possible to easily perform the gradation control necessary for improving the quality of the print. Further, since the size of the light emitting element array and the manufacturing cost can be reduced, the size and cost of the optical printer head can be reduced.

Further, in the optical printer head of the present invention, the light emission control means changes the signal level of the light emission signal supplied to the light emitting element in accordance with each light emitting element, thereby individually controlling the light amount of the light emitting element. It may be adjusted.

According to this, by changing the signal level of the light-emitting signal supplied to the light-emitting element in accordance with each light-emitting element, it is possible to easily correct the variation in the light-emitting intensity of the light-emitting element and to change the gradation. Control can be easily performed. Note that the signal level of the light-emitting signal may be represented by a current level flowing through the light-emitting element, a current supply time to the light-emitting element, or a current amount flowing through the light-emitting element.

In the optical printer head according to the present invention, the light emitting element array is formed using a semiconductor substrate, and the plurality of light emitting element arrays and the light emission control means are mounted on a circuit board. May be. According to this, the size of the light emitting element array can be reduced, so that the size of the optical printer head can be reduced.

Also, the optical printer head of the present invention is arranged in a row, a plurality of light-emitting elements divided into a plurality of drive groups, connected in series to each light-emitting element, and corresponds to the drive group of the light-emitting elements. Switching elements with a control terminal for supplying a light-emitting signal to each light-emitting element, divided into a plurality of driving groups, and individually driving the control terminals of the switching elements of each driving group at the same timing for each driving group A light emitting device including conduction driving means divided into a plurality of driving groups corresponding to the driving groups of the light emitting elements, wherein the switching elements of each driving group are individually made conductive at the same timing for each driving group by supplying a signal. Conduction to the element array and the conduction driving means divided into the plurality of driving groups at the same timing for each driving group A driving signal is supplied to drive the conduction driving means at the same timing for each driving group, and the switching elements divided into the plurality of driving groups are individually conducted at the same timing for each driving group. And a light emission control means for supplying a light emission signal to a light emitting element of each drive group to which the switching element is connected and individually driving the light emitting element.

According to this, when the switching element of each drive group is turned on, a light emitting signal having a changed signal level corresponding to each light emitting element is supplied to the light emitting element connected to the switching element. By doing
Variations in light emission intensity of each light emitting element can be easily corrected, while gradation control required for high quality printing can be easily performed. Further, since the size of the light emitting element array and the manufacturing cost can be reduced, the size and cost of the optical printer head can be reduced. Further, since the light emitting elements of each driving group are driven in parallel at the same timing for each driving group, the printing operation of the optical printer head can be speeded up.

Further, in the optical printer head of the present invention, the light emission control means changes the signal level of the light emission signal supplied to the light emitting elements of each of the drive groups in accordance with each light emitting element to thereby control the light emitting elements. The amount of light may be individually adjusted.

According to this, by changing the signal level of the light-emitting signal supplied to the light-emitting element in accordance with each light-emitting element, it is possible to easily correct the variation in the light-emitting intensity of the light-emitting element and to change the gradation. Control can be easily performed. Note that the signal level of the light-emitting signal may be represented by a value of a current flowing through the light-emitting element, a duration of current supply to the light-emitting element, or a current amount flowing through the light-emitting element.

Further, in the optical printer head of the present invention, the light emission control means simultaneously drives the light emitting elements of the light emitting elements of each of the driving groups at symmetrical positions around the boundary between the adjacent driving groups. It may be something. According to this, printing displacement between the drive groups does not occur, so that high-speed printing can be realized.

Further, in the optical printer head of the present invention, the conduction driving means of each of the driving groups may be such that the switching elements of each of the corresponding driving groups are simultaneously rendered conductive in a plurality of units. The control means may be configured to supply a light-emitting signal to each light-emitting element connected to the switching element when the switching element of each drive group is turned on in a plurality of units, and to simultaneously drive the light-emitting elements. . According to this, since the light emitting elements of each drive group are simultaneously driven in a plurality of units, the speed of the optical printer head can be further increased.

[Brief description of the drawings]

FIG. 1 is a sectional view of an optical printer head according to a first embodiment of the present invention.

FIG. 2 is a plan view of a light emitting element array used in the optical printer head shown in FIG.

FIG. 3 is an equivalent circuit diagram of the optical printer head shown in FIG.

FIG. 4 is a diagram showing a signal sequence for explaining the operation of the optical printer head shown in FIG.

FIG. 5 is a plan view showing a circuit configuration of the optical printer head shown in FIG.

FIG. 6 is a sectional view of an optical printer head according to a second embodiment of the present invention.

FIG. 7 is a plan view of a light emitting element array used in the optical printer head shown in FIG.

8 is an equivalent circuit diagram of the optical printer head shown in FIG.

9 is a diagram showing a signal sequence for explaining the operation of the optical printer head shown in FIG.

FIG. 10 is a plan view showing a circuit configuration of the optical printer head shown in FIG.

FIG. 11 is a schematic diagram for explaining a relationship between a lighting direction of a light emitting element and a printing direction.

FIG. 12 is a sectional view of an optical printer head according to a third embodiment of the present invention.

13 is a plan view of a light emitting element array used in the optical printer head shown in FIG.

FIG. 14 is an equivalent circuit diagram of the optical printer head shown in FIG.

FIG. 15 is a diagram showing a signal sequence for explaining the operation of the optical printer head shown in FIG.

FIG. 16 is a plan view showing a circuit configuration of the optical printer head shown in FIG.

FIG. 17 is a plan view of a light emitting element array according to a first conventional example.

18 is a perspective view showing a first conventional optical printer head formed using the light emitting element array shown in FIG.

FIG. 19 is a perspective view showing a second conventional optical printer head.

FIG. 20 is a plan view of a light emitting element array according to a second conventional example.

FIG. 21 is a sectional view of a light emitting element array according to a third conventional example.

FIG. 22 is an equivalent circuit diagram of the light emitting element array shown in FIG.

FIG. 23 is a perspective view of a third conventional optical printer head formed using the light emitting element array shown in FIG. 21;

FIG. 24 is a block diagram of a 4-bit correction driver circuit.

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2C162 AF23 AF59 AF70 AF72 AH75 AH83 FA04 FA17 FA23 5F041 AA42 AA47 BB03 CB33 DA01 DA07 DA19 DA31 FF13

Claims (14)

[Claims] 1. A plurality of light emitting elements arranged in a row, a switching element connected in series to each light emitting element and having a control terminal for supplying a light emitting signal to each light emitting element, and a plurality of flip-flops And a conduction driving means for individually conducting each switching element by individually supplying a driving signal to a control terminal of each switching element. Characteristic light emitting element array. 2. A plurality of light emitting elements arranged in a row and divided into a plurality of driving groups, and a plurality of driving elements connected in series to each light emitting element of each driving group and corresponding to the driving group of the light emitting elements. A switching element with a control terminal for supplying a light-emitting signal to each light-emitting element, divided into groups, and a drive signal individually supplied to the control terminals of the switching elements of each drive group at the same timing for each drive group. Conducting driving means divided into a plurality of driving groups corresponding to the driving groups of the light emitting elements, whereby the switching elements of each driving group are individually turned on at the same timing for each driving group. A light-emitting element array provided for: 3. The light emitting element array according to claim 2, wherein the conduction driving means of each of the driving groups is configured to simultaneously conduct the switching elements of each of the corresponding driving groups in a plurality of units. 4. A plurality of light emitting elements arranged in a row, a switching element connected in series to each light emitting element and having a control terminal for supplying a light emitting signal to each light emitting element, and a control terminal of each switching element. A light-emitting element array including a conduction driving unit for individually conducting each switching element by individually supplying a conduction driving signal to the conduction driving unit; and supplying a driving signal to the conduction driving unit to drive the conduction driving unit. A light emission control unit that supplies a light emission signal to a light emitting element to which the switching element is connected and individually drives the light emitting element when the switching element is individually turned on. And an optical printer head. 5. The light-emitting device according to claim 1, wherein the light-emitting control means individually adjusts the light amount of the light-emitting elements by changing a signal level of a light-emitting signal supplied to the light-emitting elements in accordance with each light-emitting element. Item 6. The optical printer head according to item 4. 6. The signal level of the light-emitting signal is represented by a value of a current flowing through the light-emitting element, a duration of current supply to the light-emitting element, or an amount of current flowing through the light-emitting element. The optical printer head as described. 7. The light-emitting element array is configured using a semiconductor substrate, and the plurality of light-emitting element arrays;
5. The optical printer head according to claim 4, wherein said light emission control means is mounted on a circuit board. 8. A plurality of light-emitting elements arranged in a row and divided into a plurality of drive groups, connected in series to each light-emitting element,
A switching element having a control terminal for supplying a light-emitting signal to each light-emitting element, divided into a plurality of drive groups corresponding to the drive group of the light-emitting element, and a drive group connected to a control terminal of the switching element of each drive group. A plurality of drive groups corresponding to the drive groups of the light-emitting elements, by individually supplying drive signals at the same timing for each, so that the switching elements of each drive group are individually turned on at the same timing for each drive group. A light emitting element array including divided conduction driving means, and a driving signal supplied to the conduction driving means divided into the plurality of driving groups at the same timing for each driving group, and the conduction driving means is divided for each driving group. Switching elements driven at the same timing and divided into the plurality of drive groups A light emission control means for supplying a light emission signal to a light emitting element of each drive group to which the switching element is connected and individually driving the light emitting element when the light emitting elements are individually turned on at the same timing for each drive group. And an optical printer head comprising: 9. The light emission control means adjusts the light intensity of the light emitting elements individually by changing the signal level of the light emission signal supplied to the light emitting elements of each of the drive groups in accordance with each light emitting element. 9. The optical printer head according to claim 8, wherein: 10. The signal level of the light-emitting signal is represented by a value of a current flowing through the light-emitting element, a duration of current supply to the light-emitting element, or an amount of current flowing through the light-emitting element. 9. The optical printer head according to item 9. 11. A light-emitting element array comprising a semiconductor substrate, wherein a plurality of light-emitting element arrays in which each light-emitting element is arranged in a row and said light-emission control means are arranged in a circuit. 9. The optical printer head according to claim 8, wherein the optical printer head is mounted on a substrate. 12. The light-emitting control means for simultaneously driving light-emitting elements at symmetrical positions about the boundary between adjacent drive groups in the light-emitting elements of each drive group. An optical printer head according to claim 8. 13. The conduction driving means of each of the driving groups,
The switching elements of each corresponding drive group are simultaneously turned on in a plurality of units, and the light emission control means is connected to the switching elements when the switching elements of each drive group are turned on in a plurality of units. 9. A light emitting signal is supplied to each of the light emitting elements to drive the light emitting elements at the same time.
An optical printer head as described. 14. A method for driving an optical printer head having a plurality of light emitting elements arranged in a row, wherein a plurality of switching elements respectively connected in series to the plurality of light emitting elements are individually turned on. When the switching elements are individually turned on, a light emitting signal whose signal level is changed corresponding to each light emitting element is supplied to the light emitting element connected to the switching element, and the light amount of the light emitting element is individually adjusted. A method for driving an optical printer head, characterized in that the adjustment is performed.