JP2001180037A - Light emitting element array and method of making the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve problems wherein the number of bonding positions necessary for mounting on an optical print head substrate is increased and it is hard to correct variation of emission intensities and to execute gradation controlling of the emission intensities because a size of a chip is enlarged and a manufacturing yield is lowered in terms of a light emitting element array wherein a driver circuit is monolithically formed. SOLUTION: There is disclosed the light emitting element array wherein a shift register circuit and a transistor circuit are formed on a silicon substrate and a plurality of light emitting elements each consisting of a compound semiconductor that emits a light in accordance with a driving signal outputted from the transistor circuit are arranged on the silicon substrate. The light emitting elements are connected to an identical common electrode by each of plural number of the elements and the driving signals are inputted to the plurality of light emitting elements connected to the identical common electrode by each plural number of elements to drive them through the shift register circuit and the transistor circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting element array and a method for manufacturing the same, and more particularly, to a light emitting element array used for an optical printer head and the like and a method for manufacturing the same.

[0002]

2. Description of the Related Art FIG. 5 is a plan view showing a first conventional light emitting element array (see Japanese Patent Application Laid-Open No. 61-205153). In the figure, 1 is a light emitting element array, 11 to 1n
Denotes LEDs, 21 to 2n are electrodes, and the light-emitting element array 1 is formed by integrating LEDs 11 to 1n in an array, and has LEDs of 10 to 16 elements per 1 mm as an integration density. The electrodes 21 to 2n correspond to the LEDs 11 to 1n.
Are formed on a one-to-one basis, and the LEDs 11 to 2n can be energized by wire bonding connection with an external circuit. The electrodes 21 to 2n are provided on the substrate 1 to secure a sufficient space for enabling wire bonding connection.
Are arranged in a staggered manner. These LEDs 11 to 2n are actually 64 per chip.
Up to 128 elements are monolithically formed to form the light emitting element array 1. An optical print head is formed by arranging a plurality of the light emitting element arrays 1 linearly on one substrate.

FIG. 6 is a perspective view showing an optical print head using the light emitting element array. 1, reference numeral 1 denotes a light emitting element array, 3 denotes a substrate on which a plurality of the light emitting element arrays 1 are arranged, 4 denotes a conductive pattern provided on the substrate 3,
5 is a bonding wire for connecting the electrodes 21 to 2n of the light emitting element array 1 to the conductive patterns 4 on the substrate 3 by wire bonding, 6 is an FPC tape for supplying light emitting data and applied voltage to the light emitting element array 1, and 7 is light emitting. A driver for driving the element array 1, and a wiring 8 from a data input terminal of the driver 7. Here, the conductive patterns 4 on the substrate 3 are formed at substantially the same pitch as the pitch of the LEDs 11 to 1n.

In this light emitting element array, first, the light emitting element array 1 is mounted on the substrate 3 by die bonding and bonded. The bonded light emitting element array 1 is connected to a conductive pattern 4 on a substrate 3 by a bonding wire 5. On the other hand, F
The output line (in the light emitting element array 1 direction) of the driver 7 connected to the PC tape 6 by inner lead bonding or the like is connected to the conductive pattern 4 on the substrate 3 by laser or thermocompression. Thereby, the LEDs 11 to 1
n and the output lines of the driver 7 correspond one-to-one, and a current is supplied to the LEDs 11 to 1n via the bonding wires 5. The input signal and applied voltage to the driver 7 are FPC
It is supplied by the wiring 8 of the tape 6.

FIG. 7 is a perspective view showing another optical print head using the light emitting element array of the first conventional example. In the figure, 5 is a bonding wire, 7 is a driver, and 8 is an input wiring provided on the substrate 3 as a means for supplying an input signal to the driver 7.

In this optical print head, first, the light emitting element array 1 and the driver 7 are mounted and adhered to the substrate 3 by die bonding or the like. Next, the electrodes 21 to 2n (not shown) of the light emitting element array 1 and the output section electrodes (not shown) of the driver 7 are directly connected one to one by the bonding wires 5. (This is called chip-to-chip connection). On the other hand, an input electrode (not shown) of the driver 7 is directly connected to an input signal pattern 8 on the substrate 3 via a bonding wire 5 like the output electrode (not shown).

When the second conventional example is compared with the first conventional example, the connection method between the driver 7 and the light emitting element array 1 is different. That is, the connection method of the first conventional example is shown in FIG.
As shown in FIG. 7, the output line of the driver 7 is once bonded to the pattern 4 on the substrate 3 and then connected to the light emitting element array 1. In the second conventional connection method, as shown in FIG. 7 and the light emitting element array 1 are directly connected.

Further, in the first and second conventional examples,
Although a two-chip driver 7 is used for one chip of the light-emitting element array 1, the electrodes of the light-emitting element array 1 are not staggered as shown in FIG. In the case of only the single-row extraction method, a one-chip driver 7 can be provided for one chip of the light-emitting element array 1 to form an optical print head by the connection method of the second conventional example. It is.

In the above conventional example, the number of bonding between the light emitting element array 1 and the driver 7 is extremely large, and the pitch between the light emitting units is limited due to the process capability of the bonding pitch accuracy. From this, conventional LED
By forming the driver monolithically on the light emitting element array on which the electrodes and electrodes were formed, the number of bondings performed in the above-described conventional example is greatly reduced, reliability is improved, manufacturing costs are reduced, and light emission is achieved. A method has been proposed which enables high quality printing by narrowing the pitch between copies.

FIG. 8 is a plan view showing a fourth conventional light emitting element array (see US Pat. No. 4,587,717).
Here, the monolithic circuit is formed by using a GaP light emitting diode 2 (hereinafter referred to as GaPL) as a light emitting element in the same chip.
ED2), as its driving circuit, an output circuit 9 and a signal processing circuit 10 made of a silicon IC are monolithically formed on a silicon substrate 30, and the printing data from the output circuit 9 is applied to the GaPLED 2 in parallel, serial, or serial / It is supplied in a parallel mixture.

Here, the GaPLED 2 is formed of a silicon IC in order to prevent deterioration of circuit functions due to an increase in leak current and the like, since the temperature history in the forming process is higher than the temperature history in the forming process of the silicon IC. Drive circuit 9,
After forming 10 on a silicon substrate 30, GaPLE
D2 is formed.

FIG. 9 is a sectional view showing a fifth conventional light emitting element array (see Japanese Patent Application Laid-Open No. 63-249669). In the figure, reference numeral 30 denotes a silicon substrate (hereinafter referred to as a Si substrate), on which a LED 32 is provided together with a wiring portion and the like to be described later, and a driver 31 composed of a silicon IC in which a circuit for driving the LED 32 is integrated. Each LED 32 and each driver element 31 are monolithically integrated so as to correspond one-to-one, thereby forming a light-emitting element array 40 having about 64 to 128 elements of LED 32 and driver element 31 per chip. I have.

Reference numeral 33 denotes an element separation layer for optically separating the adjacent LEDs 32 and for electrically separating the LED 32 from the driver element 31. The element separation layer 33 is formed on the Si substrate 30 around the LED 32, for example. It is provided in. 34 is an LED 32 corresponding one-to-one as described above.
And the driver element 31 for each pair. Reference numeral 35 denotes an electrode pad portion formed on the Si substrate 30, the number of which is required to supply a signal for driving the LED 32 via the driver element 31, for example, about 6 to 7 for one light emitting element array 40 Is provided. 36 is LE
D32 and a diffusion resistor provided between the driver element 31 and the Si substrate 30. The resistor 36 forms an ohmic contact with the LED 32 and
And a current limiting resistor can be formed between the LED 32 and the driver element 31. Reference numeral 37 denotes an insulating layer provided on the driver element 31 and the like.

FIG. 10 shows the light emitting element array 4 shown in FIG.
FIG. 2 is an equivalent circuit diagram of 0, in which a driver element 31 and a logic circuit (register) not shown cause the LED 32 to emit or emit light. In order to cause the LED 32 to emit light, the driver element 31 is turned on and a constant voltage Vdd is applied. At this time, the current flowing through the LED 32 is supplied via the current limiting resistor 36.

FIG. 11 is a perspective view showing an optical print head using the light emitting element array 40. In FIG. 11, reference numeral 3 denotes one substrate, and each L
The plurality of light emitting element arrays 4 are arranged so that the ED 32 is linear.
0 are arranged and fixed by an adhesive 41, and the electrode pads (not shown) of the light emitting element array 40 and the wiring pattern 8 formed on the substrate 3 are connected by bonding wires 5. A logic circuit signal and a constant voltage are supplied to each light emitting element array 40 via an interface input connector 42 provided on the substrate 3 so as to be electrically connected to the wiring pattern 8.

[0016]

In the conventional light emitting element array, when forming an optical print head, the number of bonding between the light emitting element array 1 and the driver 7 is extremely large, and the bonding pitch accuracy is required depending on the light emitting portion pitch. Therefore, the connection method between the light emitting element array 1 and the driver 7 becomes extremely important.

In the connection method of the second conventional example in which the light emitting element array 1 and the driver 7 are directly connected, the light emitting element array 1 and the driver 7 are connected on a one-to-one basis, so that mutual alignment accuracy is required. . The light emitting element array 1 and the driver 7
The connection method according to the first conventional example in which connection is made via a pattern between the first and second conventional methods requires twice the number of bonding steps and man-hours as the connection method according to the second conventional example. Further, in the connection method of the third conventional example in which the electrode structure of the light emitting element array 1 is taken out and connected in only one direction, mutual alignment between the light emitting element array 1 and the driver 7 and the accuracy of the bonding pitch are required. . Further, in Conventional Examples 1 to 3, half to the same number of driver chips as the total number of light emitting element array chips forming an optical print head are required, and in forming the optical print head, the driver chips are arranged in parallel with the light emitting element array chips. It becomes necessary to line up.

Therefore, in the first to third conventional examples,
The large number of connection points between the light emitting element array 1 and the driver 7 causes a reduction in the process yield and a significant decrease in reliability after the process. In addition, the inability to reduce the number of driver chips 7 is a major impediment to reducing the manufacturing cost of the optical print head. Further, in order to reduce the size of a printer, especially the width of an optical print head required for color printing using a plurality of heads and photosensitive drums, first to third conventional devices in which drivers are arranged on both sides or one side of a light emitting element array. The example scheme is a major constraint.

As for the high quality of printing performance, the limit of narrowing the pitch of electrode pads due to the accuracy and reliability of the wire bonding process is a major obstacle to narrowing the pitch between LEDs. / Inch (hereinafter, dpi), it is difficult to realize a pitch between LEDs of less than 22 μm.

In the fourth conventional example, GaP or AlG
After forming the light emitting element 2 made of a compound semiconductor such as aAs, the driving circuits 9 and 10 made of silicon IC
However, in the process of forming a silicon IC that requires a maximum temperature of 1000 ° C. or more, the characteristics of the light emitting element 2 are deteriorated, and particularly, the aging of the light emission intensity is deteriorated.

Driving circuits 9 and 10 composed of silicon ICs
The circuit design and device design can be performed in consideration of the temperature history after the formation, and the process of forming the dielectric and the process of forming the metal wiring performed at a relatively low temperature can be performed after the process of forming the light emitting element. The degree of freedom is high.

On the other hand, in general, a light-emitting element formed by forming a PN junction by epitaxial growth of a compound semiconductor or by growing a thin film of a light-emitting material has a small number of steps and is simple. However, it is practically impossible to design a device in consideration of a heating process after forming a light emitting element. Further, deterioration of characteristics due to a heating step after the formation of the light-emitting element appears particularly as deterioration of aging life, so that there is a large problem relating to product reliability.

In addition, since the purpose is to control the driving of the light emitting element 2 by the monolithically formed driving circuits 9 and 10 without using an external driver IC, an increase in chip size can be avoided. Absent. This means that the driving circuit 9, 1
This is a major problem in forming 0 monolithically.
In terms of manufacturing technology, it is the biggest factor that hinders its realization.

In the fifth conventional example, as shown in FIG. 10, a constant voltage Vdd is applied to each LED 3 of the light emitting element array.
2 are commonly applied. In this case, each LED 32 is driven by controlling a transistor as a driver element by a logic circuit (shift register) not shown. The biggest problem in the fifth conventional example is that it is difficult to correct the variation in the light emission intensity within the light emitting element array and between the light emitting element arrays.

In the light emitting element array, there is usually a variation in the light emission intensity of the LED 32 in the light emitting element array or between manufacturing lots. This variation in light emission intensity has a direct effect on the printing quality of a printer using an optical print head. Therefore, in general, the variation in the light emission intensity is less than ± 10% in a light emitting element array per good substrate material. Is the manufacturing yield of the light emitting element array.

However, for an optical printer head using a mirror capable of forming a single light emitting element such as an LD (laser diode), usually 50 or more light emitting element arrays in which 64 to 128 light emitting elements are monolithically formed. In the case of an optical print head to be used, it is very difficult to improve the production yield of non-defective products having small variations in emission intensity and to reduce the production cost.

Therefore, in the first to third conventional examples, the driver 7 for driving the light emitting element array 1 is provided with a function of correcting the variation of the light emission intensity between the LEDs, so that the good product width of the light emitting element array is increased. In order to improve the yield, methods have been adopted.

This correction is performed by measuring a variation in light emission intensity when the light emitting element array 1 wired and mounted on the optical print head is driven at a constant voltage as an initial value, and then, between the light emitting element array 1 and the light emitting element array 1. The driving is performed by adjusting the driving voltage (current value) of the LED 11 so that the light emission intensity is made uniform by the method described above. There are roughly two methods.

A first correction method is to adjust (trim) a resistance component connected in series to an LED according to an initial value, thereby adjusting a current value supplied to the LED when a constant voltage is applied. How to

In a second correction method, the output of a transistor as a driver element can be adjusted by correction data superimposed on print data in accordance with an initial value.

FIG. 12 is a block diagram of a driver circuit for performing 16-stage correction by the second correction method. Here L
In order to input correction data to at least four transistors having different outputs per ED and to input correction data to each of the transistors, a circuit 43 formed of shift registers and latches having the same number of parallel outputs as the number of LEDs to be driven is provided. At least 4
You need a step.

When the first and second correction methods are applied to the fifth conventional example, in the first correction method, it is necessary to adjust the resistance value of the diffusion resistor 36 shown in FIG. After wiring is mounted on the head, the diffusion resistance cannot be adjusted by adjusting the diffusion depth, annealing temperature, and the like. In addition to the diffused resistor, it is necessary to monolithically form a thin-film resistance wiring capable of trimming a resistance value and other trimming circuits. In the second correction method, it is necessary to monolithically form a transistor whose output can be adjusted and a plurality of stages of shift registers and latches for inputting correction data to the transistor in the light emitting element array.

Further, in addition to the high resolution due to the narrow pitch between the LEDs, the LE required for higher quality printing is required.
In the case where the gradation control of the D light emission intensity is performed, the first to third conventional examples can be easily realized by adding a function to an external driver, but in the fifth conventional example, the second correction method is used. Similarly, it is necessary to further monolithically form a plurality of stages of shift registers and latches corresponding to the gradation stages.

From the above, in the fifth conventional example, the scale of the driver circuit formed monolithically increases following its function, and the chip size increases.
The number of chips per substrate material is greatly reduced. Furthermore, the production yield as a light emitting element array is extremely reduced in proportion to the scale of a monolithically formed driver circuit. This is the same for the fourth conventional example. That is, the fourth conventional example and the fifth
From the problems of the conventional light emitting element array, the process yield can be improved by greatly reducing the number of connection terminals, and the manufacturing cost and reliability of the optical print head can be improved by the cost reduction effect by reducing the number of driver chips. Therefore, it can be said that this is a technology with very low feasibility in terms of manufacturing technology.

The present invention has been made in view of such conventional problems, and the number of bonding connections required for mounting on an optical print head substrate is increased, and the driver circuit is formed monolithically. Element array that solves the conventional problems that it is difficult to correct the variation of the emission intensity due to the increase in chip size and the decrease in the production yield, and it is also difficult to control the gradation of the emission intensity in the light-emitting element array and the manufacturing method thereof The purpose is to provide.

[0036]

In order to achieve the above object, in the light emitting element array according to the first aspect, a shift register circuit and a transistor circuit are formed on a silicon substrate, and a driving circuit output from the transistor circuit is provided. In a light-emitting element array formed by arranging a plurality of light-emitting elements made of a compound semiconductor that emits light based on a signal, the plurality of light-emitting elements are connected to the same common electrode for each of a plurality of light-emitting elements, and the drive signal is supplied to the same common electrode. It is characterized by inputting and driving each of a plurality of connected light emitting elements.

In the light emitting element array, the shift register circuit comprises a one-stage shift register having the same number of parallel outputs as the light emitting elements, and the output section of the shift register circuit and the preceding transistor circuit are connected via a buffer. It is desirable.

In the above-mentioned light emitting element array, the drive signal output section in the transistor circuit may be constituted by a single bipolar transistor or any one of CMOS, NMOS and PMOS field effect transistors. desirable.

In the light emitting element array, it is preferable that a high resistance region having a width of 0.4 mm or less is provided in the silicon substrate or on the silicon, and the plurality of light emitting elements are provided on the high resistance region. .

Further, in the method of manufacturing a light emitting element array according to claim 6, after forming a shift register circuit and a transistor circuit on a silicon substrate, a light emitting element made of a compound semiconductor is formed and connected to the transistor circuit. .

[0041]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a light emitting element array according to the present invention will be described in detail with reference to the drawings.

FIG. 1 is a sectional view showing one embodiment of the light emitting element array of the present invention. A transistor circuit 52 for switching the light emitting elements 51 arranged in an array on the Si substrate 30, and “O” of the transistor circuit 52
Shift register circuit 5 for controlling N and OFF
3. Insulating layer 54 for element isolation and wiring formation, resistive layer 50 for forming ohmic contact and resistance region of light emitting element 51, wiring part 55 for circuit configuration, wiring and bonding on optical print head An electrode pad 56 for connection is formed monolithically, and a light emitting element array 57 is formed.

The resistance layer 50 can also be formed by a diffusion resistor shown in the sectional view of the light emitting element array used in the fifth conventional example of FIG. The light emitting element 51 is formed on the Si substrate 30 after the transistor circuit 52 and the shift register circuit 53 are formed. However,
In the formation of the transistor circuit 52 and the shift register circuit 53, a process of forming a dielectric film for smoothing performed at a relatively low temperature, which is a problem in a process of forming the light emitting element 51 later, and a process of forming a metal wiring on the uppermost surface. Some steps such as the formation step may be performed after the formation step of the light emitting element 51.

The process of forming the transistor circuit 52 and the shift register circuit 53 performed prior to the formation of the light emitting element 51 has a relatively large influence on the formation of the light emitting element 51.
A process having a temperature history of 0 ° C. or more is performed in advance.

FIG. 2 is a plan view showing an example of the circuit configuration of the light emitting element array 57. Here, the electrode pads 56, 6
0 to 63 indicate light emitting elements 51 via the transistor circuit 52.
Input terminal 60 of a drive signal supplied to the power supply, a clock signal input terminal 61 to a shift register circuit 53, a reset signal input terminal 62, a power supply terminal 63 for logic operation, a ground extraction terminal (not shown), and other devices as necessary Thus, a transfer signal input terminal, a strobe signal input terminal, and the like are formed. The number of the input terminals 56 and 60 to 63 is at least about 4 to about 16 per light emitting element array 57.

The size of the light emitting element array 57 having the above configuration is such that a chip length is a length direction in which the light emitting elements 51 are arranged in an array, and a chip width is a direction orthogonal thereto.
The chip length is substantially determined by the arrangement pitch of the light emitting elements 51 corresponding to the printing resolution. In the case of a light emitting element array in which 128 light emitting elements 51 are arranged in an array, 600 d
It is 5.4 mm at 2.7 dpi and 2.7 mm at 1200 dpi.

When the light emitting element 51 is formed to have a thickness of about 50 to 100 μm and the wiring rule is set to 1 μm to form a two-layer wiring structure, for example,
And the shift register circuit 53, 50 to 100 respectively.
It can be formed with a chip width of about μm. The light emitting element array 57 according to the present invention includes electrode pads 56, 60 to 63.
Is formed in a square of 50 to 100 μm, and can be manufactured in a range of 0.2 mm to 0.4 mm which is equal to or smaller than the chip size of the light emitting element arrays of the first to third conventional examples.

FIG. 3 is an equivalent circuit diagram of the light emitting element array 57 of the present invention. Referring to FIG.
Is shown by the MOSFET connected to the light emitting element 51, but depending on the doping type of the Si substrate to be used, the upper and lower of the doping type such as LED and LD formed by stacking compound semiconductor layers, or depending on the positive / negative of the driving power supply, M including CMOS, NMOS and PMOS, including the configuration of the logic circuit
There is no problem even if it is formed by any of OSFET, bipolar transistor, and mixed mounting of MOSFET and bipolar transistor. Similarly, whether the transistor circuit 52 is to be monolithically connected to the anode side or the cathode side of the light emitting element 51 in the figure may be determined by selecting an optimum location from the wiring layout, the doping type of the contact portion, and the like. Here, a transistor circuit 52 composed of a MOSFET in FIG.
N ”and“ OFF ”are controlled.

In the light emitting element 51, an “ON” state in which current can flow between the source and drain of the MOSFET is sequentially selected by the transfer function of the shift register circuit 53, and a driver is provided outside the light emitting element array 57. IC
It is driven by a drive signal from a driver 7 mounted as a chip.

The driving signal of the light emitting element 51 is applied to the 64 to 128 light emitting elements 51 arranged in an array in the light emitting element array 57 through the common electrode 60 of the driving signal. Alternatively, the voltage is applied from an individual common electrode 60 for each light emitting element group including 8 to 64 light emitting elements 51.

On the common electrode 60, a drive signal corresponding to the number of light emitting elements 51 connected to the common electrode 60 and a position on the optical print head is synchronized with a transfer (shift) clock signal of the shift register circuit. , From the driver 7 in serial.

Here, the shift register circuit 53 has a parallel output connected one-to-one to the logic input section of the transistor circuit 50 connected to the light emitting element 51, and connects the light emitting elements of the light emitting element array to the shift register circuit 53. Light emission (drive) in this order.

By the above-described series of operations, the print data input to the driver 7 of the optical print head is sequentially output as light emission data on the optical print head.

Here, as the number of light-emitting element groups divided in the light-emitting element array 57 increases, the number of light-emitting elements 51 connected to the common electrode 60 and serially driven decreases. Obviously, the time required for hitting is reduced, and the printing speed of the printer is improved.

As an example, in an optical print head using a light emitting element array having 128 light emitting elements, the exposure time of the photosensitive drum required for printing per dot is 10 μm.
In the case of sec, if the light emitting element group is not divided and 128 light emitting elements are serially driven, the time required for printing one line is 1.28 msec, and when printing with a resolution of 600 dpi, 6 ppm (sheets / Min) printing speed.

If the light emitting element group in the light emitting element array is divided into two, four, and eight under the above conditions, the printing speed becomes 13 ppm, 26 ppm, and 53 ppm, respectively.

As described above, high-speed printing can be easily realized by increasing the number of input terminals to the light emitting element array. Also, in the above-described divisional drive of eight or more divisions, it is sufficiently possible to configure the number of input terminals connected to one light emitting element array to 16 or less.

FIG. 4 is an example of a block diagram of an optical print head using the light emitting element array of the present invention. A light emitting element array 57, a driver 7 having a function of correcting a variation in light emission intensity and a gradation control function, a drive signal wiring 66 for supplying a drive signal to a light emitting element group, a power supply voltage and a logic circuit for the light emitting element array 57 and the driver 7 It is composed of a wiring 67 for supplying a clock signal and the like for operation. 65 is
A parallel output terminal for supplying a drive signal from the driver 7 for each light emitting element group. Here, about 54 to 64 light emitting element arrays 57 are mounted per optical print head. The driver 7 that supplies a drive signal to the light emitting element array 57 is an optical print head on which 64 light emitting element arrays 57 are mounted. If there are two light emitting element groups in the light emitting element array 57, 64 × 2 = 128 bits It is only necessary that one driver chip has the parallel output.

As described in the description of FIG. 3, even when it is desired to increase the number of divisions by the light emitting element groups to improve the printing speed, the number of the light emitting element arrays 57 and the parallel number according to the number of divisions by the light emitting element groups are increased. By using a driver chip having an output, the number of driver chips can be reduced to one or two. For this reason, the driver chips can be arranged on both sides of the optical print head, and the width of the head can be reduced.

[0060]

As described above, in the light emitting element array of the present invention, by forming a part of the driving circuit monolithically in the light emitting element array, the driving signal of the light emitting element is serially connected to the light emitting element array with the common electrode. Since input can be performed, the number of drive signal input terminals conventionally required for each light emitting element of the light emitting element array can be greatly reduced. Thus, the pitch between the light emitting elements arranged in an array can be easily narrowed, and the number of driver chips required per optical print head can be reduced to at least one.

Further, in the light emitting element array of the present invention, the transistor circuit for switching each light emitting element formed monolithically has a function of supplying and cutting off the maximum rated current required to drive one light emitting element. , It can be formed of at least a single transistor. Thus, the chip size can be reduced.

Further, in the light emitting element array of the present invention, the "ON" and "O"
The shift register circuit for performing the “FF” control only needs to have a function of sequentially energizing the light emitting elements arranged in an array in a required printing direction in a fixed transfer time in a required printing direction. The minimum configuration can be made up of only a one-stage shift register having a parallel output corresponding to the number of light emitting elements and an arbitrary output circuit. Thus, the chip size can be reduced.

Further, in the light emitting element array of the present invention, the chip size is equivalent to that of the conventional light emitting element array in which the driving unit is not formed monolithically, because the number of input terminals is greatly reduced and the function of the monolithic circuit is simplified. It can be manufactured with a chip size of or smaller. Specifically, fabrication with a chip width of 0.4 mm or less is possible.

Further, since each light emitting element is driven by a drive signal supplied from a driver external to the light emitting element array, the external driver circuit corrects the variation of the light emission intensity of each light emitting element and modulates for gradation control. Driving is possible in the size of the light emitting element array.

By the above operation, the manufacturing cost of the optical print head can be reduced, the reliability can be improved, the resolution of 1200 dpi or more can be supported, the printing quality can be improved, and the printer can be downsized by narrowing the optical print head. it can.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a light emitting element array according to the present invention.

FIG. 2 is a plan view showing a circuit configuration of a light emitting element array according to the present invention.

FIG. 3 is an equivalent circuit diagram of a light emitting element array according to the present invention.

FIG. 4 is a block diagram illustrating an optical print head using the light emitting element array according to the present invention.

FIG. 5 is a plan view showing a first conventional light emitting element array.

FIG. 6 is a perspective view showing an optical print head using a light emitting element array of a first conventional example.

FIG. 7 is a perspective view showing an optical print head using a light emitting element array of a second conventional example.

FIG. 8 is a plan view showing a circuit configuration of a light emitting element array according to a fourth conventional example.

FIG. 9 is a sectional view showing a fifth conventional light emitting element array.

FIG. 10 is an equivalent circuit diagram of a fifth conventional light emitting element array.

FIG. 11 is a perspective view showing an optical print head using a light emitting element array of a fifth conventional example.

FIG. 12 is a block diagram of a driver circuit that performs 16-stage correction by a second correction method.

[Explanation of symbols]

50: low resistance layer, 51: light emitting element, 52: transistor circuit, 53: shift register circuit, 54: high resistance region,
55: wiring portion, 56: electrode pad, 57: silicon substrate (light emitting element array), 58: parallel output wiring of a monolithically formed shift register circuit,

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2C162 AE05 AE21 AE28 AE47 AG07 AH05 AH75 AH84 FA04 FA17 FA70 5F041 AA05 AA31 BB22 BB26 CB22 CB32 FF13

Claims (5)

[Claims] 1. A light emitting device in which a shift register circuit and a transistor circuit are formed on a silicon substrate, and a plurality of light emitting elements made of a compound semiconductor that emits light based on a drive signal output from the transistor circuit are arranged. In the element array, a plurality of the light emitting elements are connected to the same common electrode for each of the plurality of light emitting elements, and the driving signal is input and driven for each of the plurality of light emitting elements connected to the same common electrode. 2. The shift register circuit according to claim 1, wherein the shift register circuit comprises a one-stage shift register having the same number of parallel outputs as the light emitting elements, and an output section of the shift register circuit and the transistor circuit are connected via a buffer. The light-emitting element array according to claim 1. 3. The driving signal output section in the transistor circuit is configured by a single bipolar transistor or a field effect transistor of any one of CMOS, NMOS and PMOS. The light-emitting element array according to 1. 4. A high resistance region having a width of 0.4 mm or less is provided in the silicon substrate or on the silicon,
The light emitting element array according to claim 1, wherein the plurality of light emitting elements are provided on the high resistance region. 5. A method for manufacturing a light emitting element array in which a shift register circuit and a transistor circuit are formed on a silicon substrate, and then a light emitting element made of a compound semiconductor is formed and connected to the transistor circuit.