JP2002076784A - Distortion compensating circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a distortion compensating circuit of which the flexibility of design can be improved by the addition of design parameters capable of adjusting its gain characteristics and phase characteristics versus input power. SOLUTION: The distortion compensating circuit is provided with a circuit composed of a capacitor 21 and resistor 22 in series and parallel-connected with a diode 5, and can give precedence to the change of its phase characteristics rather than the change of its gain characteristics versus input power according to the magnitude of the capacitor 21 and can change its gain and phase characteristics to input power according to the magnitude of the resistor 22, so that its flexibility of design can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a distortion compensation circuit for a low distortion amplifier applied to satellite communication, terrestrial microwave communication, and mobile communication.

[0002]

2. Description of the Related Art FIG. 10 shows, for example, "A series-connected diode linearizer equipped with a bias resistor suitable for compensation of an LDMOSFET amplifier"
2-15) is a circuit diagram showing a conventional distortion compensation circuit shown in "2-15), wherein 1 is an input terminal for inputting a signal in a radio frequency band, 2 is an output terminal for outputting a signal in a radio frequency band, 3 is a bias terminal. Reference numeral 4 denotes an input-side bias blocking capacitor provided on a signal line between the input terminal 1 and the output terminal 2, reference numeral 5 denotes a diode, and reference numeral 6 denotes an output-side bias blocking capacitor. 7 is a resistor provided in a bias circuit between the bias terminal 3 and the input side of the diode 5,
Reference numeral 8 denotes an RF short-circuit capacitor having one end connected to a bias circuit between the bias terminal 3 and the resistor 7 and the other end grounded. Reference numeral 9 denotes a bias short-circuiting inductor having one end connected to the signal line between the diode 5 and the output-side bias blocking capacitor 6 and the other end grounded, and 10 a capacitor connected in parallel to the diode 5. This distortion compensation circuit
It is an example of an analog pre-distortion type linearizer composed of analog non-linear elements. Such a linearizer is connected in series before or after the amplifier to perform distortion compensation for an amplifier having a characteristic in which a gain increases with an increase in input power and a phase is delayed.

Next, the operation will be described. A signal in the radio frequency band is input to the input terminal 1, passes through the input-side bias blocking capacitor 4, and is input to the diode 5. A bias voltage is applied to the diode 5 from the bias terminal 3 via the resistor 7. At this time, the signal waveform in the radio frequency band is clipped by the diode 5, and a direct current is generated. This DC current increases as the input power in the radio frequency band increases, and the internal resistance of the diode 5 in the radio frequency band decreases. FIG. 2 is a characteristic diagram showing the distortion compensation effect of the distortion compensation circuit. With the above-described operation, in this distortion compensation circuit, as shown in FIG. Can be realized, and the gain can be increased with an increase in the input power, and distortion compensation of an amplifier having a characteristic of delaying the phase can be performed. Note that the capacitor 10 in FIG. 10 makes the change in the phase characteristic more dominant than the change in the gain characteristic with respect to the input power according to the capacitance. Generally, in an analog pre-distortion type linearizer composed of analog non-linear elements, a gain characteristic (AM-AM characteristic) and a phase characteristic (A
(M-PM characteristics), that is, how to realize the AM-AM characteristics and the AM-PM characteristics opposite to those of the amplifier is a development point. In the conventional distortion compensation circuit shown in FIG.
Main design parameters for realizing desired AM-AM characteristics and AM-PM characteristics are the characteristics of the diode 5,
The bias voltage applied to the diode 5 and the capacitance of the capacitor 10 are three.

[0004]

Since the conventional distortion compensating circuit is configured as described above, the main design parameters for realizing desired AM-AM characteristics and AM-PM characteristics are those of the diode 5. The characteristics, the bias voltage applied to the diode 5, and the capacitance of the capacitor 10 are three. However, in the characteristics of the diode 5, generally usable diodes are limited, and the bias voltage applied to the diode 5 and the change in the AM-AM characteristic and the change in the AM-PM characteristic due to the change in the capacitance of the capacitor 10 are each limited. Therefore, there has been a problem that it is often difficult to achieve desired characteristics due to insufficient design parameters.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and it is possible to improve design flexibility by adding design parameters capable of adjusting gain characteristics and phase characteristics with respect to input power. An object is to obtain a distortion compensation circuit.

[0006]

A distortion compensating circuit according to the present invention comprises a first capacitor and a second resistor connected in parallel to a diode of a distortion compensating circuit comprising a first resistor and an RF short-circuit capacitor. It has a series circuit.

A distortion compensation circuit according to the present invention includes a series circuit comprising a first capacitor and a second resistor connected in parallel to a diode of the distortion compensation circuit comprising an RF blocking inductor and a third resistor. It is.

A distortion compensation circuit according to the present invention includes a series circuit including a first capacitor and a second resistor connected in parallel to a diode of the distortion compensation circuit including a first resistor and a third resistor. It is.

The distortion compensating circuit according to the present invention has a first circuit connected in series to a signal line between a connection point of a bias circuit and a connection point of a bias short-circuiting inductor of the distortion compensation circuit comprising a first resistor and an RF short-circuit capacitor. 4 is provided with a parallel circuit composed of a resistor of No. 4 and a first inductor.

[0010] The distortion compensation circuit according to the present invention is characterized in that a distortion compensation circuit comprising an RF blocking inductor and a third resistor is connected in series to a signal line between a connection point of a bias circuit of the distortion compensation circuit and a connection point of the third resistor. 4 is provided with a parallel circuit composed of a resistor of No. 4 and a first inductor.

The distortion compensating circuit according to the present invention is a distortion compensating circuit comprising a first resistor and a third resistor, and a series connected to a signal line between a connection point of a bias circuit of the distortion compensation circuit and a connection point of the third resistor. 4 is provided with a parallel circuit composed of a resistor of No. 4 and a first inductor.

A distortion compensation circuit according to the present invention includes a second capacitor connected in parallel to a diode.

The distortion compensation circuit according to the present invention is an LDMOS
It is connected before or after a FET amplifier or a push-pull amplifier.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below. Embodiment 1 FIG. FIG. 1 is a circuit diagram showing a distortion compensation circuit according to Embodiment 1 of the present invention. In the figure, reference numeral 1 denotes an input terminal for inputting a signal in a radio frequency band, 2 denotes an output terminal for outputting a signal in a radio frequency band, 3 is a bias terminal. 4
Is an input-side bias blocking capacitor provided on a signal line between the input terminal 1 and the output terminal 2, 5 is a diode,
Reference numeral 6 denotes an output-side bias blocking capacitor. Reference numeral 7 denotes a resistor (first resistor) provided in a bias circuit between the bias terminal 3 and the input side of the diode 5, and reference numeral 8 denotes one end connected to the bias circuit between the bias terminal 3 and the resistor 7 and the other end grounded. RF short-circuited capacitor. Reference numeral 9 denotes a bias short-circuit inductor having one end connected to the signal line between the diode 5 and the output-side bias blocking capacitor 6 and the other end grounded, and 21 and 22 denote a capacitor (first capacitor) and a resistor (second resistor). ), And these series circuits are connected in parallel to the diode 5. This distortion compensation circuit is an example of an analog pre-distortion type linearizer composed of analog non-linear elements.
Such a linearizer is connected in series before or after the amplifier to perform distortion compensation for an amplifier having a characteristic in which a gain increases with an increase in input power and a phase is delayed.

Next, the operation will be described. A signal in the radio frequency band is input to the input terminal 1, passes through the input-side bias blocking capacitor 4, and is input to the diode 5. A bias voltage is applied to the diode 5 from the bias terminal 3 via the resistor 7. At this time, the signal waveform in the radio frequency band is clipped by the diode 5, and a direct current is generated. Due to the generation of this DC current,
A voltage drop occurs in the resistor 7 and the bias voltage applied to the diode 5 decreases, so that the internal resistance value of the diode 5 in the radio frequency band increases. Note that the RF short-circuit capacitor 8 allows the signal in the radio frequency band flowing to the bias terminal 3 side via the resistor 7 to flow to the ground side,
This is to prevent the influence of the radio frequency band signal on the bias power supply. Further, the bias short-circuiting inductor 9 causes the DC component flowing through the diode 5 to flow to the ground side. FIG. 2 is a characteristic diagram showing the distortion compensation effect of the distortion compensation circuit.
As shown in the figure, the gain decreases as the input power increases, and the phase advance characteristic can be realized, and the gain increases with the input power increase, and the distortion compensation of the amplifier having the phase delay characteristic becomes possible. .

In this distortion compensation circuit, the capacitor 2
The gain characteristic (AM
-AM characteristic) rather than phase characteristic (AM-PM characteristic)
Changes can be dominant. Further, the resistor 22
, The AM-AM characteristics and the AM-PM characteristics can be changed. FIG. 3 is a characteristic diagram showing changes in gain characteristics and phase characteristics with respect to input power according to the first embodiment of the present invention. In FIG. 3, the size of resistor 22 is determined by parameters R1 to R4 (R1 <R2 <R3 <R4). This shows the characteristics when "1" is set. Thus, the resistance 2
2, the AM-AM characteristic and AM
-The amount of change in PM characteristics can be suppressed. further,
In this distortion compensation circuit, the AM-AM characteristics and the AM-PM characteristics of the distortion compensation circuit can be changed by changing the bias voltage.

As described above, according to the first embodiment, since the series circuit including the capacitor 21 and the resistor 22 connected in parallel to the diode 5 is provided, the AM-AM A rather than characteristic change
Changes in M-PM characteristics can be dominant, and
Depending on the size of the resistor 22, the AM-AM characteristic and the AM
-PM characteristics can be changed, and the degree of freedom in design can be improved. The series circuit including the capacitor 21 and the resistor 22 is composed of the capacitor 21 and the resistor 2
The same effect is obtained even if the connection order of No. 2 is reversed.

Embodiment 2 FIG. FIG. 4 is a circuit diagram showing a distortion compensation circuit according to a second embodiment of the present invention. In the figure, reference numeral 11 is connected between the bias line 3 and the signal line between the input-side bias blocking capacitor 4 and the diode 5. The RF blocking inductor 12 is a resistor (third resistor) having one end connected to the signal line between the diode 5 and the output side bias blocking capacitor 6 and the other end grounded. Other configurations are the same as those in FIG.

Next, the operation will be described. In the distortion compensation circuit shown in FIG. 4, a voltage drop occurs due to the resistor 12 as the input power increases, and the diode 5 increases as the input power increases.
, The bias voltage applied to the gate electrode decreases. Therefore, FIG.
As in the distortion compensation circuit shown in (1), the characteristic that the gain decreases and the phase advances with the increase in the input power can be realized. Therefore,
The gain increases with an increase in input power, and distortion compensation of an amplifier having a characteristic of delaying the phase becomes possible. Further, like the distortion compensating circuit shown in FIG. 1, a series circuit including a capacitor 21 and a resistor 22 connected in parallel to the diode 5 is provided.
The change in the AM-PM characteristic can be more dominant than the change in the AM characteristic.
The M-AM characteristics and the AM-PM characteristics can be changed, and the degree of freedom in design can be improved. Note that the series circuit including the capacitor 21 and the resistor 22 has the same effect even if the connection order of the capacitor 21 and the resistor 22 is reversed.

Embodiment 3 FIG. 5 is a circuit diagram showing a distortion compensating circuit according to Embodiment 3 of the present invention. In FIG. 5, a point different from FIG. 4 is that a resistor 7 is connected instead of the RF blocking inductor 11.

Next, the operation will be described. In the distortion compensation circuit shown in FIG. 5, a voltage drop occurs due to the resistors 7 and 12 as the input power increases, and the bias voltage applied to the diode 5 decreases as the input power increases. Therefore, similarly to the distortion compensating circuit shown in FIG. 1, a characteristic in which the gain decreases with an increase in the input power and the phase advances can be realized. Therefore, it becomes possible to compensate for distortion of an amplifier having a characteristic that the gain increases and the phase lags as the input power increases.
As in the distortion compensation circuit shown in FIG.
, A change in the AM-PM characteristic can be made more dominant than a change in the AM-AM characteristic according to the size of the capacitor 21. In addition, the AM-AM characteristics and the AM-PM characteristics can be changed according to the size of the resistor 22, and the degree of freedom in design can be improved. Note that the series circuit including the capacitor 21 and the resistor 22 has the same effect even when the connection order of the capacitor 21 and the resistor 22 is reversed.

Embodiment 4 FIG. 6 is a circuit diagram showing a distortion compensation circuit according to a fourth embodiment of the present invention. In the figure, reference numeral 23 denotes a resistor (fourth resistor), reference numeral 24 denotes an inductor (first inductor). A parallel circuit including an inductor 24 is connected in series to a connection point of a bias circuit and a signal line between the diode 5. The other configuration is the same as that of FIG. 1 except that a series circuit including the capacitor 21 and the resistor 21 is not connected to the diode 5 in parallel.

Next, the operation will be described. In the distortion compensating circuit shown in FIG. 6, similarly to the distortion compensating circuit shown in FIG. 1, a characteristic in which the gain decreases and the phase advances with an increase in the input power can be realized. Therefore, it becomes possible to compensate for distortion of an amplifier having a characteristic that the gain increases and the phase lags as the input power increases. Further, in this distortion compensation circuit, the amount of change in the AM-AM characteristic and the AM-PM characteristic can be suppressed by increasing the value of the resistor 23, and further, by changing the bias voltage, the distortion compensation circuit AM-AM characteristics and AM-PM characteristics can be changed, and the degree of freedom in design can be improved. Note that the inductor 24 connected in parallel with the resistor 23 short-circuits the DC component,
To prevent the bias voltage from dropping due to
Can be prevented from changing. In FIG. 6, the parallel circuit including the resistor 23 and the inductor 24 is connected in series to the connection point of the bias circuit and the signal line between the diode 5, but the parallel circuit is connected between the connection point of the diode 5 and the connection point of the bias short-circuiting inductor 9. Therefore, the parallel circuit may be connected in series at any point as long as the signal line is between the connection point of the bias circuit and the connection point of the inductor 9 for short circuit. Effects can be obtained. Further, in FIG. 6, FIG.
As shown in the figure, the distortion compensating circuit composed of the resistor 7 and the bias short-circuit inductor 9 has the resistor 23 and the inductor 2 connected thereto.
4 is connected, the RF blocking inductor 11 and the resistor 12 are connected as shown in FIG.
5, or a parallel circuit including a resistor 23 and an inductor 24 may be connected to a distortion compensation circuit including a resistor 7 and a resistor 12 as shown in FIG. 5, and a similar effect is obtained.

Embodiment 5 FIG. 7 is a circuit diagram showing a distortion compensation circuit according to a fifth embodiment of the present invention. In the figure, reference numeral 10 denotes a capacitor (second capacitor) connected in parallel to the diode 5. The other configuration is the same as that of FIG.

Next, the operation will be described. In the distortion compensating circuit shown in FIG. 7, similarly to the distortion compensating circuit shown in FIG. 1, the characteristic that the gain decreases and the phase advances with the increase of the input power can be realized. Therefore, it becomes possible to compensate for distortion of an amplifier having a characteristic that the gain increases and the phase lags as the input power increases. Also, in this distortion compensation circuit, since the capacitor 10 is connected in parallel with the diode 5, according to the capacitance,
It is possible to make the change in the AM-PM characteristic dominant over the change in the AM-AM characteristic, and thereby, by making the size of the capacitor 10 sufficiently large, it is possible to realize a characteristic in which only the phase is delayed, The degree of freedom in design can be improved. Although FIG. 7 shows an example in which the capacitor 10 is connected in parallel to the diode 5 of the distortion compensation circuit including the resistor 7 and the bias short-circuiting inductor 9 as shown in FIG. 1, as shown in FIG. The capacitor 10 may be connected in parallel to the distortion compensating circuit composed of the RF blocking inductor 11 and the resistor 12 or the diode 5 of the distortion compensating circuit composed of the resistor 7 and the resistor 12 as shown in FIG. The effect is obtained.

Embodiment 6 FIG. FIG. 8 is a circuit diagram showing a distortion compensating circuit according to a sixth embodiment of the present invention. In the figure, as shown in FIG.
The capacitor 10 is connected in parallel to the diode 5 of the distortion compensating circuit in which a parallel circuit composed of: is connected in series to a connection point of the bias circuit and a signal line between the diode 5. The other configuration is the same as that of FIG.

Next, the operation will be described. In the distortion compensating circuit shown in FIG. 8, similarly to the distortion compensating circuit shown in FIG. 6, it is possible to realize a characteristic in which the gain decreases with an increase in input power and the phase advances. Therefore, it becomes possible to compensate for distortion of an amplifier having a characteristic that the gain increases and the phase lags as the input power increases. Also, in this distortion compensation circuit, since the capacitor 10 is connected in parallel with the diode 5, according to the capacitance,
It is possible to make the change in the AM-PM characteristic dominant over the change in the AM-AM characteristic, and thereby, by making the size of the capacitor 10 sufficiently large, it is possible to realize a characteristic in which only the phase is delayed, The degree of freedom in design can be improved. As described above, in the distortion compensation circuit shown in FIG.
Since it has the same effect as the distortion compensation circuit shown in FIG. 6,
The main parameters for designing the AM-AM and AM-PM characteristics of the distortion compensation circuit are the characteristics of the diode 5,
The bias voltage applied to the diode 5, the size of the resistor 23, and the size of the capacitor 10 are four, and the degree of freedom in design can be improved as compared with the conventional distortion compensation circuit.

Embodiment 7 FIG. 9 is a circuit diagram showing a distortion compensation circuit according to a seventh embodiment of the present invention. In the figure, reference numeral 31 denotes the distortion compensation circuit described in any one of the first to sixth embodiments; Is an LDMOSFET (Lat) connected after the distortion compensation circuit 31.
erally Diffused Metal Oxi
de Semiconductor Field Ef
Fact Transistor amplifier or push-pull amplifier.

Next, the operation will be described. LDMOSF
The ET has a characteristic that the gain increases and the phase lags as the input power increases. For this reason, the amplifier constituted by the LDMOSFET also has a characteristic that the gain increases and the phase lags as the input power increases. Further, a push-pull amplifier generally used near a class B bias has a characteristic that the gain increases and the phase lags as the input power increases. Therefore, by connecting the distortion compensating circuit 31 before the LDMOSFET amplifier 32 or the push-pull amplifier 32, the LDMOSFET amplifier 32 or the push-pull amplifier 32 can be operated with high efficiency and low distortion. In FIG. 9, the distortion compensation circuit 31 is connected before the LDMOSFET amplifier 32 or the push-pull amplifier 32. However, the same effect can be obtained by connecting the distortion compensation circuit 31 after the LDMOSFET amplifier 32 or the push-pull amplifier 32. Play.

[0030]

As described above, according to the present invention, the first
And a series circuit composed of a first capacitor and a second resistor connected in parallel to a diode of a distortion compensation circuit composed of a resistor and an RF short-circuit capacitor. The change in the phase characteristic can be more dominant than the change in the gain characteristic with respect to the input power, and the gain characteristic and the phase characteristic with respect to the input power can be changed according to the magnitude of the second resistor. Thus, there is an effect that a distortion compensation circuit that can improve the degree of freedom in design can be obtained.

Further, according to the present invention, the distortion compensating circuit comprising the RF blocking inductor and the third resistor is provided with a series circuit comprising the first capacitor and the second resistor connected in parallel to the diode. Therefore, according to the size of the first capacitor, the change in the phase characteristic can be made more dominant than the change in the gain characteristic with respect to the input power, and the input can be changed according to the size of the second resistor. Gain and phase characteristics for power can be changed,
The degree of freedom in design can be improved. Further, the RF blocking inductor has an effect of obtaining a distortion compensation circuit that can prevent a signal in a radio frequency band from leaking to the bias terminal and the RF short-circuiting capacitor side.

Further, according to the present invention, the distortion compensating circuit comprising the first resistor and the third resistor is provided with a series circuit comprising the first capacitor and the second resistor connected in parallel to the diode. Therefore, according to the size of the first capacitor, the change in the phase characteristic can be made more dominant than the change in the gain characteristic with respect to the input power, and the input can be changed according to the size of the second resistor. There is an effect that a distortion compensation circuit that can change the gain characteristic and the phase characteristic with respect to the power and improve the degree of freedom in design can be obtained.

Further, according to the present invention, the fourth line connected in series to the signal line between the connection point of the bias circuit and the connection point of the bias short-circuit inductor of the distortion compensation circuit comprising the first resistor and the RF short-circuit capacitor. Resistance and the first
Is configured to include a parallel circuit composed of the inductors described above, so that the gain characteristic and the phase characteristic with respect to the input power can be changed in a direction to suppress the gain according to the magnitude of the fourth resistor, thereby improving the degree of freedom in design. can do. Further, the first inductor has an effect that a DC component is short-circuited, a voltage drop of the bias voltage due to the fourth resistor is prevented, and a distortion compensation circuit capable of preventing a change in the operating point of the diode is obtained.

Furthermore, according to the present invention, the fourth line connected in series to the signal line between the connection point of the bias circuit of the distortion compensation circuit including the RF blocking inductor and the third resistor and the connection point of the third resistor. And the parallel circuit composed of the first inductor and the first inductor can be changed in a direction to suppress the gain characteristic and the phase characteristic with respect to the input power in accordance with the magnitude of the fourth resistor. Degree of freedom can be improved. Further, the first inductor short-circuits the DC component, prevents a voltage drop of the bias voltage due to the fourth resistor, and prevents a change in the operating point of the diode. Further, the RF blocking inductor has an effect of obtaining a distortion compensation circuit that can prevent a signal in a radio frequency band from leaking to the bias terminal and the RF short-circuiting capacitor side.

Further, according to the present invention, the fourth circuit connected in series to the signal line between the connection point of the bias circuit and the connection point of the third resistor of the distortion compensating circuit comprising the first resistor and the third resistor. And the parallel circuit composed of the first inductor and the first inductor can be changed in a direction to suppress the gain characteristic and the phase characteristic with respect to the input power in accordance with the magnitude of the fourth resistor. Degree of freedom can be improved. Further, the first inductor has an effect that a DC component is short-circuited, a voltage drop of the bias voltage due to the fourth resistor is prevented, and a distortion compensation circuit capable of preventing a change in the operating point of the diode is obtained.

Further, according to the present invention, since the second capacitor connected to the diode is provided in parallel, the phase of the gain is changed more than the change of the gain characteristic with respect to the input power depending on the size of the second capacitor. There is an effect that a distortion compensation circuit can be obtained in which a change in characteristics can be dominant and the degree of freedom in design can be improved.

Further, according to the present invention, the LDMOSF
Since it is configured so as to be connected before or after the ET amplifier or the push-pull amplifier, it is possible to compensate for the increase in the gain and the delay in the phase with respect to the increase in the input power of the LDMOSFET amplifier or the push-pull amplifier with high accuracy, and the In addition, there is an effect that a distortion compensating circuit that can be operated with low distortion can be obtained.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a distortion compensation circuit according to a first embodiment of the present invention.

FIG. 2 is a characteristic diagram illustrating a distortion compensation effect of a distortion compensation circuit.

FIG. 3 is a characteristic diagram showing changes in gain characteristics and phase characteristics with respect to input power according to the first embodiment of the present invention.

FIG. 4 is a circuit diagram showing a distortion compensation circuit according to a second embodiment of the present invention.

FIG. 5 is a circuit diagram showing a distortion compensation circuit according to a third embodiment of the present invention.

FIG. 6 is a circuit diagram showing a distortion compensation circuit according to a fourth embodiment of the present invention.

FIG. 7 is a circuit diagram showing a distortion compensation circuit according to a fifth embodiment of the present invention.

FIG. 8 is a circuit diagram showing a distortion compensation circuit according to a sixth embodiment of the present invention.

FIG. 9 is a circuit diagram showing a distortion compensation circuit according to a seventh embodiment of the present invention.

FIG. 10 is a circuit diagram showing a conventional distortion compensation circuit.

[Explanation of symbols]

1 input terminal, 2 output terminal, 3 bias terminal, 4
Input side bias blocking capacitor, 5 diode, 6
Output-side bias blocking capacitor, 7 resistors (first resistor), 8 RF short-circuiting capacitor, 9 bias short-circuiting inductor, 10 capacitors (second capacitor), 11 RF blocking inductor, 12 resistors (third resistor) ), 21 capacitor (first capacitor), 22
Resistance (second resistance), 23 resistance (fourth resistance), 2
4 Inductor (first inductor), 31 distortion compensation circuit, 32 LDMOSFET amplifier, push-pull amplifier.

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Yukio Ikeda 2-3-2 Marunouchi, Chiyoda-ku, Tokyo F-term (reference) 5J090 AA01 AA15 CA21 FA19 GN03 HA10 HA19 HA25 HA29 HA33 KA12 SA13 TA01 TA02 5J091 AA01 AA15 CA21 FA19 HA10 HA19 HA25 HA29 HA33 KA12 SA13 TA01 TA02

Claims (8)

[Claims] An input terminal for inputting a signal in a radio frequency band, an input side bias blocking capacitor, a diode, an output side bias blocking capacitor, and an output terminal for outputting a radio frequency band signal are connected in series in this order. A signal line, a bias circuit having a first resistor connected between the signal line between the input-side bias blocking capacitor and the diode, and a bias terminal, and a bias circuit between the bias terminal and the first resistor. A short-circuiting capacitor having one end connected to the other end and the other end grounded; a bias short-circuiting inductor having one end connected to the signal line between the diode and the output-side bias blocking capacitor and the other end grounded; And a series circuit including a first capacitor and a second resistor connected in parallel to the circuit. 2. An input terminal for inputting a signal in a radio frequency band, an input side bias blocking capacitor, a diode, an output side bias blocking capacitor, and an output terminal for outputting a radio frequency band signal are connected in series in this order. A signal line, a bias circuit in which an RF blocking inductor is connected between the signal line between the input side bias blocking capacitor and the diode, and a bias terminal, and a bias circuit between the bias terminal and the RF blocking inductor An RF short-circuit capacitor, one end of which is connected to the other end, and a third resistor, one end of which is connected to a signal line between the diode and the output-side bias blocking capacitor, the other end of which is grounded; And a series circuit including a first capacitor and a second resistor connected in parallel to the circuit. 3. An input terminal for inputting a signal in a radio frequency band, an input side bias blocking capacitor, a diode, an output side bias blocking capacitor, and an output terminal for outputting a radio frequency band signal are connected in series in this order. A signal line, a bias circuit having a first resistor connected between the signal line between the input-side bias blocking capacitor and the diode, and a bias terminal, and a bias circuit between the bias terminal and the first resistor. An RF short-circuit capacitor having one end connected to the other end and a ground, and a third resistor having one end connected to the signal line between the diode and the output-side bias blocking capacitor and the other end grounded;
A distortion compensation circuit comprising: a series circuit including a first capacitor and a second resistor connected in parallel to the diode. 4. An input terminal for inputting a signal in a radio frequency band, an input side bias blocking capacitor, a diode, an output side bias blocking capacitor, and an output terminal for outputting a radio frequency band signal are connected in series in this order. A signal line, a bias circuit having a first resistor connected between the signal line between the input-side bias blocking capacitor and the diode, and a bias terminal, and a bias circuit between the bias terminal and the first resistor. A short-circuited capacitor having one end connected to the other end and the other end grounded, a bias short-circuited inductor one end connected to the signal line between the diode and the output-side bias blocking capacitor and the other end grounded, A fourth resistor and a fourth resistor connected in series to the signal line between the connection point of the circuit and the connection point of the bias short-circuit inductor. And a parallel circuit comprising a first inductor. 5. An input terminal for inputting a signal in a radio frequency band, an input side bias blocking capacitor, a diode, an output side bias blocking capacitor, and an output terminal for outputting a radio frequency band signal are connected in series in this order. A signal line, a bias circuit in which an RF blocking inductor is connected between the signal line between the input side bias blocking capacitor and the diode, and a bias terminal, and a bias circuit between the bias terminal and the RF blocking inductor A short-circuited capacitor, one end of which is connected to the other end and the other end of which is grounded; a third resistor, one end of which is connected to the signal line between the diode and the output-side bias blocking capacitor and the other end of which is grounded; A fourth resistor and a first resistor connected in series to a signal line between a connection point of the circuit and the connection point of the third resistor. And a parallel circuit comprising the inductors. 6. An input terminal for inputting a signal in a radio frequency band, an input side bias blocking capacitor, a diode, an output side bias blocking capacitor, and an output terminal for outputting a radio frequency band signal are connected in series in this order. A signal line, a bias circuit having a first resistor connected between the signal line between the input-side bias blocking capacitor and the diode, and a bias terminal, and a bias circuit between the bias terminal and the first resistor. An RF short-circuit capacitor having one end connected to the other end and a ground, and a third resistor having one end connected to the signal line between the diode and the output-side bias blocking capacitor and the other end grounded;
A fourth resistor and a first resistor connected in series to a signal line between a connection point of the bias circuit and a connection point of the third resistor.
And a parallel circuit comprising the inductors. 7. The distortion compensation circuit according to claim 1, further comprising a second capacitor connected in parallel with the diode. 8. The distortion compensating circuit according to claim 1, wherein the distortion compensating circuit is connected before or after the LDMOSFET amplifier or the push-pull amplifier.