JP2002076312A - Solid-state image pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solid-state image pickup device capable of solving such a problem that most of light which is incident into a light shielding film conventionally widely used for a solid-state image pickup device is reflected to be stray light or to be absorbed by the light shielding film, so that the light does not contribute to photoelectric conversion in each photoelectric transducer. SOLUTION: Minute reflectors 57 for reflecting incident light from above a corresponding photoelectric transducer 10 toward the transducer 10 side are respectively provided above a plurality of the transducer 10 formed on one of the surfaces of a semiconductor substrate 1 so as to form a matrix.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a solid-state imaging device having a large number of photoelectric conversion elements formed in a matrix on one surface side of a semiconductor substrate.

[0002]

2. Description of the Related Art A large number of photoelectric conversion elements (photodiodes) are formed in a matrix on one surface side of a semiconductor substrate, and one vertical charge transfer path for transferring charges accumulated in these photoelectric conversion elements is provided. One CCD per row of photoelectric conversion element rows
(Charge Coupled Device)
Type solid-state imaging device can be obtained. Each vertical charge transfer path is electrically connected to a horizontal charge transfer path formed on the same semiconductor substrate.

Further, a large number of photoelectric conversion elements (photodiodes) are formed in a matrix on one surface side of a semiconductor substrate, and an output capable of generating a voltage corresponding to the electric charge accumulated in these photoelectric conversion elements. By arranging the signal lines one by one in one photoelectric conversion element row, a MOS solid-state imaging element can be obtained.

[0004] Both the CCD type and the MOS type solid-state imaging devices are either linear image sensors or area type.
Used for image sensors.

[0005] CC used for area image sensor
In a D-type solid-state imaging device, a light shielding film, a protective film, a first planarization layer, and a microlens array are sequentially formed on a semiconductor substrate on which a photoelectric conversion element, a vertical charge transfer path, and a horizontal charge transfer path are formed. It is formed. In the case of a single-chip solid-state imaging device for color imaging, a color filter array and a second flattening layer are sequentially formed on the first flattening layer, and a microlens array is formed thereon.

[0006] The light shielding film covers the semiconductor substrate in a state where openings are formed one by one on each photoelectric conversion element, and prevents unnecessary photoelectric conversion from being performed in a region other than the photoelectric conversion element. The light shielding film is generally made of a material having a high light absorption / reflection ability, for example, a metal thin film made of aluminum, chromium, tungsten, titanium, molybdenum, or the like, or an alloy thin film made of two or more of these metals, or It is formed of a multi-layer metal thin film or the like in which metal thin films are combined with each other or the metal thin film and the alloy thin film are combined.

[0007] The microlens array is composed of a large number of microlenses arranged one above each photoelectric conversion element, and improves the light use efficiency of each photoelectric conversion element. If necessary, an inner lens is arranged between the microlens and the photoelectric conversion element thereunder.

[0008] A solid-state image sensor used for a linear image sensor has a similar configuration. However, the light shielding film and the micro lens array are not essential components. These light shielding films and microlens arrays are appropriately provided as needed.

[0009]

As described above, the light shielding film is formed on the semiconductor substrate on which the vertical charge transfer path and the horizontal charge transfer path are formed. The light shielding film has irregularities reflecting the surface shape of these charge transfer paths.

For this reason, when the light shielding film is formed of a material having a high reflectivity such as aluminum, the light incident on the light shielding film is easily reflected and becomes stray light. If the light-shielding film is formed of a material having a light-absorbing property such as tungsten, it is possible to suppress light incident on the light-shielding film from becoming stray light.

In any case, most of the light incident on the light shielding film does not contribute to the photoelectric conversion in the photoelectric conversion element.

In recent years, the resolution of an image sensor using a solid-state image sensor has been improved. The resolution can be increased by increasing the degree of integration of the photoelectric conversion elements in the solid-state imaging device. On the other hand, the area of the light receiving section in each photoelectric conversion element decreases, and the sensitivity decreases.

In order to obtain a solid-state image pickup device having high sensitivity and high resolution, it is desired to further increase the light use efficiency of each photoelectric conversion element.

An object of the present invention is to provide a solid-state imaging device capable of improving the light use efficiency of each photoelectric conversion element.

[0015]

According to one aspect of the present invention, a semiconductor substrate, a plurality of photoelectric conversion elements formed in a matrix on one surface side of the semiconductor substrate, and the plurality of photoelectric conversion elements A first micro-reflector disposed one above each of the elements, each of which reflects at least one first light for reflecting light incident from above the corresponding photoelectric conversion element toward the photoelectric conversion element; A solid state imaging device having a reflective surface and a first micro-reflector defining an opening above the corresponding photoelectric conversion element.

By providing the first micro-reflector, for example, light that has been reflected by the light shielding film and becomes stray light, such as light incident on the vertical charge transfer path, or absorbed by the light shielding film. It is possible to guide the light that has been applied to the photoelectric conversion element. The light use efficiency in each photoelectric conversion element can be improved.

[0017]

FIG. 1 is a plan view schematically showing a solid-state imaging device 100 according to a first embodiment. As shown in FIG. 1, the solid-state imaging device 100 includes a semiconductor substrate 1, a plurality of photoelectric conversion elements 10, a plurality of vertical charge transfer paths 20,
It has a horizontal charge transfer path 30 and an output section 40. In FIG. 1, a number of first microreflectors, color filter arrays, and microlens arrays (not shown) are formed above the semiconductor substrate 1.

A large number of photoelectric conversion elements 10 are arranged in a matrix on one surface side of the semiconductor substrate 1 in a plurality of rows and a plurality of columns. The number of the photoelectric conversion elements 10 illustrated is six, except for those that are partially visible. In an actual solid-state imaging device, the total number of photoelectric conversion elements 10 is, for example,
It reaches 10,000 to several millions.

Each vertical charge transfer path 20 is constituted by a CCD. Each vertical charge transfer path 20 includes a vertical charge transfer channel 21 formed in the semiconductor substrate 1 in proximity to the corresponding photoelectric conversion element row. The vertical charge transfer channel 21 is configured by, for example, an n-type region formed in a band shape on the semiconductor substrate 1. Each of the vertical charge transfer channels 21 extends along a corresponding photoelectric conversion element row.

Two types of vertical transfer electrodes 22 and 23, which intersect each vertical charge transfer channel 21 in plan view, are arranged one by one in one photoelectric conversion element row.

Each of the vertical transfer electrodes 22 extends to the upstream side along a corresponding photoelectric conversion element row while crossing each vertical charge transfer channel 21 in plan view. Each of the vertical transfer electrodes 23 extends to the downstream side along the corresponding photoelectric conversion element row while crossing each vertical charge transfer channel 21 in plan view. Each vertical transfer electrode 23 constitutes a read gate 24 on the left side in FIG. 2 of the corresponding photoelectric conversion element 10.

In this specification, the movement of the electric charge transferred from the photoelectric conversion element 10 to the output unit 40 is regarded as a flow, and the relative positions of the individual members and the like are changed as necessary. It is specified as "upstream", "any downstream" or the like.

The vertical transfer electrodes 22 and 23 corresponding to one row of the photoelectric conversion element rows, except for the photoelectric conversion element 10 included in the rightmost photoelectric conversion element column (not shown), are included in this photoelectric conversion element row. Each photoelectric conversion element 10 is surrounded in plan view.

On the downstream side of the most downstream vertical transfer electrode 23,
The first auxiliary transfer electrode 26, the second auxiliary transfer electrode 27, and the third auxiliary transfer electrode 28 are arranged in this order. The first to third auxiliary transfer electrodes 26 to 28 also extend in the row direction of the photoelectric conversion elements while intersecting the respective vertical charge transfer channels 21 in plan view.

These transfer electrodes 22, 23, 26-28
Are formed above the semiconductor substrate 1 via an electrical insulating film (not shown in FIG. 1).
The vertical transfer electrode 22, the first auxiliary transfer electrode 26, and the third auxiliary transfer electrode 28 are formed by a first polysilicon layer. Vertical transfer electrode 23 and second auxiliary transfer electrode 27
Is formed by the second polysilicon layer. Each transfer electrode 22, 23, 26 to 28 is covered with an electrical insulating film (thermal oxide film).

In each of the vertical charge transfer channels 21, each of the regions intersecting the transfer electrodes 22, 23, 26 to 28 in a plan view, the transfer electrodes 22, 23, 26 are disposed thereon only through an electrical insulating film. The region where ~ 28 is formed is
Together with the transfer electrodes 22, 23, 26 to 28, one vertical charge transfer stage is constituted.

Each of the vertical charge transfer paths 20 is constituted by a number of vertical charge transfer stages connected in the direction of the photoelectric conversion element column.

The downstream end of each vertical charge transfer path 20 is electrically connected to a horizontal charge transfer path 30. The horizontal charge transfer path 30 is constituted by a two-phase drive type CCD having one horizontal charge transfer channel 31 and a number of horizontal transfer electrodes 32a, 32b, 32c, 32d.

The horizontal charge transfer channel 31 is formed, for example, by repeatedly forming an n-type region and an n ⁺ -type region on the semiconductor substrate 1 alternately. The concentration of the n-type impurity in the n ⁺ -type region is higher than the concentration of the n-type impurity in the n-type region.

Each of the horizontal transfer electrodes 32a and 32c is formed on an n ⁺ -type region in the horizontal charge transfer channel 31 via an electric insulating film. Each horizontal transfer electrode 32b, 3
2d is on the n-type region in the horizontal charge transfer channel 31;
It is formed via an electrical insulating film.

One horizontal transfer electrode 32a, 32b, 32c, 32d is formed for each vertical charge transfer path 20. Horizontal transfer electrodes 32a, 32b, 32c, 3
2d are repeatedly arranged in this order from the output unit 40 side. Each of the horizontal transfer electrodes 32b and 32d is formed of a first polysilicon layer, and the horizontal transfer electrodes 32a and 32c
Are formed by the second polysilicon layer. Each of the horizontal transfer electrodes 32a to 32d is covered with an electrical insulating film (thermal oxide film).

The horizontal transfer electrodes 32a and 32c are electrically connected to the horizontal charge transfer electrodes 32b and 32d on the right side in the figure.

One horizontal transfer electrode 32a or 32c and the horizontal transfer electrode 32b or 32d adjacent to the horizontal transfer electrode 32a or 32c, together with one region of the horizontal charge transfer channel 31 covered in plan view by these electrodes, constitute one horizontal transfer electrode. Construct a charge transfer stage.

The horizontal transfer voltage in each horizontal charge transfer stage
Pole 32a or 32c and n below it ⁺ One type region
Functions as a potential well region and has a horizontal transfer electrode
32b or 32d and the n-type region thereunder are one potion.
It functions as a partial barrier region.

The output section 40 is connected to the left end of the horizontal charge transfer path 30. The output unit 40 converts the electric charge sent from the horizontal charge transfer path 30 into a signal voltage by, for example, a floating capacitor (not shown), and uses the signal voltage by using a source follower circuit (not shown) or the like. And amplify. The charge of the floating capacitance after being detected (converted) is absorbed by a power supply (not shown) via a reset transistor (not shown). The output unit 40 can be configured, for example, in the same manner as the output unit described with reference to FIG. 4B in stages 0084 to 0091 of Japanese Patent Application No. 1-287332.

When light enters the photoelectric conversion element 10, electric charges are accumulated in the photoelectric conversion element 10. Vertical transfer electrode 2
When a readout pulse (for example, 15 V) is applied to 3, charges accumulated in each of the photoelectric conversion elements 10 corresponding to the vertical transfer electrodes 23 are read out to the corresponding vertical charge transfer paths 20 via the readout gate 24.

From the photoelectric conversion element 10 to the vertical charge transfer path 20
The readout of the electric charge to the photoelectric conversion element is performed for each photoelectric conversion element row. Various scanning modes such as interlaced scanning, progressive scanning, and all-pixel reading are known.

The electric charge read out to the vertical charge transfer path 20 is transferred to the horizontal charge transfer path 30 and further transferred to the output section 40, where it is converted into an image signal (signal voltage).

FIG. 1 shows that each of the vertical charge transfer paths 20
An example of wiring when driving the horizontal charge transfer path 30 by the two-phase horizontal drive signals φH1 and φH2 by driving under the interlace scanning by the vertical drive signals φV1 to φV4 of the phases is additionally shown.

Each of the vertical transfer electrodes 22, 23 and the first to third auxiliary transfer electrodes 26 to 28 are divided into four groups, and different vertical drive signals φV1 to φV4 are supplied to each group. One group is constituted by transfer electrodes 22, 23, 26 to 28 selected every third electrode.

The horizontal drive signal φH1 is applied to the horizontal transfer electrode 32
The horizontal drive signal φH2 is supplied to each of the horizontal transfer electrodes 32a and 32b.

These drive signals φV1 to φV4, φH1
The waveforms of φH2 are appropriately selected according to the scanning method of the solid-state imaging device 100.

As described above, the solid-state imaging device 100
A plurality of first micro reflectors, a color filter array, and a micro lens array are provided. The first micro-reflector and the micro-lens array improve light use efficiency in the photoelectric conversion element 10. The color filter array enables, for example, color imaging.

FIG. 2 schematically shows a cross section along the line AA shown in FIG.

FIG. 3 schematically shows a cross section along the line BB shown in FIG.

In these figures, a first micro reflector 57, a color filter array 60 and a micro lens array 65, which are not shown in FIG. 1, are shown. 2 or FIG. 3 corresponding to the components shown in FIG. 1 are denoted by the same reference numerals as those used in FIG. 1, and the description thereof will be omitted.

As shown in FIGS. 2 and 3, the semiconductor substrate 1 forming the solid-state imaging device 100 is an n-type semiconductor substrate 1.
a and a p-type impurity region 1b formed thereon.

Each of the photoelectric conversion elements 10 is, for example, a buried type formed by providing an n-type impurity region 10a at a predetermined position of a p-type impurity region 1b and providing ap ⁺ -type impurity region 10b thereon. It is a photodiode. Each of the n-type impurity regions 10a functions as a charge storage region.

Each vertical charge transfer channel 21 is, for example,
It is formed by providing an n-type impurity region at a predetermined position of p-type impurity region 1b.

The p-type impurity region 1b is exposed along the right edge in FIG. 2 of each photoelectric conversion element 10 (n-type impurity region 10a). This region in p-type impurity region 1b is used as channel region 24a for a read gate. Each of the channel regions 24a extends from substantially the center of the right side edge of the corresponding photoelectric conversion element 10 to its downstream end. The photoelectric conversion element 10 and the corresponding vertical charge transfer channel 21 are adjacent to each other via a channel region 24a.

Except where the channel region 24a is formed, the channel stop region 13 is
0 and the periphery of each vertical charge transfer channel 21 in plan view. This channel stop area 13
Are the photoelectric conversion elements 10 and the photoelectric conversion elements 10
And the vertical charge transfer channel 21 not corresponding thereto are electrically separated. The channel stop region 13 is, for example,
It is formed by providing ap ⁺ -type impurity region at a predetermined position of p-type impurity region 1b.

Each impurity region can be formed by, for example, ion implantation and subsequent annealing.
The p-type impurity region 1b can be formed by, for example, an epitaxial growth method. The concentration of the p-type impurity in the p ⁺ -type impurity region is higher than the concentration of the p-type impurity in the p-type impurity region.

The electric insulating film 15 is formed on one surface of the semiconductor substrate 1, that is, on the surface on which the above-described various impurity regions are formed (including the surfaces of the various impurity regions). I have.

The electrical insulating film 15 is formed using an electrical insulating oxide such as silicon oxide or an electrical insulating nitride such as silicon nitride. This electrical insulating film 1
5 is, for example, a single-layer structure composed of one electrically insulating oxide layer, a two-layer laminated structure of an electrically insulating oxide layer and an electrically insulating nitride layer formed thereon, It has a three-layer structure of an oxide layer, an electrically insulating nitride layer formed thereon, and an electrically insulating oxide layer formed thereon.

Each of the vertical transfer electrodes 22, 23, the first to third auxiliary transfer electrodes 26 to 28, and each of the horizontal transfer electrodes 32a to 32-3.
2d is formed on the electrical insulating film 15. In FIG. 2, only the vertical transfer electrode 23 is visible. In FIG. 3, the vertical transfer electrodes 22 and 23 are visible. Each of the transfer electrodes 22, 23, 26 to 28, and 32 a to 32 d is individually covered with an electrical insulating film (thermal oxide film) 50.

One region of the vertical transfer electrode 23 on the electrical insulating film 15 covers the channel region 24a in plan view, and forms a read gate 24 together with the channel region 24a. When a read pulse is applied to the vertical transfer electrode 23, a channel is induced in the channel region 24a, and the photoelectric conversion element 1
0 (n-type impurity region 10a) and the corresponding vertical charge transfer channel 21 conduct.

The protective film 51 is formed on the electric insulating films 15 and 50. The protective film 51 is formed of, for example, silicon nitride, silicon oxide, PSG (phosphosilicate glass), BPSG (boron phosphosilicate glass), polyimide, or the like.

An underlayer 56 constituting a plurality of first micro reflectors 57 is provided above each of the vertical transfer electrodes 22 and 23, and a first light reflection film 55 is formed on the surface thereof.

The underlayer 56 is formed of the respective vertical transfer electrodes 22 and 23.
Extends in the row direction of the photoelectric conversion element and the column direction of the photoelectric conversion element along the line, and when cut along any of the row direction of the photoelectric conversion element and the column direction of the photoelectric conversion element, an inverted V-shape as viewed from the semiconductor substrate 1 . That is, the entire underlayer 56 has a shape independent of the shape of the underlayer without inheriting the shape of the underlying layer. Note that the shape of the base may be partially inherited.

The underlayer 56 has a large number of inclined surfaces extending in the photoelectric conversion element row direction or the photoelectric conversion element column direction. The four inclined surfaces in the base layer 56 form one set,
One rectangular opening is defined above each photoelectric conversion element 10.

The underlayer 56 is formed of, for example, silicon oxide, silicon nitride, PSG, BPSG, or the like.

The first light reflection film 55 formed on the surface of the underlayer 56 also extends in the photoelectric conversion element row direction and the photoelectric conversion element column direction along each of the vertical transfer electrodes 22 and 23.
When the semiconductor substrate 1 is cut along either the row direction of the photoelectric conversion element or the column direction of the photoelectric conversion element,
It has a character-like contour shape. This contour is preferably symmetrical.

Therefore, the first light reflection film 55 also has a large number of inclined surfaces extending in the photoelectric conversion element row direction or the photoelectric conversion element column direction. A set of four inclined surfaces defines one rectangular opening (light incident part) 55a above each photoelectric conversion element 10. Each of the four inclined surfaces in a set is referred to as a “first light reflecting surface 55b”.

Each of the first micro reflectors 57 is formed by
In this example, four inclined surfaces defining a rectangular opening above the photoelectric conversion element 10 and four first light reflecting surfaces 55b formed on these inclined surfaces are included. The functional surface of each first micro-reflector 57 is constituted by four first light reflecting surfaces 55b.

Each of the first light reflecting surfaces 55 b reflects light incident from above the corresponding photoelectric conversion element 10 to the photoelectric conversion element 10 side. These first light reflecting surfaces 55b
Covers the inner edge and the peripheral edge of the corresponding photoelectric conversion element 10 in plan view, and also functions as a light shielding film. The first
The inclination angle of the light reflection surface 55b will be described later in detail with reference to FIG.

If the first light reflecting surface 55b is concave or convex, it is difficult to guide the light incident on the first light reflecting surface 55b to the photoelectric conversion element 10. First light reflection surface 55b
Is preferably a flat surface.

The first light reflection surface 55b is preferably a metal surface having a high reflectance, for example, a metal surface formed of aluminum, nickel, gold or the like.

A first planarization layer 58 is formed in each first micro-reflector 57. The first planarization layer 58 is
For example, it is formed by applying a transparent resin such as a photoresist to a desired thickness by, for example, a spin coating method.

The color filter array 60 is formed on the first planarization layer 58. The color filter array 60 is formed by forming a plurality of types of color filters that enable color imaging in a predetermined pattern. As a color filter array for color imaging, a primary color type color filter array, and
There is a complementary color filter array.

In each of the primary color filter array and the complementary color filter array, one color filter is provided above each photoelectric conversion element 10. In FIG. 2, one blue filter 60B and two green filters 60G are visible. In FIG. 3, 1
Red filters 60R and two green filters 60G
Is visible.

The color filter array 60 is made of, for example, a resin (color resin) containing a pigment or dye of a desired color.
Can be manufactured by forming a layer at a predetermined position by a method such as a photolithography method. The tops of the individual first micro-reflectors 57 (the tops of the first light reflection films 55) protrude from the surface of the color filter array 60.

The second flattening layer 62 covers the tops of the color filter array 60 and the individual first micro-reflectors 57 (the tops of the first light reflecting films 55). Second planarization layer 62
Is formed by applying a transparent resin such as a photoresist to a desired thickness by a spin coating method, for example.

The micro lens array 65 is formed on the second flattening layer 62. The microlens array 65 is constituted by microlenses 65a arranged one by one above the individual photoelectric conversion elements 10.

The microlenses 65a are formed by, for example, partitioning a layer made of a transparent resin (including a photoresist) having a refractive index of about 1.3 to 2.0 into a predetermined shape by a photolithography method or the like, followed by heat treatment. Thus, the transparent resin layer of each section is melted, the corners are rounded by surface tension, and then cooled.

Although not shown in FIGS. 2 and 3, the area downstream of the location where the first auxiliary transfer electrode 26 is provided is covered with a light shielding film. Also in this region, a protective film 51, a first planarization layer 58, and a second planarization layer 62 are formed. In a region downstream of the position where the first auxiliary transfer electrode 26 is provided, each transfer electrode 27, 32a, 32c is formed by the second polysilicon layer, and an electrical insulating film 50 is formed on these transfer electrodes. After that, a light shielding film is formed on the electrical insulating film 50, the protective film 51, the first planarization layer 58, or the second planarization layer 62.

The solid-state imaging device 100 having the above-described structure
In each of the first micro reflectors 57,
By selecting the angle of inclination of the light reflecting surface 55b, light traveling outside the photoelectric conversion element 10 can be also transmitted to the first micro reflector 57.
(The first light reflection surface 55b) and the photoelectric conversion element 1
0. Individual photoelectric conversion element 10
Light use efficiency can be increased.

Hereinafter, the criteria for selecting the inclination angle of the first light reflection surface 55b will be described. However, in the following description, the existence of the electrical insulating film 15 and the protective film 51 is ignored.

FIG. 4 is a schematic diagram for explaining the relationship between the angle of inclination of the first light reflecting surface 55b and the reflected light.

The first inclined at an angle (π / 2−θ) from the horizontal plane
The reflection angle of the light L incident on the point P on the light reflection surface 55b at an incident angle (π / 2-ψ) is (π / 2-ψ). Expressing the inclination angle of the reflected light with respect to the vertical plane is (ψ + θ).

In order for the reflected light at the point P to travel downward, that is, toward the photoelectric conversion element 10, it is necessary to select θ so that (ψ + θ) <π / 2.

When the light reflected at the point P is incident on the point Q of the first light reflection surface 55b on the right in FIG. 4, the incident angle and the reflection angle are [π / 2− (ψ + 2θ)]. Become. Expressing the angle of inclination of this reflected light with respect to the vertical plane, (ψ + 3
θ).

In order for the reflected light at the point Q to move downward, that is, toward the photoelectric conversion element 10, it is necessary to select θ so that (ψ + 3θ) <π / 2.

As the angle of incidence of light L on point P decreases, the number of reflections until light L enters photoelectric conversion element 10 increases. Assuming that the number of reflections is n, [ψ +
It is necessary to select θ so that (2n−1) θ] <π / 2.

In order to make more light incident on the photoelectric conversion element 10, it is desirable to reduce θ. Ideally, each first light reflecting surface 55b is ideally a vertical surface. However, it is difficult to form the vertical first light reflection surface 55b. The inclination angle of the first light reflection surface 55b is:
Preferably, it is as close to vertical as possible.

As the number of reflections until the light L enters the photoelectric conversion element 10 increases, the risk of occurrence of stray light due to irregular reflection increases. In order to suppress the generation of stray light, it is desired that the light L be incident on the photoelectric conversion element 10 with as few reflection times as possible.

For example, in order to make the light L incident on the point P from the vertical direction, that is, the light L incident on the point P at an incident angle (π / 2−θ), enter the photoelectric conversion element 10 by one reflection. is, tan (2θ) <[( L 1/2) + L 2] it is necessary to select a θ such that / h. And t
an (2θ) <[(L 1/2) + L 2] be selected to θ such that / H, most of the light L incident on the first light reflection surface 55b at an incident angle of (π / 2θ) Can be incident on the photoelectric conversion element 10 by one reflection.

Here, L ₁ is the width of the first light reflection film 55 in plan view, and L ₂ is the plane of the region of the photoelectric conversion element 10 which is not covered by the first light reflection film 55 and is exposed. The visual passing diameter, h represents the height of the point P obtained with reference to the surface of the photoelectric conversion element 10, and H represents the height of the first light reflection film 55 obtained with reference to the surface of the photoelectric conversion element 10. .

For example, in a solid-state imaging device in which the shape and size of each photoelectric conversion element 10 in a plan view is about 4.5 μm square, the photoelectric conversion of the vertical transfer electrode 23 at a position constituting the readout gate 24 is performed. The line width in the element row direction is about 2 μm. The distance from the surface of the semiconductor substrate 1 to the lower surface of the microlens 65a is about 5 μm. Therefore, L
The minimum value of ₁ is about 2 μm, and the minimum value of L _1/2 is about 1 μm.

Θ is about 22.5 ° or less, for example, 17.5 °
By selecting about °, most of the light L incident on the light reflecting surface 55b at an incident angle (π / 2-θ) can be incident on the photoelectric conversion element 10 by one reflection. First light reflection surface 55 when the surface of semiconductor substrate 1 is regarded as a horizontal plane
It is preferable that the inclination angle b is selected within a range of, for example, 65 ° or more and less than 90 °.

The first light reflection film 55 and the first light reflection surface 55b can be formed by, for example, the following method.

FIGS. 5A, 5B and 5C
FIG. 9 is a process diagram showing the concept of a method for forming the first light reflection film 55.

As shown in FIG. 5A, first, on a semiconductor substrate 1 on which a photoelectric conversion element, a vertical charge transfer path, a horizontal charge transfer path, a protective film and the like have been formed, a base layer 5 is formed after patterning.
6 is formed, and a mask pattern 81 having a predetermined shape is formed thereon. The mask pattern 81 covers above a portion where the base layer 56 is to be formed in plan view.

[0093] As shown in FIG. 5 (B), isotropic dry etching, by a method such as wet etching, the layer 8
0 isotropically etched. As the isotropic etching proceeds, the cross-sectional shape of the layer 80 below the mask pattern 81 becomes trapezoidal.

As shown in FIG. 5C, the etching is further continued to make the sectional shape of the layer 80 below the mask pattern 81 into an isosceles triangle. The underlayer 56 shown in FIGS. 2 and 3 is obtained.

After that, the mask pattern 81 is removed, and the first light reflection film 55 is formed on the surface of the underlayer 56. First
The light reflection film 55 can be formed by combining a film formation method such as a vacuum evaporation method and a sputtering method with a lift-off method, for example. First light reflection film 5
Prior to the formation of the mask 5, a mask is provided on the surface other than the underlayer 56. After the film to be the first light reflection film 55 is formed after the lift-off, the mask formed on the surface other than the underlayer 56 is removed (lift-off) together with the light reflection film deposited thereon. The first light reflection film 55 is obtained.

FIGS. 6 (A), 6 (B) and 6 (C)
FIG. 9 is a process diagram showing another concept of the method of forming the first light reflection film 55.

As shown in FIG. 6A, the photoelectric conversion element
On the semiconductor substrate 1 on which the vertical charge transfer path, the horizontal charge transfer path, the protective film and the like are formed, a layer 85 to be the base layer 56 after patterning and a mask pattern 86 are formed in this order.
An electromagnetic wave E of a predetermined wavelength is irradiated from obliquely above.

The layer 85 is formed of a material such as a positive photoresist or a positive electron beam resist, whose solubility in a solvent (developer) changes by electromagnetic waves such as light and electron beams. The mask pattern 86 corresponds to the underlayer 5 to be formed.
The area from the right side to the outside of the center in the line width direction in 6 is covered in plan view. The electromagnetic wave E is shown in FIG.
In the example shown in FIG. 7, the layer 85 is irradiated from the upper right side. Layer 8
Solvent (developer) in the region irradiated with the electromagnetic wave E among 5
Changes in solubility in In FIG. 6A, this area is hatched to the right.

As shown in FIG. 6B, the mask pattern 86 is removed, a new mask pattern 87 is formed on the layer 85, and the electromagnetic wave E is irradiated obliquely from above.

The mask pattern 87 covers in plan view a region from the slightly left side to the outside of the central portion in the line width direction of the underlayer 56 to be formed. In the example shown in FIG. 6B, the electromagnetic wave E irradiates the layer 85 from diagonally upper left. The solubility of the region of the layer 86 irradiated with the electromagnetic wave E in the solvent (developer) changes. In FIG. 6B, this region is hatched to the right.

By performing the operations shown in FIGS. 6A and 6B, for example, a base layer 56 extending in the photoelectric conversion element column direction can be formed in the layer 85. Similarly, a base layer 56 extending in the row direction of the photoelectric conversion elements is formed in the layer 85.

As shown in FIG. 6C, a region of the layer 85 whose solubility in a solvent (developer) has been changed by the irradiation of the electromagnetic wave E is removed by development to expose the underlayer 56. The underlayer 56 shown in FIGS. 2 and 3 is obtained.

After that, the first light reflecting film 55 is formed on the surface of the underlayer 56 in the same manner as described with reference to FIGS. 5A to 5C.

Next, a solid-state imaging device according to a second embodiment will be described with reference to FIG.

FIG. 7 shows a solid-state imaging device 20 according to this embodiment.
FIG. The solid-state imaging device 200 shown in the figure has two types of micro-reflectors, that is, a first micro-reflector 157 and a second micro-reflector 167, and is largely different from the solid-state imaging device 100 according to the first embodiment. different.

Most of the other components are the same as those of the solid-state imaging device 100 according to the first embodiment. Therefore, among the components shown in FIG. 7, those common to the components shown in FIG. The same reference numerals as those used in No. 2 are assigned, and the description is omitted.

A first underlayer 156 constituting a large number of first micro reflectors 157 is provided above each of the vertical transfer electrodes 22 and 23, and a first light reflecting film 155 is formed on the surface thereof.

The first underlayer 156 differs from the first embodiment in that the first underlayer 156 exhibits an equilateral trapezoidal cross section when cut along either the photoelectric conversion element row direction or the photoelectric conversion element column direction. This is different from the underlayer 56 in the solid-state imaging device 100. Other configurations are the same as those of the underlayer 56. A set of four inclined surfaces defines one rectangular opening above each photoelectric conversion element 10.

The first light reflecting film 155 is formed of the first underlayer 15
6 is formed on each inclined surface, and is not formed on the upper surface. Therefore, the first light reflection films 155 are formed one by one above the individual photoelectric conversion elements 10. Each of the first light reflection films 155 is constituted by four inclined surfaces connected to each other, and these four inclined surfaces constitute a set, and one rectangular opening (above the individual photoelectric conversion element 10). (Light incident portion) 155a. Other configurations are the same as those of the first light reflection film 55 in the solid-state imaging device 100 according to the first embodiment. First light reflection film 155
Each of the four inclined surfaces that are a set in
This is referred to as “first light reflection surface 155b”.

The individual first micro-reflectors 157 are formed on the first underlayer 156 with four inclined surfaces defining a rectangular opening above the photoelectric conversion element 10, and formed on these inclined surfaces. And four first light reflection surfaces 155b. The functional surface of each first micro reflector 157 is constituted by four first light reflecting surfaces 155b.

Each of the first light reflecting surfaces 155b reflects light incident from above the corresponding photoelectric conversion element 10 to the photoelectric conversion element 10 side. These first light reflecting surfaces 15
5b covers the inner edge and the peripheral edge of the corresponding photoelectric conversion element 10 in plan view, and also functions as a light shielding film.

A first planarization layer 158 is formed in each first micro-reflector 157. First planarization layer 15
8 is formed in the same manner as the flat lower layer 58 in the solid-state imaging device 100 according to the first embodiment.

A second underlayer 166 constituting a plurality of second microreflectors 167 is provided above the first underlayer 156 and the first planarization layer 158, and the second light reflection film 165 is formed on the surface thereof. Are formed.

The second underlayer 166 according to the first embodiment has a point that it exhibits an isosceles triangular cross section when cut along any of the photoelectric conversion element row direction and the photoelectric conversion element column direction. Underlayer 5 in solid-state imaging device 100
Different from 6. Other configurations are the same as those of the underlayer 56.

The second underlayer 166 also has a
It has a shape independent of the shape of the underlying layer without inheriting the shape of the underlying layer. Note that the shape of the base may be partially inherited.

The four inclined surfaces of the second underlayer 166 form one set, and define one rectangular opening above each photoelectric conversion element 10.

The second light reflection film 165 has the same configuration as the first light reflection film 55 in the solid-state imaging device 100 according to the first embodiment. A set of four inclined surfaces defines one rectangular opening (light incident part) 165 a above each photoelectric conversion element 10. Second light reflection film 16
Each of the four inclined surfaces forming one set in 5 is referred to as a “second light reflecting surface 165b”.

Each of the second micro-reflectors 167 has four inclined surfaces defining a rectangular opening above the photoelectric conversion element 10 in the first underlayer 156, and is formed on these inclined surfaces. And four second light reflecting surfaces 165b. The functional surface of each second micro reflector 167 is constituted by four second light reflecting surfaces 165b.

Each of the second light reflecting surfaces 165b reflects light incident from above the corresponding photoelectric conversion element 10 to the photoelectric conversion element 10 side. These second light reflecting surfaces 16
5b covers the inner edge and the peripheral edge of the corresponding photoelectric conversion element 10 in plan view, and also functions as a light shielding film.

The second light reflecting surface 165b is the first light reflecting surface 1
It may be formed of a material different from 55b, or may be formed of the same material. Each of the first and second light reflecting surfaces 155b and 165b is preferably a metal surface formed of a metal having a high reflectance, for example, aluminum, nickel, gold, or the like.

A second planarizing layer 167 is formed in each second micro-reflector 167. Second planarization layer 16
7 is the same material as the first planarization layer 158, or
Is preferably formed of a material having a refractive index equal to or close to the refractive index of the flattening layer 158.

The color filter array 60 is formed on the second flattening layer 167. The tops of the individual second micro-reflectors 167 (the tops of the second light reflecting films 165) protrude from the surface of the color filter array 60.

The solid-state imaging device 200 having the above-described configuration
In the same manner as in the solid-state imaging device 100 according to the first embodiment, the first light reflecting surface 155b and the second light reflecting surface 16
By selecting the respective inclination angles, the light traveling outside the photoelectric conversion element 10 can also be transmitted to the second micro-reflector 167.
(The second light reflecting surface 165b) or the first micro reflector 157
The light can be reflected by the (first light reflecting surface 155b) and incident on the photoelectric conversion element 10. Individual photoelectric conversion element 1
The light use efficiency at 0 can be improved.

The first underlayer 156 having an equilateral trapezoidal cross section is easier to form than an underlayer having an isosceles triangle cross section. The second underlayer 166 has an isosceles triangular cross-sectional shape, and its height is the same as that of the underlayer 5 in the solid-state imaging device 100 according to the first embodiment.
Lower than 6. For this reason, the second underlayer 166 is easier to form than the underlayer 56 in the solid-state imaging device 100.

Next, a solid-state imaging device according to a third embodiment will be described with reference to FIG.

FIG. 8 shows a solid-state image sensor 30 according to this embodiment.
FIG. The solid-state imaging device 300 shown in FIG. 11 is different from the solid-state imaging device 300 according to the first embodiment in that, when a cross section in the line width direction of the vertical charge transfer channel 21 is taken, its surface is raised in an inverted V-shape. It is significantly different from the image sensor 100.

Since many other components are the same as those of the solid-state image pickup device 100 according to the first embodiment, among the components shown in FIG. 7, those common to the components shown in FIG. The same reference numerals as those used in No. 2 are assigned, and the description is omitted.

As the surface of the vertical charge transfer channel 21 rises in an inverted V-shape, the vertical transfer electrodes 22 and 23 and the first to third auxiliary transfer electrodes 26 above the vertical charge transfer channel 21 are formed. The cross-sectional shapes in the line width direction of No. to No. 29 are inverted V-shaped. However, only the vertical transfer electrodes 23 are visible in FIG.

Electrical insulating films 15, 50 and protective film 51
Also include an inverted V-shaped region reflecting the shape of the layer below it.

The underlayer 56 as a whole has a shape independent of the shape of the underlayer without inheriting the shape of the underlying layer. Note that the shape of the base may be partially inherited.

In the solid-state imaging device 300 as well, for the same reason as in the solid-state imaging device 100 according to the first embodiment, the light use efficiency of each photoelectric conversion element 10 can be improved.

Further, by setting the cross-sectional shape of the vertical charge transfer channel 21 to the above-mentioned shape, the cross-sectional area when the line width is constant can be reduced.
It becomes possible to make it wider than 0. It is possible to increase the amount of charge stored in each of the vertical charge transfer stages constituting the vertical charge transfer path 20. Even when the degree of integration of the photoelectric conversion element 10 is increased, it is possible to suppress a decrease in transfer efficiency due to the development of the narrow channel effect.

In manufacturing the solid-state imaging device 300 shown in FIG. 8, first, a raised portion having a cross section in the width direction having an isosceles triangular shape is formed in a portion of the semiconductor substrate 1 where the vertical charge transfer channel 21 is to be formed. Are formed in a linear or band shape. This raised portion can be formed, for example, by applying the method shown in FIG.

Thereafter, the vertical charge transfer channel 21, the horizontal charge transfer channel 31, the channel stop region 1
3. After the electrical insulating film 15, the vertical transfer electrodes 22 to 23 and the horizontal transfer electrodes 32a to 32d, and the electrical insulating film 50 are sequentially formed, the photoelectric conversion element 10 is formed.

Thereafter, a protective layer 51, a base layer 56, a first light reflection film 55, a first planarizing layer 58, a color filter array 60, a second planarizing layer 62, and a microlens array 65 are sequentially formed. . Thereby, the solid-state imaging device 300
Is obtained.

As described above, the solid-state imaging devices according to the embodiments have been described, but the present invention is not limited to these solid-state imaging devices.

For example, in the solid-state imaging device according to the embodiment,
Although the light reflecting film constituting the functional surface (light reflecting surface) of the micro-reflector is formed of a metal, the light reflecting film may be formed of a dielectric multilayer film. In the light reflecting film formed by the dielectric multilayer film, each of the interfaces between the layers constituting the dielectric multilayer film cooperate with each other to form one light reflecting surface.

Further, a light reflecting film can be formed by providing a dielectric film having a relatively high refractive index on a dielectric layer having a relatively low refractive index. The low-refractive-index dielectric layer need not be in the form of a thin film. In this light reflection film, light is guided to the photoelectric conversion element side by using total reflection generated at an interface between a dielectric film having a high refractive index and a dielectric layer having a low refractive index.

When, for example, a silicon nitride film is selected as the high refractive index dielectric film, for example, a silicon oxide film can be used as the low refractive index dielectric layer. The light reflecting surface of the light reflecting film is an interface between the high refractive index dielectric film and the low refractive index dielectric layer.

The functional surface of the micro-reflector may be formed by a single light reflecting surface having a curved surface, in addition to being formed by a plurality of light reflecting surfaces as in each solid-state imaging device according to the embodiment. The micro-reflector in which the functional surface is formed by one curved surface defines, for example, a circular or elliptical opening (light incident portion) above the corresponding photoelectric conversion element.

In the solid-state imaging device according to the embodiment, the top of the first micro-reflector (top of the first light reflection film) or the top of the second micro-reflector (top of the second light reflection film) is the second. 2, but their tops may be in the color filter array or may be in contact with the lower surface of the color filter array. Furthermore, it may be below the color filter array.

However, from the viewpoint of improving the light use efficiency of each photoelectric conversion element, the top of the first micro-reflector (the top of the first light reflection film) or the top of the second micro-reflector (second top). (The top of the light reflecting film) and the lower surface of the microlens array are preferably as close as possible.

The tops can be located in the microlens array, or can project from the microlens array.

It is also possible to form three or more micro-reflectors on top of individual photoelectric conversion elements. It is also possible to form an inner lens above each photoelectric conversion element.

Each of the solid-state imaging devices according to the embodiments has a microlens array, but the microlens array can be omitted. Further, in the solid-state imaging device for monochrome imaging, the color filter array is omitted, or a color filter array including a single color filter such as green or blue is provided.

The semiconductor substrate on which the photoelectric conversion elements and the like are formed has a p-type impurity region formed on one surface side of the n-type semiconductor substrate, and a p ^- type semiconductor epitaxial growth layer on one surface of the n-type semiconductor substrate. May be formed. Further, a semiconductor layer of a desired conductivity type is formed on a surface of the electrically insulating substrate, and an impurity region of a desired conductivity type is formed on the semiconductor layer, or a semiconductor layer of a desired conductivity type is formed on the semiconductor layer. It may be one in which an epitaxial growth layer is formed.

In this specification, a semiconductor substrate for forming a photoelectric conversion element, a charge transfer channel, or the like on one surface of a substrate made of a material other than a semiconductor is also included in the “semiconductor substrate”. I do.

Each of the solid-state imaging devices according to the embodiments is of a type that transfers electrons as electric charges, but it is also possible to configure a solid-state imaging device that transfers holes as electric charges. In that case, the conductivity type of each region may be reversed between p-type and n-type.

The shape of the photoelectric conversion element (impurity region functioning as a charge storage region) in a plan view is a rectangle (including a rhombus), a pentagon or more polygon in which all the interior angles are obtuse, and an acute angle to the interior angle. And pentagonal or more polygons including an angle and an obtuse angle, and shapes in which these corners are rounded can be appropriately selected.

A large number of photoelectric conversion elements may be arranged with pixels shifted. The “pixel shift arrangement” in this specification is
The following arrangement is meant.

That is, for each photoelectric conversion element of the odd-numbered photoelectric conversion element row, each of the even-numbered photoelectric conversion element rows is about one pitch of the photoelectric conversion elements in the photoelectric conversion element row. / 2, shifted in the column direction, and for each photoelectric conversion element of the odd-numbered photoelectric conversion element row,
Each of the photoelectric conversion elements in the even-numbered photoelectric conversion element rows has a pitch of about one of the photoelectric conversion elements in the photoelectric conversion element row.
/ 2, which means an arrangement of a large number of photoelectric conversion elements such that each of the photoelectric conversion element columns includes only odd-numbered rows or even-numbered rows of photoelectric conversion elements. "Pixel shift arrangement"
Is an embodiment of a large number of photoelectric conversion elements formed in a matrix over a plurality of rows and a plurality of columns.

The above-mentioned “approximately の of the pitch of the photoelectric conversion elements in the photoelectric conversion element row” includes not only １ ／ but also a manufacturing error, a rounding error of a pixel position which occurs in designing or mask manufacturing, or the like. Although the value deviates from に よ っ て due to the factors described above, the value includes a value which can be regarded as substantially equivalent to て from the viewpoint of the performance of the obtained solid-state imaging device and the image quality of the image. The same applies to the above “about 約 of the pitch of the photoelectric conversion elements in the photoelectric conversion element row”.

The shape of the vertical charge transfer channel in a plan view depends on the shape of each photoelectric conversion element in a plan view, the arrangement specification of a large number of photoelectric conversion elements, the performance of a target solid-state imaging device, and the like. A linear shape, a meandering shape, and the like can be appropriately selected. Even when a large number of photoelectric conversion elements are arranged with pixels shifted, the vertical charge transfer channel can be formed linearly.

From the same viewpoint, the shapes of the vertical transfer electrodes and the auxiliary transfer electrodes in plan view can be appropriately selected.

Each of the solid-state imaging devices according to the embodiments can be used as an area sensor. However, if the number of photoelectric conversion element arrays is set to about 1 to 4, a line sensor (linear sensor) can be used. It can also be used as an image sensor). In that case, it is possible to omit the horizontal charge transfer path and connect the output section to the downstream end of the vertical charge transfer path. In this case, the charge transfer path may be constituted by a two-phase drive type CCD.

Note that the phrase “a large number of photoelectric conversion elements are formed in a matrix” in this specification includes a case where a large number of photoelectric conversion elements are formed in a large number of rows and a single column.

Auxiliary transfer electrodes provided in each of the solid-state imaging devices according to the embodiments can be omitted. CC capable of accumulating charges for one frame between the most downstream photoelectric conversion element row and the horizontal charge transfer path
A D storage unit may be provided.

The driving of the vertical charge transfer path is not only four-phase driving but also
Three-phase drive, eight-phase drive, and the like can be appropriately changed. The scanning method is also interlaced scanning, progressive scanning,
It is possible to appropriately select 引 き thinning-out scanning or the like.

According to the scanning method or driving method to be applied, the number of required vertical transfer electrodes per one photoelectric conversion element row differs from, for example, two to four. Therefore,
The number of vertical transfer electrodes to be provided per one photoelectric conversion element row can be appropriately changed according to the arrangement specifications of the photoelectric conversion element rows, the driving method of the vertical charge transfer path, and the like.

A vertical overflow drain structure can be provided. Accordingly, an electronic shutter function can be provided. In order to provide a vertical overflow drain structure, for example, a structure capable of applying a reverse bias to the p-type impurity region and the n-type semiconductor substrate thereunder is added. Instead of the vertical overflow drain structure, a horizontal overflow drain structure may be additionally provided. By providing a vertical or horizontal overflow drain structure, blooming can be easily suppressed.

Further, the solid-state image pickup devices according to the embodiments are all CCD type solid-state image pickup devices. However, the micro-reflector shown in these embodiments may be provided in a MOS type solid-state image pickup device.

In the MOS type solid-state imaging device, about one to four transistors are attached to one photoelectric conversion element, and about one or two signal lines are connected to each of these transistors. It is preferable that these transistors and signal lines are covered in plan view by a light reflecting surface constituting each minute reflector.

By providing a micro-reflector in the MOS type solid-state imaging device, the light use efficiency of each photoelectric conversion element can be improved.

It will be apparent to those skilled in the art that various changes, improvements, combinations, and the like can be made.

[0165]

As described above, according to the present invention,
It is possible to increase the light use efficiency of each photoelectric conversion element in the solid-state imaging device. It is possible to obtain a solid-state imaging device having high sensitivity and high resolution.

[Brief description of the drawings]

FIG. 1 is a plan view schematically showing a solid-state imaging device according to a first embodiment.

FIG. 2 is a schematic view of a cross section taken along line AA shown in FIG.

FIG. 3 is a schematic diagram of a cross section taken along line BB shown in FIG.

FIG. 4 is a schematic diagram for explaining a relationship between an angle of inclination of a light reflecting surface and reflected light.

FIGS. 5A to 5C are process diagrams showing the concept of a method for forming a light reflecting film.

FIGS. 6A to 6C are process diagrams showing another concept of a method of forming a light reflecting film.

FIG. 7 is a sectional view schematically showing a solid-state imaging device according to a second embodiment.

FIG. 8 is a sectional view schematically showing a solid-state imaging device according to a third embodiment.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate, 10 ... Photoelectric conversion element, 20 ... Vertical charge transfer channel, 21 ... Vertical charge transfer channel, 22,
23: vertical transfer electrode, 24: readout gate, 30: horizontal charge transfer path, 31: horizontal charge transfer channel, 32a
32d: horizontal transfer electrode, 40: output section, 51: protective film, 55, 155: first light reflection film, 55b, 1
55b: first light reflecting surface, 57, 157: first micro reflector, 60: color filter array, 65: micro lens array, 100, 200, 300: solid-state image sensor,
165: second light reflecting film, 165b: second light reflecting surface,
167: Second micro reflector.

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4M118 AA01 AB01 BA13 CA04 DB08 FA06 FA08 GA08 GB08 GC08 GC14 GD04 GD07 5C024 CX41 CY47 EX41 GY01 5F088 DA01 DA17 GA03 JA11 JA12

Claims (5)

[Claims] A semiconductor substrate; a plurality of photoelectric conversion elements formed in a matrix on one surface side of the semiconductor substrate; and a plurality of photoelectric conversion elements disposed one above each of the plurality of photoelectric conversion elements. 1 micro-reflectors, each having at least one first light reflecting surface for reflecting light incident from above the corresponding photoelectric conversion element to the photoelectric conversion element side, A solid state imaging device comprising: a first micro-reflector defining an opening above. 2. The solid-state imaging device according to claim 1, wherein the first light reflecting surface is a metal surface. 3. An inclination angle of the first light reflecting surface when the surface of the semiconductor substrate is regarded as a horizontal plane is 65 ° or more and 90 ° or more.
The solid-state imaging device according to claim 1 or 2, wherein the angle is less than 0 °. 4. A second micro-reflector disposed one above each of said first micro-reflectors, each of which receives light incident from above a corresponding photoelectric conversion element. 4. The device according to claim 1, further comprising a second micro-reflector having at least one second light reflecting surface for reflecting light toward the conversion element and defining an opening above the corresponding photoelectric conversion element. 2. The solid-state imaging device according to claim 1. 5. The method according to claim 1, wherein the plurality of photoelectric conversion elements include a plurality of rows,
A plurality of vertical charge transfer channels formed on the semiconductor substrate in proximity to the photoelectric conversion element row, one for each photoelectric conversion element row, A plurality of vertical transfer electrodes formed on the semiconductor substrate with an electrical insulating film interposed therebetween and arranged in the column direction of the photoelectric conversion elements and extending in the row direction of the photoelectric conversion elements; A plurality of vertical transfer electrodes constituting a vertical charge transfer stage by covering one region of each channel in plan view, wherein the first light reflecting surface in each of the first micro reflectors is the 5. A part of the vertical transfer electrode adjacent to the photoelectric conversion element to be changed.
The solid-state imaging device according to any one of the above.