JP2002072952A - Signal detention circuit and picture display device using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the latch up in a reception drive circuit control IC at the time of applying a DC power voltage. SOLUTION: This signal detection circuit comprises a signal input part 9 for detecting an input signal and/or a noise voltage level, a voltage detector 8 for detecting an output voltage level from the signal input part even when the power voltage is not applied, and a transistor array of a PNP transistor Tr1, an NPN transistor Tr2, and an NPN transistor Tr3 for controlling ON/ OFF of the power voltage based on the 'Enable' signal presenting that an output signal from a terminal OUT of the voltage detector 8 and a DC-DC converter circuit 4 is in operation.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a DC-DC converter for converting a DC power supply voltage supplied from the outside into a voltage which is supplied to a driving circuit of a display unit as a driving voltage. The present invention relates to a signal detection circuit for performing display using a display control signal and a display data signal, and an image display device using the same.

[0002]

2. Description of the Related Art In a liquid crystal display device as an image display device,
When the power supply voltage is supplied, when the power supply voltage is further applied while the internal logic control voltage of the liquid crystal display device is rising, a superimposed DC voltage is supplied, and excess current flows into each circuit. Therefore, there is a possibility that an element such as an IC may be destroyed. JP-A-7-1819
No. 13 discloses a configuration in which power supply voltage is supplied to a drive control IC and a driver IC and a timing of control signal input is adjusted in order to prevent latch-up of a driver IC for driving a liquid crystal panel in a drive circuit. .

[0003]

However, the driving circuit in the liquid crystal display device disclosed in Japanese Patent Application Laid-Open No. Hei 7-181913 prevents the latch-up to the driver IC by the timing control during a predetermined period. However, it cannot deal with abnormal signals, noise, and fluctuations in power supply voltage from outside the liquid crystal display device.

An object of the present invention is to solve such a problem, and an object of the present invention is to provide a display control signal and a display data signal supplied directly from the outside of an image display device and a power supply voltage supplied directly from the outside. Use of a signal detection circuit that prevents latch-up against unexpected fluctuations such as malfunctions in timing adjustment at the time of supply, abnormal external noise, instantaneous drop and rise of external power supply voltage, and the use thereof. To provide an image display device.

[0005]

SUMMARY OF THE INVENTION A signal detection circuit according to the present invention is a signal detection circuit for driving voltage conversion means for converting an applied power supply voltage.
A signal input unit for detecting a voltage level of noise, a voltage detection unit for detecting an output voltage level from the signal input unit even when a power supply voltage is not applied, a first output signal from the voltage detection unit, The power supply voltage is turned on based on a second output signal indicating that the voltage conversion means is operating.
/ OFF controlling switching means.

When a signal and / or noise is input to the signal input section before the power supply voltage is applied, the switching means is turned off to stop the operation of the voltage conversion means. Alternatively, when a signal and / or noise is input to the signal input unit after the power supply voltage is applied, the voltage conversion unit is driven by turning on the switching unit.

When the voltage level of the power supply voltage decreases during the operation of the voltage conversion means, and if a signal and / or noise is input to the signal input section, the switching means uses only the second output signal. ON / OFF of the power supply voltage
OFF control is performed.

When the voltage level of the power supply voltage decreases during the operation of the voltage conversion means, and a signal and / or noise is input to the signal input section, the switching means performs only the second output signal. ON / OFF of the power supply voltage
OFF control is performed.

An image display device according to the present invention includes a display unit, a driving circuit for driving the display unit based on an input signal,
A signal conversion unit for converting a power supply voltage to be applied, and a signal detection circuit for driving the voltage conversion unit, wherein the signal detection circuit detects a voltage level of a signal and / or noise to be input; A voltage detection unit for detecting an output voltage level from the signal input unit even when the power supply voltage is not applied, and a first output signal from the voltage detection unit and that the voltage conversion unit is operating. Switching means for controlling ON / OFF of the power supply voltage based on the second output signal shown.

[0010]

Embodiments of the present invention will be described below with reference to the drawings. The embodiment of the image display device of the present invention will be described using a liquid crystal display device.

FIG. 1 is a block diagram of a liquid crystal display device according to an embodiment of the present invention. The liquid crystal display device shown in FIG.
A display unit (liquid crystal panel) 1 for displaying an image, and a drive circuit 2 for supplying scanning and signal voltages to the display unit (liquid crystal panel) 1 are provided. The drive circuit 2 supplies the drive circuit 2 with a plurality of bias voltages (VDD, VDD) as drive voltages based on a DC power supply voltage VDD which is a power supply voltage supplied from an external device for information processing via a signal cable.
Vss, etc.), a DC-DC converter circuit 4 which is a voltage conversion means for supplying a logic voltage (Vcc, GND) and the like.
Are connected, and the DC-DC converter circuit 4
-Controlled by a control signal (CNT) output from the DC converter control IC3. The DC-DC converter control IC 3 is supplied with a DC power supply voltage VDD from a power supply voltage supplied from the outside. The drive circuit 2 controls the drive circuit 2 based on a display control signal and a display data signal, which are external input signals provided from a data processing external device via a signal cable (not shown) and a connection connector 7. A reception driving circuit control IC 5 as a control means, and a signal detection circuit 6 for detecting a signal input irrespective of whether a power supply voltage is externally supplied or not.
And are connected.

FIG. 2 is a circuit diagram of a signal detection circuit 6 provided inside a liquid crystal display device, which is an image display device of the present invention, for detecting a signal input regardless of whether a power supply voltage is supplied or not. .

The signal detection circuit 6 converts a signal input to an input terminal of the signal input section 9 into a reception driving circuit control IC.
5 as it is, and is a composite circuit having a diode D1 connected to the input terminal of the signal input unit 9, a resistor R1 and a capacitor C1 connected in parallel between the diode D1 and ground (GND). One anode (A) terminal of the diode D1 is connected to the signal input unit 9.
And the other cathode (K) terminal is connected to a connection point of the capacitor C1 and the resistor R1.

A connection point between the capacitor C1 and the resistor R1 to which the cathode (K) terminal of the diode D1 is connected is connected to a VDD terminal 8a of a voltage detector 8 (for example, S-80725AH manufactured by Seiko Instruments Inc.). I have. An OUT terminal 8b of the voltage detector 8 is connected to a power supply voltage terminal VD via resistors R2 and R3 connected in series.
D. Vss terminal 8c of voltage detector 8
Is connected to ground (GND). The OUT terminal 8b of the voltage detector 8 is connected to the NPN through a resistor R4.
It is connected to the base terminal of transistor Tr2. N
The collector terminal of the PN transistor Tr2 is connected to the base terminal of the PNP transistor Tr1.
The emitter terminal of the transistor Tr2 is connected to the ground (GND) via the resistor R5. The PNP transistor Tr1 has an emitter terminal connected to a connection point between the resistors R2 and R3, and a collector terminal connected to the base terminal of the NPN transistor Tr3 via a resistor R6. The NPN transistor Tr3 has a collector terminal connected to the power supply voltage terminal VDD via the resistor R7, and an emitter terminal connected to the DC-DC converter control IC3 via the resistor R8. The DC-DC converter control IC3 converts the control signal (CNT) into a DC-
The voltage is transferred to the DC converter circuit 4, and the output voltage (ENB signal) from the DC-DC converter circuit 4 is input to the base terminal of the NPN transistor Tr3.

FIG. 3 is a flowchart showing the operation procedure of the signal detection circuit 6. The operation of the signal detection circuit 6 shown in FIG. 2 will be described based on this flowchart.

The signal detection circuit 6 shown in FIG. 2 is configured such that the signal detection circuit 6 supplies a power supply voltage VD to a liquid crystal display device as an image display device.
Before D is applied, the receiving drive circuit control IC 5
When a display control signal and / or a display data signal, unnecessary noise, and the like are input to the signal detection circuit 6, the signal input unit 9 of the signal detection circuit 6 applies the display control signal and / or A display data signal, unnecessary noise, or the like is detected, and the supply of power supply voltage to the DC-DC converter control IC 3 is cut off.
Enable to DC converter control IC3
DC-DC converter control I by OFF signal
C3 is held in a stopped state.

If a signal and noise are input to the signal input section 9 before the power supply voltage is applied to the image display device (step S1), the signal detection circuit 6 performs a latch-up phenomenon preventing operation. . In this case, the capacitor C1 is charged with the electric charge via the diode D1, the High level voltage is input to the VDD terminal 8a of the voltage detector 8, and the OUT terminal 8b of the voltage detector 8 is set to Lo.
The voltage becomes the w-level voltage (step S2). In this state, the power supply voltage VDD is applied to the signal detection circuit 6 (Step S)
3). In this case, the base terminal of the NPN transistor Tr2 has a Low level voltage, and there is no voltage difference between the base and the emitter terminal, so that the NPN transistor Tr2 is in the OFF state. Further, since the NPN transistor Tr2 is in the OFF state, the PNP transistor Tr1 and the NPN transistor Tr3 do not generate a voltage difference between the base and the emitter, and are turned off similarly to the NPN transistor Tr2 (Step S4). Therefore, the power supply voltage VDD is not applied to the DC-DC converter control IC3. Therefore, the DC-DC converter circuit 4 holds the stopped state, and the power supply voltage is not applied to the reception drive circuit control IC 5.

As a result, the power supply voltage VDD is applied to the image display device.
When a signal and a noise are input to the signal input unit before the power supply voltage VDD is applied, a latch-up phenomenon caused by applying the power supply voltage VDD is prevented. In this state, the input of the signal and the noise is stopped (step S5), and the signal detection circuit 6 is normally operated by applying the power supply voltage again (step S6). When the input of the signal and the noise is stopped, the electric charge charged in the capacitor C1 is changed to the resistance R1.
Is discharged through the gate to the initial state.

The signal detection circuit 6 is connected to the power supply voltage VDD during the return from the latch-up phenomenon prevention state and the normal operation.
Is applied to the signal input prior to the input of the signal and / or noise. When the power supply voltage VDD is applied (step S6), since no signal or noise is input to the signal input unit, no charge is charged in the capacitor C1 via the diode D1. Therefore, the High level voltage is not applied to the VDD terminal 8b of the voltage detector 8, and the OUT terminal 8b of the voltage detector 8 is almost at Hi-level.
The state becomes a Z (high impedance) state. Here, Table 1 shows a truth table of the voltage detector 8.

[0020]

[Table 1] When the output terminal 8b of the voltage detector is in the Hi-Z (high impedance) state, a voltage difference is generated between the base and the emitter terminal of the NPN transistor Tr2 when the power supply voltage VDD is applied, so that the NPN transistor Tr2 is in the ON state. Similarly, the PNP transistor Tr1 and the NPN transistor Tr3 are turned on (step S7). Then, the power supply voltage VDD is supplied to the DC-DC converter control IC 3 (step S8),
The DC-DC converter circuit 4 is also activated, and the Enab1e signal (ENB signal), which is the output voltage, is supplied to the base terminal of the NPN transistor TR3, and the NPN transistor Tr3 continues to operate (step S9). Then, the power supply voltage VD is supplied to the reception drive circuit control IC5.
D is applied, and the drive circuit 2 enters an operating state.

Thereafter, a signal and / or noise is input to the signal input section 9 of the signal detection circuit 6 (step S1).
0), when electric charge is charged in the capacitor C1 via the diode D1, a high level is applied to the VDD terminal 8a of the voltage detector 8.
h level voltage is applied, and the OUT terminal 8 of the voltage detector 8
b becomes the Low level voltage. As a result, the NPN transistor Tr2 and the PNP transistor Tr1
Although the state becomes the FF state, the NPN transistor Tr3
-Since the output voltage from the DC converter circuit 4 is input to the base terminal, a voltage difference is generated between the base and the emitter terminal.
Output of the nab1e signal is continued (step S11).
Then, as the power supply voltage VDD is continuously applied to the DC-DC converter control IC 3, the normal operation state of the drive circuit 2 having the signal detection circuit 6 is continued (step S12). When the application of the power supply voltage VDD and the signal to the signal input unit 9 is stopped (operation OFF),
The electric charge charged in the capacitor C1 is discharged through the resistor R1 to be in an initial state.

Here, when a momentary change occurs in the power supply voltage VDD, the VDD drops rapidly, and the voltage drop of the VDD causes a state in which only the minimum operating voltage or less is applied to the NPN transistor Tr3 (step S13).
The operation of the PN transistor Tr3 stops, and the output of the Enab1e signal, which is the output voltage from the DC-DC converter circuit 4, also stops (step S14). In this state,
The signal and / or noise input to the signal input unit 9 is O
After the FF is turned on (step S5), the signal detection circuit 6 operates normally by applying the power supply voltage again.

If the power supply voltage applied to the NPN transistor Tr3 due to the voltage drop of VDD satisfies the minimum operation voltage, the operation of the NPN transistor Tr3 continues, and the output voltage from the DC-DC converter circuit 4 is E.
Since the output of the nab1e signal is also continued, the normal operation can be restored. Furthermore, if the instantaneous change of the power supply voltage VDD sharply increases, the current flowing through the resistor R8 connected to the emitter terminal of the NPN transistor Tr3 increases instantaneously, but the DC-DC converter control IC
3 is controlled. Then, D is controlled by a control signal (CNT) from the DC-DC converter control IC3.
Ena which is an output voltage from the C-DC converter circuit 4
The output of the b1e signal continues.

In the embodiment of the present invention, a liquid crystal display device using a liquid crystal panel has been described as an example.
The present invention can be applied to all electronic displays in which a liquid crystal panel is a flat panel (flat display). This is effective for a display device such as an electronic display including a DC-DC converter in which the input timings of a power supply voltage applied to the device and a signal or the like do not always match.

[0025]

As described above, the signal detection circuit of the present invention and the image display device using the same have the signal input section for detecting the voltage level of the input signal and / or noise, and the power supply voltage is not applied. A voltage detector for detecting an output voltage level from the signal input unit even in the state, and an OU for the voltage detector.
A transistor array of a PNP transistor Tr1, an NPN transistor Tr2 and an NPN transistor Tr3 for controlling ON / OFF of a power supply voltage based on an output signal from a T terminal and an Enab1e signal indicating that the DC-DC converter circuit is operating. When a display control signal, a display data signal, and unnecessary noise are flowing into the reception drive circuit control IC before the power supply voltage is applied, the signal is output even when the power supply voltage is not applied. A detection circuit detects the signal and the noise, and turns on / off a voltage transmission path to the DC-DC converter control IC based on the voltage level of the signal and the noise. Input signal and / or abnormal noise If and Nde, and, to variations from unexpected external instantaneous change (rise or fall), and the power supply voltage, thereby preventing the latch-up phenomenon.

[Brief description of the drawings]

FIG. 1 is a block diagram of an image display device according to an embodiment of the present invention.

FIG. 2 is a circuit diagram of a signal detection circuit provided inside the image display device of the present invention.

FIG. 3 is a flowchart showing an operation procedure of the signal detection circuit of the present invention.

[Explanation of symbols]

 Reference Signs List 1 liquid crystal panel 2 drive circuit 3 DC-DC converter control IC 4 DC-DC converter circuit 5 reception drive circuit control IC 6 signal detection circuit 7 connection connector 8 voltage detector 8a VDD terminal 8b OUT terminal 8c Vss terminal 9 signal input section

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (reference) H04N 5/63 H04N 5/63 B 5/66 102 5/66 102Z F term (reference) 2H093 NC05 NC07 NC58 ND40 5C006 AF65 AF78 BB11 BF42 BF44 FA33 5C026 EA09 5C058 AA06 BA35 BB25 5C080 AA10 BB05 DD18 DD19 JJ02 JJ03 JJ07

Claims (4)

[Claims] 1. A signal detection circuit for driving voltage conversion means for converting an applied power supply voltage, comprising: a signal input section for detecting a voltage level of an input signal and / or noise; A voltage detection unit that detects an output voltage level from the signal input unit even when the voltage conversion unit is not in operation, based on a first output signal from the voltage detection unit and a second output signal indicating that the voltage conversion unit is operating. And a switching means for controlling ON / OFF of the power supply voltage. 2. When a signal and / or noise is input to the signal input unit before the power supply voltage is applied, the operation of the voltage conversion unit is stopped by turning off the switching unit. Or when a signal and / or noise is input to the signal input unit after the power supply voltage is applied, the switching means is turned on to drive the voltage conversion means. 3. The signal detection circuit according to 1. 3. When the voltage level of the power supply voltage decreases during operation of the voltage conversion unit, and when a signal and / or noise is input to the signal input unit, the switching unit outputs the second output signal. ON only for the power supply voltage
The signal detection circuit according to claim 1, which performs / OFF control. 4. A display unit, a drive circuit for driving the display unit based on an input signal, a voltage conversion unit for converting an applied power supply voltage, and a signal detection circuit for driving the voltage conversion unit A signal input unit for detecting a voltage level of a signal and / or noise input to the signal detection circuit; and a voltage for detecting an output voltage level from the signal input unit even when a power supply voltage is not applied. A detection unit; and a switching unit that controls ON / OFF of a power supply voltage based on a first output signal from the voltage detection unit and a second output signal indicating that the voltage conversion unit is operating. An image display device characterized by the above-mentioned.