JP2002057364A - Method for manufacturing avalanche photodiode - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the characteristics an element which is low due to the crystallinity in a multiplication layer. SOLUTION: This method has steps comprising a step of sequentially forming a multiplying layer and an optical absorption layer on a first substrate, via an etching stopper layer to epitaxially grow the multiplying layer and the optical absorption layer; a step of removing the first substrate; a step of forming a second substrate on the optical absorption layer, on the opposite side to a side in which the first substrate is removed; and a step of carrying out ion implantation from a side, in which the first substrate is removed, to form a guard ring.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an avalanche photodiode, and more particularly to a method for manufacturing a planar avalanche photodiode in which a multiplication layer has high crystallinity and a low multiplication dark current. It is about.

[0002]

2. Description of the Related Art FIG. 4 is a view for explaining a conventional semiconductor light receiving element (avalanche photodiode). A semiconductor light receiving element was manufactured by the following steps. p ⁺
A p ⁺ -type InP buffer layer 12 having a thickness of 0.5 to 1 μm on a p-type InP substrate 11 and a p ⁺ type InP buffer layer 12 having a carrier concentration of 2 × 10 ¹⁵ cm ⁻³ .
-Type InGaAs light absorbing layer 13 is 1-1.5 μm thick,
The p ⁺ -type InP electric field relaxation layer 14 having a carrier concentration of 0.5 to 1 × 10 ¹⁸ cm ⁻³ is formed to a thickness of 0.1 to 0.05 μm (p ⁺ -type InP
Non-doped i depending on the carrier concentration of the electric field relaxation layer 14)
Type or carrier concentration to 2 × 10 ¹⁵ cm ^-3 or less of n ^- type the InAlGaAs / InAlAs superlattice multiplication layer 15 to 0.23μm thickness, n the carrier concentration ~1 × 10 ¹⁸ cm ^{-3
The +} type InAlAs (or InP) cap layer 16 is formed to a thickness of 0.5 μm and has an n ⁺ of a carrier concentration of 1 × 10 ¹⁹ cm ⁻³ .
The type InGaAs contact layer 17 is sequentially grown to a thickness of 0.1 μm by using a gas source molecular beam epitaxy (gas source MBE).

Next, using a circular SiN film having a diameter of 30 μm as a mask, a carrier concentration of 10 ¹⁸ to 10 ¹⁹ around the mask.
A p ⁺ -type conductive region of the order of cm ⁻³ is formed by a normal Zn selective thermal diffusion technique. The diffusion depth is at least the depth of the p ⁺ -type InP electric field relaxation layer 14 or more from the surface, usually the p ⁺ -type InP
It is a value until the buffer layer 12 is reached.

Next, the n ⁺ -type InGaAs contact layer 17 is etched away at the boundary between the p ⁺ -type region and the circular n ⁺ region not diffused into a ring concentric circle having a width of several μm. Further, oxygen ions (O ⁺ ) or protons (H ⁺ ), iron (Fe ⁺ ), titanium (Ti), or the like until the concentric circle reaches the superlattice multiplication layer (that is, in the InAlAs layer 16 in the boundary region). Alternatively, cobalt (Co) is ion-implanted (after the implantation, annealing is performed at an appropriate temperature to activate the ions, or the ions may not be activated) to form the high resistance region 113.

A passivation film 11 is formed on the wafer surface.
2. The n-side electrode 18 is formed of AuGeNi. Next, the p ⁺ -type InP buffer layer 12 has a depth in a region other than the light receiving region.
Is performed, and a p-side electrode 19 is formed of AuZn on the etched surface. Finally, after the back surface is polished, the anti-reflection film 111 is formed of a SiN film.

[0006]

With the current technology, it is impossible to produce an epitaxial layer having perfect crystallinity, and imperfections such as crystal defects, crystal dislocations, distortions, and impurity deep levels will inevitably occur. It is also clear that when precise crystal production on the angstrom scale, such as a superlattice structure, is required for the multiplication layer, further crystal perfection is required for the underlayer, including flatness. In general, as the film is formed on the substrate and the distance from the substrate increases, the flatness of the surface becomes poor. In order to increase the precision of the crystallinity of the multiplication layer, it is desirable to flatten the lower surface of the multiplication layer. Therefore, it is desirable to form and grow the multiplication layer on the side as close to the substrate as possible.

In a conventional method of manufacturing a planar avalanche photodiode, a multiplication layer must be formed on the surface side and an n-type or insulating ion implantation must be performed to form a guard ring. It had to be formed after the light absorbing layer. That is, the multiplication layer is a light absorption layer,
Because it is necessary to provide on the electrolytic relaxation layer, first 1-3μ
After growing about m light absorbing layers, a multiplication layer must be grown. For this reason, the flatness of the lower surface of the multiplication layer is poor, which leads to imperfect crystallinity of the multiplication layer.

In particular, the imperfection in the multiplication layer, which multiplies carriers by applying a high electric field strength, is caused by a dark current flowing between the light absorption layer and the superlattice layer even though no light is incident. This causes factors such as a decrease in element characteristics such as an increase and a decrease in element yield.

The present invention has been made to solve these problems, and an object of the present invention is to provide a method for manufacturing a planar avalanche photodiode in which the crystallinity of a multiplication layer is high.

An avalanche photodiode that multiplies electrons has a structure in which a light absorption layer is provided on the p-electrode side and a multiplication layer is provided on the n-electrode side. In order to obtain a planar structure, the multiplication layer (n-electrode) needs to be disposed on the surface side as described above. Therefore, the simplest method is to take the p-electrode from the back of the substrate via the p-type substrate,
Considering the connection with the next-stage preamplifier (not shown), an arrangement that is located on the front surface in height is required.

Therefore, in the conventional method, the p-electrode is disposed on the surface by removing the epitaxial layer around the light-receiving region or making it p-type. At this time, a semi-insulating substrate is usually used as the substrate. This is because the semi-insulating substrate is more suitable for incidence on the back surface because the device capacity is reduced and the substrate absorbs less light than the p-type substrate. However, a semi-insulating substrate (Fe-doped InP substrate) is generally inferior in crystallinity as compared with a conductive substrate.

Therefore, when a multiplication layer is epitaxially grown using a semi-insulating substrate as a base substrate, the crystallinity is deteriorated. If the crystallinity is poor, the dark current flowing between the light absorption layer and the multiplication layer increases even though the avalanche photodiode is not operating, and the current multiplies by flowing in the multiplication layer. (Referred to as a multiplied dark current), which causes factors such as a decrease in element characteristics and a decrease in element yield. The present invention has been made to solve these problems, and has a multiplication layer with high crystallinity, a substrate having a small light absorption suitable for back-side incidence, and an avalanche photodiode having a small element capacitance. The purpose is to obtain a manufacturing method.

[0013]

According to the present invention, there is provided a method of manufacturing an avalanche photodiode, comprising the steps of: (a) forming a multiplication layer and a light absorption layer in order on a first substrate via an etching stopper layer; A step of epitaxially growing the multiplication layer and the light absorbing layer; (b) a step of removing the first substrate; and (c) a side opposite to the side from which the first substrate is removed, and (D) ion implantation from the side from which the first substrate has been removed to form a guard ring.

In the method of manufacturing an avalanche photodiode according to the present invention, AlInAs or A
It is characterized in that only one of InGaAs is used.

In the method for manufacturing an avalanche photodiode according to the present invention, the multiplication layer is a superlattice multiplication layer.

A method for manufacturing an avalanche photodiode according to the present invention is characterized in that the first substrate is a conductive substrate.

A method of manufacturing an avalanche photodiode according to the present invention is characterized in that the second substrate is a semi-insulating substrate.

The method of manufacturing an avalanche photodiode according to the present invention includes a step of forming a guard ring and then forming a Zn diffusion layer outside the guard ring.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 FIG. 1 is a diagram for explaining the avalanche photodiode of the first embodiment, and more specifically, is a cross-sectional view of a main part of the planar avalanche photodiode of the first embodiment. In FIG. 1, reference numeral 2 denotes an etching stopper layer for preventing invasion of an etching solution, which is formed on a substrate 1 described later, has a thickness of, for example, 20 nm to 50 nm, and uses, for example, GaInAs as its material. Reference numeral 3 denotes a buffer layer which is formed on the etching stopper layer 2 and has a thickness of, for example, 50 nm to 200 n.
m, for example, using InP as its material.
Reference numeral 4 denotes a multiplication layer, for example, a superlattice multiplication layer having a superlattice structure. In the present embodiment, an example using a superlattice multiplication layer as the multiplication layer will be described. The superlattice multiplication layer 4 is formed on the substrate 1 via the etching stopper layer 2 and the buffer layer 3. A material having a band gap different from that of the superlattice structure is made thin (10 to 100 nm).
Degree) alternately laminated, and here, AlInA
An example in which s and AlGaInAs are alternately stacked and the thickness of which is 200 nm to 300 nm is used as the superlattice multiplication layer 4 will be described as an example.

Reference numeral 5 denotes a superlattice multiplication layer 4 and a light absorption layer 6 described later.
An electric field relaxation layer for mitigating an electric field applied to the interface with
It is formed on the superlattice multiplication layer 4 and has a thickness of, for example, 20 nm to 60 nm.
AlGaInAs, AlInAs or GaInAsP
Is used. Reference numeral 6 denotes a light absorbing layer which is formed on the electric field relaxation layer 5 and has a thickness of, for example, 1.0 μm.
4 μm, for example, GaInAs is used as the material. Reference numeral 7 denotes a buffer layer formed on the light absorbing layer 6 and having a thickness of, for example, 50 nm to 200 nm.
nm, for example, using AlInAs as its material. Reference numeral 8 denotes a substrate corresponding to the second substrate, for example, a semi-insulating substrate (for example, an InP substrate doped with at least one of Fe, Cr, Cd, and Zn: referred to as a semi-insulating substrate). It is used. 9 is T
a Ti ion-implanted region where i-ion implantation has been performed;
The ion implantation region 9 functions as a guard ring for preventing breakdown due to electric field concentration at the outer edge of the light receiving region. 10
Is a Zn diffusion layer formed outside the Ti ion implantation region 9.

FIGS. 2 and 3 are views for explaining a method of manufacturing the avalanche photodiode shown in FIG. In the figure, components denoted by the same reference numerals as those in FIG. 1 are the same or corresponding components. In the figure, reference numeral 1 denotes a substrate corresponding to the first substrate. For example, the substrate 1 is not semi-insulating but has few defects, and more specifically uses InP. Further, if a process for flattening a portion on the substrate 1 where a film is to be formed is performed in advance, the flatness of a film formed above the portion is further improved.

First, GS-MBE (Gas Source-Molec)
(Electrical Beam Epitaxy) apparatus, an etching stopper layer 2, a buffer layer 3, a superlattice multiplication layer 4, an electric field relaxation layer 5, and a light absorption layer on a substrate 1 which is a base for forming a superlattice multiplication layer. 6. The buffer layer 7 is sequentially formed and epitaxially grown. (FIG. 2 (a)). At this time, the superlattice multiplication layer 4 is 70 nm to 250 nm from the substrate 1.
Since it is formed at a position separated by about nm, the lower surface thereof (here, the etching stopper layer 2) has high flatness. The etching stopper layer 2 has a thickness of 20 nm or more.
50 nm, and the buffer layer 3 has a thickness of 50 nm to 20 nm.
Since the thickness is about 0 nm, the adverse effect on the crystal growth of the superlattice multiplication layer 4 is negligible.

Next, an etchant that dissolves the substrate 1 but does not dissolve the etching stopper layer 2 (for example, hydrochloric acid,
The substrate 1 is removed using hydrochloric acid / phosphoric acid, hydrochloric acid / phosphoric acid: water, hydrochloric acid / water, etc. (FIG. 2B). Next, the semi-insulating substrate 8 is fused on the light absorbing layer 6 via the buffer layer 7 on the side opposite to the side from which the substrate 1 is removed, so that the light absorbing layer 6 Forming a substrate 8 (FIG. 3)
(A)). At the time of fusion, the substrate 8 was fused at 630 ° C. in a hydrogen atmosphere. Here, the temperature was set to 630 ° C. in a hydrogen atmosphere, but the temperature is not limited to 630 ° C., and the temperature is 600 to 700 ° C. and the pressure is 500 Pa to 3 GPa.
What is necessary is just to perform fusion so as to meet the condition of (1).

Next, from the etching stopper layer 2 side, T
By performing i-ion implantation, a Ti ion-implanted region 9 is formed.
Is formed (FIG. 3B). The formed Ti ion implantation region 9 functions as a guard ring. In forming the Ti ion implanted region, it took about 30 minutes in an atmosphere at a temperature of about 600 ° C. to 700 ° C.

Next, a Zn diffusion layer is formed outside the guard ring (FIG. 3C). This is to form a Zn layer on the etching stopper layer 2 located outside the Ti ion implantation region 9 functioning as a guard ring. The formation is performed in an atmosphere of about 490 degrees. Then, Zn permeates and diffuses into the lower surface of the etching layer 2 to form a Zn diffusion layer outside the Ti ion implanted region 9. The temperature of the Ti ion implanted region 9 is
Since the shape does not change unless the temperature is about 700 ° C., if the Zn diffusion layer is formed in an atmosphere of about 490 ° C. after forming the Ti ion implanted area 9, the Ti ion implanted area 9 will be adversely affected. Has no effect.

Thus, the avalanche photodiode shown in FIG. 1 can be manufactured.
According to the method of manufacturing an avalanche photodiode, the superlattice multiplication layer 4 is disposed closer to the substrate 1 and epitaxially grown, so that not only the superlattice multiplication layer 4 having more excellent crystallinity is formed. Since the substrate 1 is removed and the substrate 8 is formed on the light absorbing layer 6 via the buffer layer 7, the crystal characteristics of the superlattice multiplication layer 4 are improved while the superlattice multiplication layer 4 is (A side farther from the substrate 8 than the light absorbing layer 6), the multiplication dark current in the multiplication layer can be reduced, and a high-quality and highly reliable avalanche photodiode having a planar structure can be manufactured. Is improved.

The substrate 1 serving as a base of the superlattice multiplication layer 4
When a p-type or n-type substrate having excellent crystallinity is used, a superlattice multiplication layer can be formed while growing an epitaxial layer on a high-quality conductivity type substrate. It is possible to obtain a lattice multiplication layer,
Since the multiplication dark current can be further reduced and a more reliable planar avalanche photodiode can be manufactured, the yield can be further improved.

Further, by affixing and reinforcing the semi-insulating substrate 8, not only subsequent processing and handling can be performed, but also an avalanche photodiode suitable for rear incidence with small element capacity and small light absorption. Can be manufactured. Further, after forming the Ti ion implanted region 9 in an atmosphere of 600 ° C. to 700 ° C., the Zn diffusion layer 10 is formed in an atmosphere of about 490 ° C. Has no effect.

Further, in the present embodiment, the case where the superlattice multiplication layer 4 is used as the multiplication layer has been described as an example. However, the present invention is not limited to this, and it is not necessary to use AlInAs or AlInGaAs.
A configuration using only one of them may be adopted. With such a configuration, the multiplication layer can be configured more easily, so that the manufacture of the avalanche photodiode becomes easier.

[0030]

According to the method of manufacturing an avalanche photodiode according to the present invention, there are provided: (a) a multiplication layer and a light absorption layer are sequentially formed on a first substrate via an etching stopper layer; (B) a step of removing the first substrate (c) a step opposite to the side from which the first substrate is removed, and Step of Forming the Second Substrate (d) Step of Forming a Guard Ring by Performing Ion Implantation from the Side from which the First Substrate is Removed, so that the Multiplier Layer Is Closer to the First Substrate In this case, the flatness of the lower surface of the multiplication layer becomes higher, so that not only a multiplication layer having better crystallinity is generated, but also the first substrate is removed and the second layer is formed on the light absorption layer. Crystal structure of the multiplication layer While above, since the multiplication layer can be disposed on the surface side, while reducing the multiplication dark current in the multiplication layer, it is possible to manufacture a highly reliable avalanche photodiode with high quality, yield is improved.

According to the method of manufacturing an avalanche photodiode according to the present invention, AlInAs or A
Since only one of InGaAs is used, the multiplication layer can be formed without going through a complicated process, and the manufacture of the avalanche photodiode is simplified.

In the method for manufacturing an avalanche photodiode according to the present invention, since the multiplication layer is a superlattice multiplication layer,
It is possible to enhance the characteristics of avalanche photodiodes

According to the method of manufacturing an avalanche photodiode according to the present invention, since the first substrate is a conductive type substrate, the superlattice multiplication layer is formed while growing an epitaxial layer on a high quality conductive type substrate. Because it can be formed, it is possible to obtain a superlattice multiplication layer with higher crystal characteristics, further reduce the multiplication dark current, manufacture a more reliable avalanche photodiode, and further improve the yield I do.

According to the method of manufacturing an avalanche photodiode according to the present invention, since the second substrate is a semi-insulating substrate, not only the subsequent processing and handling can be performed, but also the device capacity is small and the light is reduced. It is possible to manufacture an avalanche photodiode suitable for rear incidence with low absorption.

According to the method of manufacturing an avalanche photodiode according to the present invention, after forming the guard ring,
Since there is a step of forming a Zn diffusion layer outside the guard ring, there is no adverse effect on the guard ring when the Zn diffusion layer 10 is formed, and a high-quality and highly reliable avalanche photodiode can be manufactured. , And the yield is improved.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a configuration of an avalanche photodiode according to a first embodiment.

FIG. 2 is a diagram illustrating a method for manufacturing the avalanche photodiode according to the first embodiment.

FIG. 3 is a diagram illustrating a method for manufacturing the avalanche photodiode according to the first embodiment.

FIG. 4 is a diagram for explaining a conventional avalanche photodiode.

[Explanation of symbols]

 1: substrate (first substrate) 2: etching stopper layer 3: buffer layer 4: superlattice multiplication layer 5: electric field relaxation layer 6: light absorption layer 7: buffer layer 8: substrate (second substrate) 9: Ti ion implantation region 10: Zn diffusion layer

Continued on the front page F term (reference) 4K029 AA04 AA24 BA41 BB02 BC07 BD01 CA01 CA10 GA01 5F049 MA08 MB07 MB12 NA05 NA18 PA09 PA10 PA14 PA20 QA06 QA12 QA16 SS04 5F103 AA05 BB05 DD01 GG01 HH03 JJ01 JJ03 LL04 RR04RR

Claims (6)

[Claims] 1. A method for manufacturing an avalanche photodiode, comprising: (a) sequentially forming a multiplication layer and a light absorption layer on a first substrate via an etching stopper layer; Step (b) of removing the first substrate (c) Step of removing the first substrate (c) A second substrate is provided on the light absorbing layer on the side opposite to the side from which the first substrate is removed (D) performing ion implantation from the side from which the first substrate has been removed to form a guard ring. A method for manufacturing an avalanche photodiode. 2. A multiplication layer comprising AlInAs or AIn
2. The method according to claim 1, wherein only one of GaAs is used. 3. The method according to claim 1, wherein the multiplication layer is a superlattice multiplication layer. 4. The method according to claim 1, wherein the first substrate is a conductive type substrate. 5. The method for manufacturing an avalanche photodiode according to claim 1, wherein the second substrate is a semi-insulating substrate. 6. The method for manufacturing an avalanche photodiode according to claim 1, further comprising a step of forming a Zn diffusion layer outside the guard ring after forming the guard ring.