JP4166560B2 - Avalanche photodiode and manufacturing method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an avalanche photodiode for optical communication and a method for manufacturing the same , and particularly to achieve a low dark current.
[0002]
[Prior art]
As a conventional avalanche photodiode, Watanabe et al. Discloses a technology for reducing a surface leakage dark current that is a problem in a mesa pn junction photodiode and realizing a highly reliable superlattice avalanche photodiode with a low dark current. (For example, refer to Patent Document 1). Furthermore, Watanabe et al. Stated that the use of a Ti-implanted guard ring can achieve a low dark current characteristic and a practical avalanche photodiode that can achieve high speed and high reliability for an optical receiver. (For example, refer nonpatent literature 1).
[0003]
[Patent Document 1]
Japanese Patent Laid-Open No. 7-312442 (page 3, FIG. 1)
[Non-Patent Document 1]
JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL.18.NO.12, DECEMBER 2000. (Page 2000, Fig. 1)
[0004]
[Problems to be solved by the invention]
However, in the conventional avalanche photodiode, in order to prevent edge breakdown at the periphery of the light receiving region, a guard ring is formed by compensating the p conductivity type of the electric field relaxation layer in the periphery, so that a trench is formed. Ti ion implantation must be performed, an etching stopper layer must be provided, and the electric field strength of the light absorption layer in the guard ring portion is increased, resulting in an increase in tunnel dark current. .
[0005]
The present invention has been made to solve the above-described problems, and an object thereof is to obtain an avalanche photodiode having a simple structure and a low dark current and a method for manufacturing the avalanche photodiode.
[0006]
[Means for Solving the Problems]
In the avalanche photodiode according to the present invention, at least an avalanche multiplication layer, a second conductivity type electric field relaxation layer, a light absorption layer, and a first conductivity type semiconductor window layer are sequentially stacked as a semiconductor layer on a semiconductor substrate. The second conductivity type electric field relaxation layer is formed on the entire surface between the avalanche multiplication layer and the light absorption layer, and the second conductivity type region is formed in the first conductivity type semiconductor window layer. is there.
The method for manufacturing an avalanche photodiode according to the present invention includes at least an avalanche multiplication layer as a semiconductor layer, a second conductivity type electric field relaxation layer, a light absorption layer, and a first conductivity type semiconductor window layer on a semiconductor substrate. Are sequentially stacked by an epitaxial growth apparatus, the second conductivity type electric field relaxation layer is formed on the entire surface between the avalanche multiplication layer and the light absorption layer, and the second conductivity type electric field relaxation layer is formed in the first conductivity type semiconductor window layer. A conductive type region is formed.
[0007]
DETAILED DESCRIPTION OF THE INVENTION
Embodiment 1 FIG.
1 is a cross-sectional view showing the structure of an avalanche photodiode according to Embodiment 1 of the present invention. Here, n-type is used as the first conductivity type, and p-type is used as the second conductivity type.
[0008]
The production of each semiconductor layer can be realized on the n-type InP substrate 2 by using metal organic chemical vapor deposition (MO-CVD), molecular beam epitaxy (MBE), or the like. The first embodiment is manufactured in the following process order. On the n-type InP substrate 2, the n-type InP buffer layer 3 having a carrier concentration 1~5 × ¹⁰ 18 ^{cm -3} to a thickness 0.1 to 1 [mu] m, thickness 0.1 i-type AlInAs avalanche multiplication layer 4 The p-type InP electric field relaxation layer 5 having a carrier concentration of 0.5 to 1 × 10 ¹⁸ cm ⁻³ is formed to a thickness of 0.03 to 0.06 μm, and the carrier concentration is 1 to 5 × 10 ¹⁵ cm ⁻³ . ^- type GaInAs light-absorbing layer 6 to a thickness 1 to 1.5 [mu] m, n of the carrier concentration 0.01~1 × ¹⁰ 17 ^{cm -3 -} -type InP window layer 7 in a thickness 0.5 to 1 [mu] m, carrier concentration 1 A 5 × 10 ¹⁸ cm ⁻³ p-type GaInAs contact layer 8 was sequentially grown to a thickness of 0.1 to 0.5 μm.
[0009]
Next, the p-type conductive region 11 is formed by a Zn selective thermal diffusion method in the circular portion where the mask is not applied, using the SiOx film that has been cut through a circle having a diameter of 25 μm as a mask. Subsequently, the p-type GaInAs contact layer 8 is removed by etching so as to remain only concentrically with a width of 5 μm on the p-type conductive region 11. A SiNx surface protection film / antireflection film 10 is formed on the wafer by vapor deposition, the SiNx surface protection film / antireflection film 10 on the p-type GaInAs contact layer 8 is removed, and the p-type GaInAs contact layer 8 is removed. A p-electrode 9 is formed of AuZn. Finally, the surface of the n-type InP substrate 2 opposite to the surface on which the n-type InP buffer layer 3 is laminated is polished, and the n-electrode 1 is formed of AuGeNi.
[0010]
The operation of the avalanche photodiode manufactured by the above process will be described below. In a state where a reverse bias voltage is applied from the outside so that the n electrode side is + and the p electrode side is −, light to be detected is incident on the p-type conductive region 11 from the p electrode 9 side. Here, when light in the near infrared region of the optical communication wavelength band of 1.3 μm band or 1.5 μm band is incident, the light is absorbed in the p ⁻ -type GaInAs light absorption layer 6 to form an electron-hole pair. As a result, electrons move to the n electrode 1 side and holes move to the p electrode 9 side. When the reverse bias voltage is sufficiently high, electrons are ionized in the i-type AlInAs avalanche multiplication layer 4 to generate new electron-hole pairs, and by causing further ionization together with the newly generated electrons and holes, Avalanche multiplication, in which electrons and holes multiply like an avalanche, is caused.
[0011]
Next, the electric field strength in the structure of the present invention shown in FIG. 1 will be described. 2 is a diagram showing the electric field strength distribution in the AA ′ cross section of FIG. 1, and FIG. 3 is a diagram showing the electric field strength distribution in the BB ′ cross section and the CC ′ cross section of FIG. 2 and 3 indicate the stacked semiconductor layers. As shown in FIG. 2, the highest electric field is the i-type AlInAs avalanche multiplication layer 4. Further, as shown by the electric field intensity distribution in the BB ′ cross section of FIG. 3, the central portion of the light receiving region immediately below the p-type conductive region 11 is the highest region, and the electric field strength decreases toward the peripheral portion. Further, as shown by the electric field strength distribution in the CC ′ cross section of FIG. 3, the electric field strength in the peripheral portion of the p-type conductive region 11 is higher than that in the central portion due to the finite curvature of the diffusion region. Since it is lower than the electric field strength applied to the i-type AlInAs avalanche multiplication layer 4 as compared with the electric field strength distribution in the -B ′ cross section, it is possible to suppress the current in the peripheral portion known as edge breakdown, and an avalanche photodiode Can work as.
[0012]
Further, a region where the electric field strength around the diffusion region is locally high, that is, a portion where the electric field strength is high in the peripheral portion of the p-type conductive region 11 in the CC ′ cross section of FIG. 3 is the p ⁻ -type GaInAs. By joining with the n ⁻ type InP window layer 7, which is a semiconductor layer having a larger band gap than the light absorption layer 6, tunnel dark current from the portion where the electric field strength is high can be suppressed. Therefore, the avalanche photodiode having the structure of the present invention shown in FIG. 1 does not have to bother producing a structure called a guard ring that suppresses edge breakdown, and can easily and easily have low dark current and high reliability. A photodiode can be realized.
[0013]
In Embodiment 1 described above, the multiplication layer is made of AlInAs. However, any semiconductor that is lattice-matched to InP and whose electron ionization rate is larger than the hole ionization rate may be used. GaInAsP, AlInAs / AlGaInAs superlattices Or an AlInAs / GaInAsP superlattice structure. In other layers, a GaInAsP, AlGaInAs, or the like may be used as long as it is a semiconductor layer that is lattice-matched to InP and has a similar band gap.
[0014]
In the first embodiment, the case where the p-type conductive region 11 is formed by the Zn selective thermal diffusion method has been described, but any atom that imparts the p-type conductivity may be used. In the first embodiment, the front-illuminated structure in which light to be detected is incident on the p-type conductive region 11 from the p-electrode 9 side has been described. Conversely, the light is incident on the n-type InP substrate 2 side. The back-illuminated structure may be used, and the same effect as in the first embodiment is obtained. Further, the first embodiment has described the multiplication layer having a high electron ionization rate. However, even if the multiplication layer has a high hole ionization rate, the first conductivity type is changed from n-type to p-type, and the second conductivity type. By switching from p-type to n-type, the same effects as in the first embodiment can be obtained.
[0015]
Embodiment 2. FIG.
In the second embodiment, an avalanche photodiode is manufactured in the same manner as in the first embodiment, but only the manufacturing method of the p-type conductive region 11 is different, and will be described below. The p-type conductive region 11 is formed by ion-implanting Be after using a photo-resist film cut through a circle having a diameter of 25 μm as a mask, removing the photo-resist film, and performing a thermal annealing process at 700 ° C. for 12 hours.
[0016]
FIG. 4 is a diagram showing the carrier concentration distribution at the layer junction due to the difference in the manufacturing method of the p-type conductive region 11. The abscissa indicates the stacked semiconductor layers, and the carrier concentration distribution in the layer connection between the p-type conductive region 11 and the n ⁻ -type InP window layer 7 is illustrated. The curve indicated by the name Zn diffusion in FIG. 4 is the carrier concentration distribution when the p-type conductive region 11 is produced by the Zn selective thermal diffusion method described in the first embodiment, and is indicated by the name Be implantation. The curve shown is the carrier concentration distribution when the p-type conductive region 11 is formed by Be ion implantation described in the second embodiment. The p-type conductive region 11 formed by ion implantation is closer to a tilted junction as compared with a selective thermal diffusion method for forming a step-type junction, so that the maximum electric field strength at the junction can be kept low. There is an effect that current can be suppressed.
[0017]
Embodiment 3 FIG.
In the third embodiment, an avalanche photodiode is manufactured as in the first embodiment, but only a method for manufacturing the p-type conductive region 11 is different, and will be described below. The p-type conductive region 11 is formed by forming a p-type conductive region 11 by a Zn selective thermal diffusion method using a SiOx film cut through a circle having a diameter of 25 μm as a mask, and then forming a Zn film serving as a diffusion source and the SiOx film. Then, the thermal diffusion process is performed again to diffuse Zn in the p-type conductive region 11.
[0018]
A curve indicated by the name of Zn additional diffusion in FIG. 4 is a carrier concentration distribution when the p-type conductive region 11 is formed by the process described in the third embodiment. Compared with the Zn selective thermal diffusion method described in the first embodiment, the p-type conductive region 11 is manufactured by performing thermal diffusion processing in the state where the Zn film as a diffusion source is removed. The change in the carrier concentration at the junction is close to that of the inclined junction. Therefore, the maximum electric field strength at the layer junction can be suppressed, and the tunnel dark current can be suppressed.
[0019]
Embodiment 4 FIG.
In the fourth embodiment, an n ⁻ type GaInAsP transition layer 12 is provided between the p ⁻ type GaInAs light absorbing layer 6 and the n ⁻ type InP window layer 7 during the semiconductor growth shown in the first embodiment. The difference is that they are added and stacked. Following the growth of the p ⁻ type GaInAs light absorbing layer 6 in the first embodiment, the n ⁻ type GaInAsP transition layer 12 having a carrier concentration of 0.01 to 1 × 10 ¹⁷ cm ⁻³ is formed to a thickness of 0.01 to after growth to 0.05 .mu.m, the n ^- growing type InP window layer 7 or later.
[0020]
FIG. 5 shows the energy distribution at the layer junction in the conduction band and valence band. The abscissa indicates a stacked semiconductor layer, and the ordinate indicates energy. The valence band energy of the n ⁻ type GaInAsP transition layer 12 is lower than that of the p ⁻ type GaInAs light absorption layer 6 and higher than that of the n ⁻ type InP window layer 7, that is, the p ⁻ type GaInAs light. Since it is between the absorption layer 6 and the n ⁻ type InP window layer 7, the p ⁻ type GaInAs light absorption layer 6 and the n ⁻ type InP window layer 7 are sandwiched between the n ⁻ type GaInAsP transition layer 12. Compared with the case of the first embodiment in which the layers are directly layer-bonded, the discontinuous amount of the valence band is reduced, and the holes flowing from the p ⁻ -type GaInAs light absorption layer 6 flow more easily. It is possible to prevent pile-up of the hole, and it is possible to realize a faster optical response.
[0021]
In the fourth embodiment, the case where the n ⁻ -type GaInAsP transition layer 12 is a single layer has been described. However, a plurality of layers in which the band gap is changed stepwise may be used. Since the amount of discontinuity becomes smaller and holes more easily flow, an even faster optical response can be realized. Further, as shown by a broken line in FIG. 5, a layer in which the band gap is continuously changed may be used.
[0022]
【The invention's effect】
As described above, according to the present invention, on the semiconductor substrate, at least the avalanche multiplication layer, the second conductivity type electric field relaxation layer, the light absorption layer, and the first conductivity type semiconductor window layer are sequentially formed as the semiconductor layers. The second conductivity type electric field relaxation layer is formed on the entire surface between the avalanche multiplication layer and the light absorption layer, and the second conductivity type region is formed in the first conductivity type semiconductor window layer. Thus, an avalanche photodiode having a low dark current and high reliability and a method for manufacturing the same can be obtained.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a structure of an avalanche photodiode according to a first embodiment of the present invention.
FIG. 2 is a diagram showing an electric field intensity distribution in the AA ′ cross section of FIG.
3 is a diagram showing an electric field strength distribution in a BB ′ section and a CC ′ section in FIG. 1. FIG.
FIG. 4 is a diagram illustrating carrier concentration distribution at a layer junction due to a difference in manufacturing method of the p-type conductive region 11 in the description of the present invention.
FIG. 5 is a diagram showing energy distribution at the layer junction of the conduction band and the valence band in the description of the present invention.
[Explanation of symbols]
1 n electrode, 2 n-type InP substrate, 3 n-type InP buffer layer, 4 i-type AlInAs avalanche multiplication layer, 5 p-type InP field relaxation layer, 6 p ^- -type GaInAs light-absorbing layer, 7 n ^- -type InP window layer 8 p-type GaInAs contact layer, 9p electrode, 10 SiNx surface protective film and antireflection film, 11 p-type conductive region, 12n ^- type GaInAsP transition layer.

Claims (6)

On the semiconductor substrate, at least an avalanche multiplication layer, a second conductivity type electric field relaxation layer, a light absorption layer, and a first conductivity type semiconductor window layer are sequentially laminated as semiconductor layers, and the avalanche multiplication layer and the light are laminated. An avalanche photodiode , wherein the second conductivity type electric field relaxation layer is formed on the entire surface between the absorption layer and a second conductivity type region is formed in the first conductivity type semiconductor window layer. On the semiconductor substrate, at least a first conductivity type buffer layer, an avalanche multiplication layer, a second conductivity type electric field relaxation layer, a light absorption layer, and a first conductivity type semiconductor window layer are sequentially laminated as a semiconductor layer, The second conductivity type electric field relaxation layer is formed on the entire surface between the avalanche multiplication layer and the light absorption layer, and a second conductivity type region is formed in the first conductivity type semiconductor window layer. An avalanche photodiode. The avalanche photodiode according to claim 1 or 2,
The avalanche photodiode, wherein the second conductivity type electric field relaxation layer is a semiconductor layer that is lattice-matched to InP and has a band gap corresponding to the band gap of InP. On the semiconductor substrate, at least an avalanche multiplication layer as a semiconductor layer, a second conductivity type electric field relaxation layer, a light absorption layer, and a first conductivity type semiconductor window layer are sequentially laminated by an epitaxial growth apparatus, and the avalanche multiplication layer is formed. The avalanche photodiode is characterized in that the second conductivity type electric field relaxation layer is formed on the entire surface between the first and second light absorption layers, and a second conductivity type region is formed in the first conductivity type semiconductor window layer. Manufacturing method. In the manufacturing method of the avalanche photodiode according to claim 4,
The method of manufacturing an avalanche photodiode, wherein the second conductivity type region is formed in the first conductivity type semiconductor window layer by a selective thermal diffusion method. In the manufacturing method of the avalanche photodiode according to claim 4,
The second conductivity type region is formed in the first conductivity type semiconductor window layer by a selective thermal diffusion method, then removing a diffusion supply source, and further performing a thermal diffusion process again. A manufacturing method of an avalanche photodiode.

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