JP2002027006A - Receiver for digital broadcasting - Google Patents

Abstract

PROBLEM TO BE SOLVED: To maintain stable and suitable receiving characteristics regardless of a ratio between the carrier wave power and noise power of a received signal and further to maintain stable and suitable receiving characteristics, by setting the operating condition of a digital demodulating part while following up a fluctuation, even in the state where the ratio between the carrier wave power and noise power of the received signal fluctuates. SOLUTION: This device is provided with a decision circuit 104 having a function for estimating the ratio between the carrier wave power and the noise power and outputting a signal corresponding to this ratio when performing the digital demodulation of a digital broadcasting signal received in a digital modulated signal processing system 10. In a microcontroller 31 for control, this signal corresponding to the ratio of the carrier wave power and the noise power is received and a digital demodulating part 102 is controlled into optimal state corresponding to the ratio between the carrier wave power and noise power of the received signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital broadcast receiving apparatus, and more particularly to a BPSK (Binary Phase Shift Keyin).
g) Modulation, QPSK (Quadrature Phase Shift Keying)
The present invention relates to a digital satellite broadcast receiving apparatus that receives a digitally modulated broadcast signal such as modulation and 8PSK (8 Phase Shift Keying) modulation.

[0002]

2. Description of the Related Art At present, digital TV broadcasting using 12 GHz band QPSK modulation using a communication satellite is performed as a digital TV broadcasting using satellites in Japan.
Digital TV broadcasting using BSPK modulation, QPSK modulation, and 8PSK modulation by a 2 GHz band broadcasting satellite is being planned. An example of a conventionally used digital satellite broadcast receiver is disclosed in JP-A-10-304276. FIG. 4 shows a main part of a conventional digital satellite broadcast receiver. 1 is a reception RF signal input terminal, 2
Is a high-pass filter, 3 is a preamplifier, 4 is a tunable filter, 5 is an RFAGC amplifier, 6 is a mixer, 12 is a first oscillator, 11 is a frequency synthesizer, 7 is a bandpass filter, 8 is an IFAGC amplifier, and 14 is 9 is a quadrature detector, 13 is a 90-degree phase shifter, 22 is a front end, 90 is a tuner unit, 10 is a digital modulation signal processing system, 101 is an analog-to-digital converter, 102
Is digital demodulation means, 103 is error correction means, 15 is an outdoor unit power input terminal, 16 is a tuning power input terminal, 1
7 is a clock terminal of the frequency synthesizer control bus, 18
Is a data terminal of a control bus of the frequency synthesizer, 19 is a power supply terminal, 20 is a clock terminal of a digital modulation signal processing system control bus, 21 is a data terminal of a digital modulation signal processing system control bus, and 105 is a digital demodulated signal. An output terminal 26 for the transport stream, which is the applied digital data, is a digital broadcast receiving device.

Hereinafter, the operation of the conventional example shown in FIG. 4 will be described. Broadcast radio waves transmitted from a communication satellite or a broadcast satellite are in the 12 GHz band, and the received radio waves are frequency-converted into signals in the 1 to 2 GHz band in an outdoor unit (not shown) and output to a digital broadcast receiving device. The digitally modulated RF signal of the 1-2 GHz band supplied from the outdoor unit is input from the reception RF signal input terminal 1 to the front end 22. The input RF signal is subjected to unnecessary wave removal and amplification by a high-pass filter 2, a preamplifier 3, and a tunable filter 4, and a signal level input to a mixer 6 is controlled by an RFAGC amplifier 5, whereby the mixer 6 and the first A frequency conversion means comprising an oscillator 12 and a frequency synthesizer 11 transmits a data terminal 18 and a clock terminal 17 of a frequency synthesizer control bus from a control microcontroller (not shown, hereinafter a microcomputer) of the receiver.
The desired channel of the received RF signal is converted into an intermediate frequency signal having a frequency of, for example, 479.5 MHz by the information applied to the received RF signal. This intermediate frequency signal output from the mixer 6 is input to the quadrature detection means 9 via the band pass filter 7 and the IFAGC amplifier 8, and
Is multiplied by two carrier signals whose phases differ by 90 degrees generated by the 90-degree phase shifter 13 based on the output of the second oscillator 14, and input to the digital modulation signal processing system 10 as an I signal and a Q signal, respectively. Is done. The I signal and the Q signal are converted into digital signals by an analog / digital converter 101 inside the digital modulation signal processing system 10, and are digitally demodulated by a digital demodulation circuit 102. Here, digital demodulation refers to demodulation of a phase-modulated received signal such as BPSK, QPSK, or 8PSK. The digitally demodulated signal is supplied to the error correction means 103, subjected to error correction by processing such as error decoding and deinterleaving, and output from the transport stream output terminal 105.

In order to realize good demodulation characteristics, the amplitudes of the I signal and the Q signal input to the digital modulation signal processing system 10 are kept constant, and a digital filter circuit (shown in FIG. ) And the coefficients of the amplifier circuit (not shown) need to be set to optimal values.

In order to control the amplitudes of the I signal and the Q signal so as to keep the amplitudes constant, the digital modulation signal processing system 10
, The amplitude control information is generated by detecting the amplitudes of the I signal and the Q signal, and output to the gain control means 23 as an amplitude control signal. The gain control means 23 receives the amplitude control signal and controls the gain so that the amplitudes of the I signal and the Q signal input to the digital modulation signal processing system 10 are kept constant. Here, the gain control circuit 23 is designed to operate satisfactorily at a signal frequency of about 1 to 2 GHz band input to the reception RF signal input terminal 1.

The optimum values of the coefficients of the digital filter circuit (not shown) and the amplifier circuit (not shown) in the digital demodulation unit 102 are set by a control microcomputer (not shown) from the clock of the digital modulation signal processing system control bus. It is controlled by information applied to terminal 20 and data terminal 21, respectively.

The information applied from the control microcomputer to the clock terminal 20 and the data terminal 21 of the digital modulation signal processing system control bus is used to control not only the digital demodulation unit 102 but also other parts of the digital modulation signal processing system 10. Also do.

[0008]

SUMMARY OF THE INVENTION BPSK, QPSK,
In demodulation using a phase modulation method such as 8PSK, when noise is superimposed on an input signal, an error occurs in the demodulated signal, and the degree of the error is included in the power of the received signal carrier and the received signal. Noise power ratio (hereinafter, C /
N ratio). When a broadcast wave transmitted from a satellite is actually received, a considerable amount of noise is superimposed. Even in such a case, the setting of the digital demodulation circuit 102 is performed as described above in order to appropriately suppress the error that occurs. It is necessary to set the value to an optimum value according to the C / N ratio of the received signal. However, the signal power may decrease when there is rainfall during the transmission of the signal transmitted from the satellite.On the other hand, the noise power is less affected by rainfall, so the noise power is equivalently large. And the C / N ratio may be degraded. Thus, the C / N ratio does not become constant during actual use of receiving satellite broadcasting.

Therefore, in order to keep the demodulation process of the digitally modulated broadcast signal at a good characteristic, the variation of the C / N ratio of the received signal is observed, and the set value is reset according to the received C / N. It becomes important.

An object of the present invention is to provide a digital broadcast receiver capable of demodulating a digital satellite broadcast signal with good reception characteristics irrespective of a variation in C / N of a received signal.

[0011]

A feature of the present invention is that a digital modulation signal processing system is provided with a C / N determination circuit, and the C / N of the reception signal is obtained from the digital demodulation process of the reception signal in the digital demodulation unit. The C / N determination circuit estimates and outputs the C / N state of the received signal.

Specifically, the digital modulation signal (8
A high-frequency input terminal for receiving a PSK modulation signal, a QPSK modulation signal, a BPSK modulation signal, and the like, and converting a reception digital signal into I (In-Phase) and Q (Quadratur) in the frequency band of the reception signal.
e-Phase) means for quadrature detection into two signals, a local oscillation circuit for quadrature detection which also serves to select a desired signal, gain control means provided before the quadrature detection means, and analog and digital signals for I and Q signals A digital demodulation circuit for digitally demodulating an output signal of the analog-to-digital conversion means, an error correction means for performing error correction on an output signal of the digital demodulation circuit, and outputting a transport stream which is a digital signal, and A C / N determination circuit that detects a C / N state of a signal input to the modulation signal processing system and outputs a signal corresponding to the C / N state, and outputs a signal corresponding to the C / N state to a control microcomputer. A digital modulation signal processing system having an output terminal and a bus line connection terminal, and a control microcomputer for controlling the digital modulation signal processing system through a bus line Icon controls the digital modulation signal processing system in accordance with the C / N state of the reception signal.

[0013]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a first embodiment of a digital broadcast receiving apparatus according to the present invention.

1 is a reception RF signal input terminal, 2 is a high-pass filter, 3 is a preamplifier, 4 is a tunable filter, 5
Is an RFAGC amplifier, 6 is a mixer, 12 is a first oscillator, 11 is a frequency synthesizer, 7 is a bandpass filter, 8 is an IFAGC amplifier, 14 is a second oscillator, 9 is quadrature detection means, and 13 is a 90-degree phase shift. 90, a tuner section, 10 a digital modulation signal processing system, 101 an analog-to-digital converter, 102 a digital demodulation means, 103 an error correction means, 15 an outdoor unit power input terminal, 16
Is a tuning power supply input terminal, 17 is a clock terminal of a frequency synthesizer control bus, 18 is a data terminal of a control bus of the frequency synthesizer, 19 is a power supply terminal, 20 is a clock terminal of a control bus of digital demodulation means and error correction means, and 21 is a clock terminal of the control bus. A data terminal of a control bus of the digital demodulation means and the error correction means, an output terminal 105 of a transport stream as digital data subjected to digital demodulation and error correction, and a reception device 26 for digital broadcasting.

The operation of the embodiment shown in FIG. 1 will be described below. Broadcast radio waves transmitted from a communication satellite or a broadcast satellite are in the 12 GHz band, and the received radio waves are frequency-converted into signals in the 1 to 2 GHz band in an outdoor unit (not shown) and output to a digital broadcast receiving device. The digitally modulated RF signal in the 1-2 GHz band supplied from the outdoor unit is input from the reception RF signal input terminal 1 to the digital broadcast receiver 26. The input RF signal is subjected to unnecessary wave removal and amplification by a high-pass filter 2, a preamplifier 3, and a tunable filter 4, and the RFAG
The signal level input to the mixer 6 is controlled by the C amplifier 5, and a frequency conversion means including the mixer 6, the first oscillator 12, and the frequency synthesizer 11 is used to control a microcontroller (not shown, hereinafter a microcomputer) for controlling the receiver. According to the information applied to the data terminal 18 and the clock terminal 17 of the frequency synthesizer control bus, the desired channel of the received RF signal is converted into an intermediate frequency signal having a frequency of, for example, 479.5 MHz. This intermediate frequency signal output from the mixer 6 is connected to the bandpass filter 7 and the IFAG
The signal is input to the quadrature detection means 9 via the C amplifier 8, and is output to the quadrature detection means 9 based on the output of the second oscillator
The signals are multiplied by two carrier signals having phases different from each other by 90 degrees generated by the phase shifter 13 and input to the digital modulation signal processing system 10 as an I signal and a Q signal, respectively. I signal and Q
The signals are respectively converted into digital signals by an analog-to-digital converter 101 inside the digital modulation signal processing system 10, and are digitally demodulated by a digital demodulation circuit 102. Here, digital demodulation means BPSK, QPSK, 8
This refers to demodulating a phase-modulated received signal such as PSK. The digitally demodulated signal is sent to the error correction means 10.
3 and error-corrected by processing such as error decoding and deinterleaving, and output from the transport stream output terminal 105.

In order to realize good demodulation characteristics, the amplitudes of the I signal and the Q signal input to the digital modulation signal processing system 10 are kept constant, and the operation of the digital demodulation unit 102 is controlled by the C / C of the received signal. It is necessary to always maintain the optimum operation according to the N ratio.

In order to control the amplitudes of the I signal and the Q signal so as to keep the amplitudes constant, the digital modulation signal processing system 10
, The amplitude control information is generated by detecting the amplitudes of the I signal and the Q signal, and output to the gain control means 23 as an amplitude control signal. The gain control means 23 receives the amplitude control signal and controls the gain so that the amplitudes of the I signal and the Q signal input to the digital modulation signal processing system 10 are kept constant. Here, the gain control circuit 23 is designed to operate satisfactorily at a signal frequency of about 1 to 2 GHz band input to the reception RF signal input terminal 1.

Further, in order to always keep the operation of the digital demodulation unit 102 at an optimum operation in accordance with the C / N ratio of the received signal, a change in the C / N ratio of the received signal is observed, and the operation is performed in accordance with the received C / N. It is necessary to reset the set value. For this reason,
The digital broadcast receiving apparatus according to the present invention includes a C / N determination circuit 104 in the digital modulation signal processing system 10,
From the digital demodulation process of the received signal in the digital demodulation unit 102, the C / N of the received signal is determined by the C / N determination circuit 104.
And outputs the C / N state of the received signal from the C / N state signal output terminals 27 to 30 to the control microcomputer 31. In the control microcomputer 31, in each C / N state, a set value required for the digital demodulation unit 102 to perform an optimum operation is stored. The C / N state signal output terminals 27 to 30 output the set values. / N state signal,
A set value necessary for the optimum operation is sent from the clock terminal 20 and the data terminal 21 of the digital modulation signal processing system control bus, and the digital demodulation unit 102 is controlled so as to perform the optimum operation according to the C / N state of the received signal. .

As means for transmitting the C / N state of the received signal determined by the C / N determination circuit 104 to the control microcomputer 31, a clock terminal 2 of a digital modulation signal processing system control bus is used.
Although it is conceivable to use 0 and the data terminal 21, other operation blocks are generally connected to the control bus. For example, in FIG. 1, the tuning PLL circuit 11 is connected, and other circuits in the digital broadcast receiving device, not shown, are also connected. When the C / N state of the received signal is transmitted to the control microcomputer 31 using such a bus, the digital demodulation unit 102
It is conceivable that the timing at which the operation is optimized is delayed, which causes an error in the output signal. In order to avoid this problem, the C / N status signal output terminal 27 is provided as a dedicated signal line separately from the above-mentioned bus for transmitting the C / N status signal from the C / N determination circuit 104 to the control microcomputer 31.
To 31. The control microcomputer 31 can detect the C / N state signal prior to the state detection by the bus line, can respond to the change in the C / N of the received signal by priority, and can control the C / N of the received signal. , The stable demodulation characteristics can always be realized.

The microcomputer 31 for control uses the digital demodulation circuit 1
When setting the state of 02 to the optimum operation according to the C / N of the received signal, it is necessary that the C / N state of the received signal be transmitted in detail. In the embodiment shown in FIG. 1, four signal lines are shown as C / N state signals. However, if each signal line can transmit a state in two stages of voltage High / Low, four signal lines are provided. Can transmit a 16-stage C / N state, and as the number of signal lines increases, the
Many N states can be set, and the C
/ N state can be transmitted to the control microcomputer 31. Therefore, FIG. 1 shows four signal lines as the C / N state signal, but the number is not limited to four. Even if the number of signal lines is different, the effect shown in the present embodiment can be realized. As the number of signal lines increases, the C / N state of the received signal can be transmitted to the control microcomputer 31 in detail, and the C / N
Since a slight change in the N state can be transmitted to the control microcomputer 31, a more stable demodulation operation can be realized.

Further, by using four signal lines as the C / N state signal, it is possible to weight the C / N state of the received signal for each signal line. That is, if the four signal lines output from the C / N state signal output terminals 27 to 30 are regarded as 4-bit signals, and only the two signal lines from the most significant bit are observed by the control microcomputer 31, C / N A rough change in the N state can be known, and if all four signal lines are observed by the control microcomputer 31, C
It is possible to know even a minute change in the / N state. C /
When the demodulation characteristics greatly change due to a small change in the C / N state such as when the N state is bad, the C / N state is observed by the control microcomputer 31 using all four signal lines, and the digital demodulation unit is controlled. If the setting is made in detail and the change in the demodulation characteristics is small relative to the change in the C / N state, such as when the C / N state is good, it is not necessary to observe all four of the C / N state signals, and the necessary minimum It is also possible to observe only a limited number of signals and reduce the processing of the control microcomputer 31. When the C / N state of the received signal is divided into 16 by four signal lines,
The control microcomputer 31 can know the C / N state of the received signal in more detail by making the step width fine in an area where the change of the C / N state is to be observed in detail and making the step width rough in other areas. Becomes In this case as well, the number of C / N state output signals does not need to be four, and the larger the number, the more slight a change in the C / N state can be transmitted to the control microcomputer 31, so that a more stable demodulation operation can be realized. .

According to this embodiment, the control microcomputer 31 can know the C / N state of the received signal, and
The digital demodulation circuit 102 can be set to an optimum state with respect to the / N state, and stable and good demodulation characteristics can be maintained regardless of the C / N state of the received signal. Further, even when the C / N state of the received signal fluctuates, the C / N of the received signal is changed.
Since there are a plurality of dedicated signal lines for transmitting the state to the control microcomputer 31, the C / N state of the received signal can be quickly transmitted to the control microcomputer 31 and the outline of the C / N state is observed. The processing speed of the control microcomputer 31 can be changed by changing the number of signal lines to be observed by the control microcomputer 31 depending on whether the operation is to be performed or details are to be observed. The effect of maintaining stable and good demodulation characteristics is obtained.

In the embodiment shown in FIG. 1, the tuning PLL is used.
The bus line terminals 17 and 18 of the circuit and the bus line terminals 20 and 21 of the digital modulation signal processing system 10 are connected in parallel to the control microcomputer 31, but the digital modulation signal processing system 10 is connected to the bus line terminals. And the tuning PLL circuit 11 is a digital modulation signal processing system 1.
The same effect can be realized even if the control microcomputer 31 is connected to the control microcomputer 31 in a cascade manner through the control microcomputer 0. In the case of the parallel connection as in the former case, every time the control microcomputer 31 transmits / receives a signal to / from the bus line, the signal is also transmitted to the tuning PLL circuit 11 and the reception characteristic is hindered. However, if the connection is cascaded as in the latter case,
The digital modulation signal processing system 10 functions as a buffer, and unnecessary signals are not transmitted to the tuning PLL circuit 11, so that the tuning PLL circuit 11 can perform a stable operation and stabilize reception characteristics. Can be achieved.

FIG. 2 is a block diagram showing a second embodiment of the digital broadcast receiving apparatus according to the present invention. 1 is a reception RF signal input terminal, 2 is a high-pass filter for suppressing an interference wave, 3 is a preamplifier circuit, 23 is a gain control circuit, 24 is a quadrature detection of a digital modulation signal, and I (In Phase) and Q
(Quadrature Phase) quadrature detection means for generating two signals, 25 is a low-pass filter, 12 is a local oscillation circuit,
11 is a PLL circuit for channel selection, 15 is an outdoor unit power input terminal, 16 is a tuning power input terminal, and 17 is P
A clock signal terminal of a bus for transmitting information for controlling the LL circuit 11, a data signal terminal 18 for a bus for transmitting information for controlling the PLL circuit 11, a power supply terminal 19, a digital modulation signal processing system, and 101 an analog Digital converter 102, digitizing demodulation means 103, error correction means 103, transport stream output terminal 105,
Reference numeral 0 denotes a data terminal of a bus that controls the digital modulation signal processing system, reference numeral 21 denotes a clock terminal of a bus that controls the digital modulation signal processing system, and reference numeral 26 denotes a digital broadcast receiver.

Hereinafter, the operation of the embodiment shown in FIG. 2 will be described in detail. A digitally modulated signal (modulation method is, for example, BPSK method, QP
An SK system and an 8PSK system, and a broadcast reception signal of about 1 to 2 GHz band) are input. The input digital modulation signal is removed by suppressing the interfering wave by the high-pass filter 2, amplified by the preamplifier 3, controlled in amplitude by the gain control circuit 23, and input to the quadrature detection means 24. In the quadrature detection means 24, the received signal is multiplied by an oscillation signal output from the local oscillation circuit 12, which is output as two signals that differ by 90 degrees from each other by the 90-degree phase shift circuit 13, and output as an I signal and a Q signal, respectively. I do. Here, the oscillation frequency of the local oscillation circuit 12 is controlled by the output signal of the tuning PLL circuit 11, and the signal of the desired broadcasting station is selected (tuned) by the quadrature detection means 24. The output signal of the tuning PLL circuit 11 is controlled by information applied to a data terminal 18 and a clock terminal 17 of a control bus of the PLL circuit 11. The output signal of the tuning PLL circuit 11 is superimposed on the voltage applied to the tuning power supply terminal 16 to control the oscillation frequency of the oscillator 12.

The I signal and the Q signal output from the quadrature detection means 24 are input to the digital modulation signal processing system 10 after harmonics which are obstructed by the low pass filter 25 are suppressed.
The I signal and the Q signal are converted into a digital modulation signal by an analog-to-digital converter 101 in the digital modulation signal processing system 10. The digitally modulated I and Q signals are demodulated by the digital demodulation means 102 and then supplied to the error correction means 103 to correct errors by processing such as error decoding and deinterleaving, and output from the transport stream output terminal 105. You.

In order to realize good demodulation characteristics, the amplitudes of the I signal and the Q signal input to the digital modulation signal processing system 10 are kept constant, and the operation of the digital demodulation unit 102 is controlled by the C / C of the received signal. It is necessary to always maintain the optimum operation according to the N ratio.

In order to control the amplitudes of the I signal and the Q signal so as to keep the amplitudes constant, the digital modulation signal processing system 10
, The amplitude control information is generated by detecting the amplitudes of the I signal and the Q signal, and output to the gain control means 23 as an amplitude control signal. The gain control means 23 receives the amplitude control signal and controls the gain so that the amplitudes of the I signal and the Q signal input to the digital modulation signal processing system 10 are kept constant. Here, the gain control circuit 23 is designed to operate satisfactorily at a signal frequency of about 1 to 2 GHz band input to the reception RF signal input terminal 1.

Further, in order to always keep the operation of the digital demodulation unit 102 at an optimum operation in accordance with the C / N ratio of the received signal, a change in the C / N ratio of the received signal is observed, and the operation is performed in accordance with the received C / N. It is necessary to reset the set value. For this reason,
The digital broadcast receiving apparatus according to the present invention includes a C / N determination circuit 104 in the digital modulation signal processing system 10,
From the digital demodulation process of the received signal in the digital demodulation unit 102, the C / N of the received signal is determined by the C / N determination circuit 104.
And outputs the C / N state of the received signal from the C / N state signal output terminals 27 to 30 to the control microcomputer 31. In the control microcomputer 31, in each C / N state, a set value required for the digital demodulation unit 102 to perform an optimum operation is stored. The C / N state signal output terminals 27 to 30 output the set values. / N state signal,
The setting values required for the optimum operation are set to the clock terminal 20 and the data terminal 21 of the control bus of the digital demodulating means and the error correcting means.
, And the digital demodulation unit 102 converts the C /
Control is performed to perform an optimal operation according to the N state.

As means for transmitting the C / N state of the received signal determined by the C / N determination circuit 104 to the control microcomputer 31, the clock terminal 20 and the data terminal 21 of the control bus of the digital demodulation means and the error correction means are used. However, other operation blocks are generally connected to the control bus. For example, in FIG. 2, the tuning PLL circuit 11 is connected, and other circuits in the digital broadcast receiving device, not shown, are also connected. When the C / N state of the received signal is transmitted to the control microcomputer 31 using such a bus, the timing at which the operation of the digital demodulation unit 102 is optimized with respect to the fluctuation of the C / N state is delayed. This may cause an error in the output signal.
In order to avoid this problem, C / N state signal output terminals 27 to 31 are provided as dedicated signal lines separately from the above-mentioned bus in order to transmit a C / N state signal from the C / N determination circuit 104 to the control microcomputer 31. ing. The control microcomputer 31 can detect the C / N state signal prior to the state detection by the bus line, can respond to the change in the C / N of the received signal by priority, and can control the C / N of the received signal. , The stable demodulation characteristics can always be realized.

The microcomputer 31 for control uses the digital demodulation circuit 1
When setting the state of 02 to the optimum operation according to the C / N of the received signal, it is necessary that the C / N state of the received signal be transmitted in detail. In the embodiment shown in FIG. 1, four signal lines are shown as C / N state signals. However, if each signal line can transmit a state in two stages of voltage High / Low, four signal lines are provided. Can transmit a 16-stage C / N state, and as the number of signal lines increases, the
Many N states can be set, and the C
/ N state can be transmitted to the control microcomputer 31. Therefore, FIG. 1 shows four signal lines as the C / N state signal, but the number is not limited to four. Even if the number of signal lines is different, the effect shown in the present embodiment can be realized. As the number of signal lines increases, the C / N state of the received signal can be transmitted to the control microcomputer 31 in detail, and the C / N
Since a slight change in the N state can be transmitted to the control microcomputer 31, a more stable demodulation operation can be realized.

Further, by using four signal lines as the C / N state signal, it is possible to weight the C / N state of the received signal for each signal line. That is, if the four signal lines output from the C / N state signal output terminals 27 to 30 are regarded as 4-bit signals, and only the two signal lines from the most significant bit are observed by the control microcomputer 31, C / N A rough change in the N state can be known, and if all four signal lines are observed by the control microcomputer 31, C
It is possible to know even a minute change in the / N state. C /
When the demodulation characteristics greatly change due to a small change in the C / N state such as when the N state is bad, the C / N state is observed by the control microcomputer 31 using all four signal lines, and the digital demodulation unit is controlled. If the setting is made in detail and the change in the demodulation characteristics is small relative to the change in the C / N state, such as when the C / N state is good, it is not necessary to observe all four of the C / N state signals, and the necessary minimum It is also possible to observe only a limited number of signals and reduce the processing of the control microcomputer 31. When the C / N state of the received signal is divided into 16 by four signal lines,
The control microcomputer 31 can know the C / N state of the received signal in more detail by making the step width fine in an area where the change of the C / N state is to be observed in detail and making the step width rough in other areas. Becomes In this case as well, the number of C / N state output signals does not need to be four, and the larger the number, the more slight a change in the C / N state can be transmitted to the control microcomputer 31, so that a more stable demodulation operation can be realized. .

According to this embodiment, the control microcomputer 31 can know the C / N state of the received signal, and
The digital demodulation circuit 102 can be set to an optimum state with respect to the / N state, and stable and good demodulation characteristics can be maintained regardless of the C / N state of the received signal. Further, even when the C / N state of the received signal fluctuates, the C / N of the received signal is changed.
Since there are a plurality of dedicated signal lines for transmitting the state to the control microcomputer 31, the C / N state of the received signal can be quickly transmitted to the control microcomputer 31 and the outline of the C / N state is observed. The processing speed of the control microcomputer 31 can be changed by changing the number of signal lines to be observed by the control microcomputer 31 depending on whether the operation is to be performed or details are to be observed. The effect of maintaining stable and good demodulation characteristics is obtained.

In the embodiment shown in FIG. 2, the tuning PLL is used.
The bus line terminals 17 and 18 of the circuit and the bus line terminals 20 and 21 of the digital modulation signal processing system 10 are connected in parallel to the control microcomputer 31, but the digital modulation signal processing system 10 is connected to the bus line terminals. And the tuning PLL circuit 11 is a digital modulation signal processing system 1.
The same effect can be realized even if the control microcomputer 31 is connected to the control microcomputer 31 in a cascade manner through the control microcomputer 0. In the case of the parallel connection as in the former case, every time the control microcomputer 31 transmits / receives a signal to / from the bus line, the signal is also transmitted to the tuning PLL circuit 11 and the reception characteristic is hindered. However, if the connection is cascaded as in the latter case,
The digital modulation signal processing system 10 functions as a buffer, and unnecessary signals are not transmitted to the tuning PLL circuit 11, so that the tuning PLL circuit 11 can perform a stable operation and stabilize reception characteristics. Can be achieved.

FIG. 3 is a block diagram showing a third embodiment of the digital broadcast receiving apparatus according to the present invention. Functional blocks having the same functions as those of the above-described embodiment are denoted by the same reference numerals, and description thereof is omitted. Reference numeral 22 denotes a front end, and 19 denotes a power terminal of the front end 23.

Hereinafter, the operation of the embodiment shown in FIG. 3 will be described in detail.

The front end 22 includes a high-pass filter 2, a preamplifier 3, a gain control circuit 23, and a quadrature detector 2.
4, low-pass filter 25, digital modulation signal processing system 1
0, an oscillator 12, a tuning PLL circuit 11, and a 90-degree phase shift circuit 13 in a single housing, and a reception RF input terminal 1, an outdoor unit power input terminal 15, a tuning power input terminal 16, and a PLL. A clock signal terminal 17 of a bus for transmitting information for controlling the circuit 11, a data signal terminal 18, a power supply terminal 19, a transport stream output terminal 105 of the bus for transmitting information for controlling the PLL circuit 11, and a digital modulation signal processing system. The data terminal 20 of the bus to be controlled,
A clock terminal 21 of a bus for controlling the digital modulation signal processing system, as an input / output terminal of the front end 22,
The receiving RF signal input terminal 1 is a digital broadcast receiving device 26.
Also functions as a terminal.

By integrating the above-described respective functional blocks into a single housing, an effect of blocking unnecessary signals such as noise generated by other functional blocks (not shown) in the digital broadcast receiver 26 can be obtained. The front end 22
And the like, and the effect of improving the reception demodulation characteristics is obtained. In addition, an effect of suppressing the influence of the noise generated by the front end 22 on the outside can be obtained, and an effect of improving the reception characteristics of the entire digital broadcast receiving apparatus 26 can be obtained. Further, the integration as the front end 22 makes it possible to handle a series of functional blocks from the reception RF signal input terminal 1 to the transport stream output terminal 105 as one component. Or an effect that makes it easy to handle during production.

A television for receiving and viewing a digital broadcast includes a digital broadcast receiving device. By using the digital broadcast receiving apparatus according to the present invention for viewing digital broadcasts, it is possible to stabilize the reception characteristics of a television for receiving and viewing digital broadcasts. ADVANTAGE OF THE INVENTION The receiving apparatus for digital broadcasting by this invention has the effect that the receiving characteristic of the television for digital broadcasting viewing / listening can be stabilized.

A video recording / reproducing apparatus for receiving, recording, and reproducing a digital broadcast includes a digital broadcast receiving apparatus. By using the digital broadcast receiving apparatus according to the present invention for recording and reproducing digital broadcasts, it is possible to stabilize the reception characteristics of the video recording / reproducing apparatus for receiving, recording, and reproducing digital broadcasts.
ADVANTAGE OF THE INVENTION The receiving apparatus for digital broadcasting by this invention has the effect which can stabilize the receiving characteristic of the video recording and reproducing apparatus for digital broadcasting recording and reproducing.

[0042]

According to the present invention, the C / N of the received signal is estimated in the digital modulation signal processing system, and the C / N of the received signal is estimated.
/ N signal is output according to the control microcomputer, and the control microcomputer controls the digital modulation signal processing system so that the digital modulation signal processing system performs the optimal operation according to the C / N of the received signal. The digital modulation signal processing system can be operated optimally by following the fluctuation even if the C / N of the received signal fluctuates, and the stable and good reception demodulation characteristics can always be obtained. Is obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of a digital broadcast receiving apparatus according to the present invention.

FIG. 2 is a block diagram showing a second embodiment of the digital broadcast receiving apparatus according to the present invention.

FIG. 3 is a block diagram showing a third embodiment of the digital broadcast receiving apparatus according to the present invention.

FIG. 4 is a block diagram showing a conventional example of a digital broadcast receiving device.

[Explanation of symbols]

1: received RF signal input terminal, 2: high-pass filter, 3
... preamplifier, 4 ... variable tuning filter, 5 ... RFAGC
Circuit, 6: Mixer, 7: Bandpass filter, 8: IF
AGC circuit, 9, quadrature detection circuit, 10: digital modulation signal processing system, 101: analog-to-digital converter, 102:
Digital demodulation circuit, 103: error correction circuit, 104: determination circuit, 105: transport stream output terminal,
11: PLL circuit for channel selection, 12: oscillation circuit, 13: 90
Degree phase shift circuit, 14 ... Oscillator, 15 ... Outdoor unit power input terminal, 16 ... Tuning power input terminal, 17 ... Clock terminal of control bus of frequency synthesizer, 18 ... Data terminal of control bus of frequency synthesizer, 19 ... Power terminal , 20
... Clock terminal of digital demodulation means and error correction means control bus, 21 ... Data terminal of digital demodulation means and error correction means control bus, 22 ... Front end, 23 ... Gain control circuit, 24 ... Quadrature detection means, 25 ... Low-pass filter, 26 ... Digital broadcasting receiver, 27 ... First C /
N signal output terminal, 28... Second C / N signal output terminal, 2
9: Third C / N signal output terminal, 30: Fourth C / N signal output terminal, 31: Microcontroller for control.

Continued on the front page (72) Inventor Masaki Noda 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Pref. Digital Media Development Division, Hitachi, Ltd. F-term in Hitachi Media Electronics Company (reference) 5C025 AA25 BA24 BA25 DA04 5C061 BB03 CC05 5C064 DA02 5K004 AA01 AA05 BA02 FA03 FA05 FA06 FG02 FH04 FK09 5K061 AA11 BB06 BB07 BB10 JJ06

Claims (8)

[Claims] A tuner section having at least a high-frequency input terminal, an oscillating means, and a quadrature detecting means; a digital modulation signal processing system having at least an analog-to-digital converter, a digitizing demodulating means and an error correcting means; A digital broadcast receiving apparatus comprising a tuner section and a microcontroller for controlling the digital modulation signal processing system, wherein the digital modulation signal processing system includes a signal input to the digital modulation signal processing system. Means for estimating noise power, at least two signal power to noise power signal output terminals for outputting a signal power to noise power signal corresponding to the noise power to the microcontroller, and control output from the microcontroller A control signal input terminal to which a signal is input, wherein the microcontroller comprises: A signal processing unit that outputs a control value of a control signal output from the microcontroller to control the digital modulation signal processing system according to the signal power to noise power signal output to the microcontroller. Broadcast receiver. 2. The digital broadcast receiving apparatus according to claim 1, wherein the microcontroller includes the tuner section and the digital modulation signal processing based on the signal power to noise power signal supplied from the digital modulation signal processing system. A digital broadcast receiver characterized by controlling a system. 3. The front end of the digital broadcast receiving apparatus according to claim 1, wherein the tuner section and the digital modulation signal processing system are integrated and housed in one housing. 4. The digital broadcast receiving apparatus according to claim 1, wherein the tuner section and the digital modulation signal processing system are integrated and housed in one housing. For receiving device. 5. At least channel selection demodulation means, decryption means, demultiplex means, digital decompression means,
5. A digital broadcast receiving apparatus comprising a video processing unit and an audio processing unit, to which a high-frequency digital modulation signal is input and outputs a video signal and an audio signal, wherein the channel selection demodulation unit is any one of claims 1 to 4. A digital broadcast receiving apparatus, characterized in that it is a digital broadcast receiving apparatus. 6. At least channel selection demodulation means, decryption means, demultiplex means, digital decompression means,
In a television receiving apparatus comprising a video processing unit, an audio processing unit, an image display unit, and a speaker, the tuning and demodulation unit is the digital broadcast receiving device according to any one of claims 1 to 4. A television receiver characterized by the above-mentioned. 7. At least channel selection demodulation means, decryption means, demultiplex means, digital decompression means,
A video recording / reproducing apparatus comprising a video processing means, an audio processing means, and a video recording / reproducing means, wherein the channel selecting / demodulating means is the digital broadcast receiving apparatus according to any one of claims 1 to 4. Video recording and playback device. 8. A tuner unit for receiving a digital modulation signal to be transmitted, a digital modulation signal processing unit for demodulating a digital modulation signal received and processed by the tuner unit, the tuner unit and the digital modulation A digital broadcast receiving device including a microcontroller that controls a signal processing unit, wherein the digital modulation signal processing unit detects noise power included in an input signal, and corresponds to the noise power. A signal power to noise power signal output terminal for outputting a signal power to noise power signal to the microcontroller, and a control signal input terminal to which a control signal output from the microcontroller is input; The digital modulation signal is generated by the signal power to noise power signal output from the modulation signal processing unit. Digital broadcast receiving apparatus and changes the control value of the control signal for controlling the processing section.