JP2001111915A - Receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve a problem of a conventional digital broadcast receiver that has a limitation of its miniaturization due to its large circuit scale because frequency conversion is executed twice in the conventional configuration where a receive digital broadcast signal is frequency-converted into an intermediate frequency signal, quadrature detection is executed at the intermediate frequency, and obtained I, Q signals are given to a digital modulation signal system. SOLUTION: In the digital broadcast receiver of this invention consisting of a tuner section that applies quadrature detection to a received digital broadcast signal and outputs I, Q signals and of a digital modulation signal processing system that receives the I, Q signals to execute digital demodulation and error correction, the digital modulation signal processing system outputs an amplitude control signal to the tuner section so that the amplitude of the I, Q signals given to the digital modulation signal processing system is kept constant, the tuner section keeps the output amplitude of the I, Q signals constant on the basis of the amplitude control signal outputted from the digital modulation signal processing system and applies quadrature detection to the received digital broadcast signal without converting its frequency into an intermediate frequency so as to realize a stable and suitable reception characteristic and the miniaturization of the circuit scale.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a shared receiver, and more particularly to digitally modulated broadcasting such as BPSK (Binary Phase Shift Keying) modulation, QPSK (Quadrature Phase Shift Keying) modulation, and 8PSK (8 Phase Shift Keying) modulation. The present invention relates to a receiving device that receives a signal.

[0002]

2. Description of the Related Art At present, digital TV broadcasting using 12 GHz band QPSK modulation using a communication satellite is performed as a digital TV broadcasting using satellites in Japan.
Digital TV broadcasting using BSPK modulation, QPSK modulation, and 8PSK modulation by a 2 GHz band broadcasting satellite is being planned. An example of a conventionally used digital satellite broadcast receiver is disclosed in JP-A-10-304276. FIG. 4 shows a main part of a conventional digital satellite broadcast receiver. 1 is a reception RF signal input terminal, 2 is a high-pass filter, 3 is a preamplifier, 4 is a tunable filter, 5 is an RFAGC amplifier, 6 is a mixer, 12 is a first oscillator, 11 is a frequency synthesizer, and 7 is a bandpass. A filter, 8 is an IFAGC amplifier, 14 is a second oscillator,
9 is a quadrature detection means, 13 is a 90-degree phase shifter, 22 is a front end, 10 is a digital modulation signal processing system, 101 is an analog-to-digital converter, 102 is digital demodulation means,
03 is an error correction means, 15 is an outdoor unit power input terminal, 16 is a tuning power input terminal, 17 is a clock terminal of a frequency synthesizer control bus, 18 is a data terminal of a frequency synthesizer control bus, 19 is a power terminal, and 20 is a digital terminal. Clock terminal of control bus for demodulation means and error correction means, 21 is data terminal of digital demodulation means and control bus for error correction means, 105 is output of transport stream which is digital demodulated and error corrected digital data. The terminal 26 is a digital broadcast receiving device.

Hereinafter, the operation of the conventional example shown in FIG. 4 will be described. Broadcast radio waves transmitted from a communication satellite or a broadcast satellite are in the 12 GHz band, and the received radio waves are frequency-converted into signals in the 1 to 2 GHz band in an outdoor unit (not shown) and output to a digital broadcast receiving device. The digitally modulated RF signal of the 1-2 GHz band supplied from the outdoor unit is input from the reception RF signal input terminal 1 to the front end 22. The input RF signal is subjected to unnecessary wave removal and amplification by a high-pass filter 2, a preamplifier 3, and a tunable filter 4, and a signal level input to a mixer 6 is controlled by an RFAGC amplifier 5, whereby the mixer 6 and the first The frequency conversion means composed of the oscillator 12 and the frequency synthesizer 11 causes the control microcomputer (not shown) of the receiver to apply the information to the data terminal 17 and the clock terminal 18 of the frequency synthesizer control bus in accordance with the information applied to the desired channel of the received RF signal. Is, for example, a frequency of 47
It is converted to a 9.5 MHz intermediate frequency signal. Mixer 6
The intermediate frequency signal output from the multiplexor is input to the quadrature detector 9 via the band-pass filter 7 and the IFAGC amplifier 8, and the quadrature detector 9 outputs a 90-degree phase shifter based on the output of the second oscillator 14. The phase generated at 13 is 90
The signals are multiplied by two different carrier signals and input to the digital modulation signal processing system 10 as an I signal and a Q signal, respectively. The I signal and the Q signal are converted into digital signals by an analog / digital converter 101 inside the digital modulation signal processing system 10, and are digitally demodulated by a digital demodulation circuit 102. The digitally demodulated signal is supplied to the error correction means 103, subjected to error correction by processing such as error decoding and deinterleaving, and output from the transport stream output terminal 105.

In order to realize good demodulation characteristics, it is necessary to keep the amplitudes of the I and Q signals input to the digital modulation signal processing system 10 constant, and the amplitudes of the I and Q signals are kept constant. The amplitude control information is generated by detecting the amplitudes of the I signal and the Q signal inside the digital modulation signal processing system 10 in order to control the amplitude so that
The amplitude control signal generated based on the amplitude control information is fed back to the AGC amplifier 5 and the IFAGC amplifier 8, and the RFAG
Feedback control of the gain of the C amplifier 5 and the IFAGC amplifier 8 is performed. The digital modulation signal processing system 10 is controlled by information applied to a clock terminal 20 and a data terminal 21 of a control bus for digital demodulation means and error correction means from a control microcomputer (not shown).

[0005]

However, in the above-described conventional configuration, the received RF signal is frequency-converted into an intermediate frequency signal by a mixer, and is again multiplied by a quadrature detection means, so that each of the I signal and the Q signal is obtained. Since the frequency conversion is performed twice such as obtaining a baseband signal, the circuit scale is increased.

In recent digital broadcast receivers, downsizing has been demanded, and a large circuit size in the above-described conventional configuration can be a serious drawback.

To realize a front-end device which reduces the circuit scale by performing the overlapping frequency conversion means at one time, and furthermore, a demodulation system is provided to keep the demodulation process of the digitally modulated broadcast signal with good characteristics. It is important to keep the input signal amplitude constant.

It is an object of the present invention to provide a receiving apparatus which can reduce the size of a circuit by reducing the circuit scale and can receive a digital satellite broadcast signal with good receiving characteristics.

[0009]

One feature of the present invention is that
In a digital broadcast receiving apparatus including a tuner section and a digital modulation signal processing system, the tuner section includes:
It has orthogonal detection means for performing quadrature detection at the frequency of the received RF signal input from the F signal input terminal, and the frequency of the signal input to the orthogonal detection means is determined by converting the received RF signal input from the high frequency input terminal to the intermediate frequency. A quadrature detection operation is performed without frequency conversion into a signal.

Another feature of the present invention is that in a shared receiving apparatus provided with a tuner section and a digital modulation signal processing system, the tuner section performs quadrature detection at a frequency of a received RF signal input from a high frequency input terminal. A quadrature detection means for performing the operation, a gain control circuit is provided in front of the quadrature detection means, and the digital modulation signal processing system detects the amplitude of a signal input to the digital modulation signal processing system, and outputs the signal to the gain control circuit of the tuner unit. It is to maintain the amplitude of a signal input to the digital modulation signal processing system at a constant value by performing feedback control.

Specifically, the digital modulation signal (8
A high-frequency input terminal for receiving a PSK modulation signal, a QPSK modulation signal, a BPSK modulation signal, and the like, and converting a reception digital signal into I (In-Phase) and Q (Quadrature) in the frequency band of the reception signal.
-Phase) means for quadrature detection into two signals, local oscillation circuit for quadrature detection also for the purpose of selecting a desired signal, gain control means provided in front of quadrature detection means, I / Q signal analog-to-digital conversion Means, digitally demodulating means for digitally demodulating the output signal of the analog-to-digital conversion means, performing error correction on the output signal of the digitized demodulating means,
It includes error correction means for outputting a transport stream which is a digital signal, analog-to-digital conversion means, digitization demodulation means, and error correction means, and detects the amplitude of a signal input to a digital modulation signal processing system, and detects the amplitude. A digital modulation signal processing system having a function of outputting a corresponding signal.

[0012]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a first embodiment of a digital broadcast receiving apparatus according to the present invention. 1 is a reception RF signal input terminal, 2 is a high-pass filter for suppressing an interference wave, 3 is a preamplifier circuit, 23 is a gain control circuit, 24 is a quadrature detection of a digital modulation signal, and I (In Phase) and Q
(Quadrature Phase) two signal orthogonal detection means, 25
Is a low-pass filter, 12 is a local oscillator circuit, 11 is a PLL circuit for channel selection, 15 is an outdoor unit power input terminal, 16 is a tuning power input terminal, and 17 is a PLL circuit 1
1, a clock signal terminal of a bus for transmitting information for controlling
18 is a data signal terminal of a bus for transmitting information for controlling the PLL circuit 11, 19 is a power supply terminal, 10 is a digital modulation signal processing system, 101 is an analog-to-digital converter, 102
Is a digital demodulation means, 103 is an error correction means, 105
Denotes a transport stream output terminal, 20 denotes a bus data terminal for controlling the digital modulation signal processing system, 21 denotes a bus clock terminal for controlling the digital modulation signal processing system, and 26 denotes a digital broadcast receiving device. .

Hereinafter, the operation of the embodiment shown in FIG. 1 will be described in detail.

From the reception RF input terminal 1, a digitally modulated signal (modulation system is, for example, a BPSK system, a QPSK system, an 8PSK system, and a broadcast reception signal of about 1 to 2 GHz band) is input. The input digital modulation signal is suppressed by a high-pass filter 2 to remove an interfering wave, and is amplified by a preamplifier 3. The amplitude is controlled by a gain control circuit 23 and input to a quadrature detector 24. Quadrature detection means 2
4, the received signal is multiplied by an oscillation signal output from the local oscillation circuit 12 that is output as two signals that are different from each other by 90 degrees in the 90-degree phase shift circuit 13, and an I signal,
Output as Q signal. Here, the local oscillation circuit 12
Is controlled by the output signal of the tuning PLL circuit 11, and the signal of the desired broadcasting station is selected (selected) by the quadrature detection means 24. The output signal of the tuning PLL circuit 11 is supplied to the data terminal 17 of the control bus of the PLL circuit 11,
It is controlled by information respectively applied to the clock terminals 18. The output signal of the tuning PLL circuit 11 is superimposed on the voltage applied to the tuning power supply terminal 16 and
Control the oscillation frequency of

The I signal and the Q signal output from the quadrature detection means 24 are suppressed by a low-pass filter 25 so as to suppress harmonics, and are input to the digital modulation signal processing system 10.
The I signal and the Q signal are converted into a digital modulation signal by an analog-to-digital converter 101 in the digital modulation signal processing system 10. The digitally modulated I and Q signals are demodulated by the digitizing demodulation means 102 and then supplied to an error correction means 103 where they are error-corrected by processing such as error decoding and deinterleaving, and output from a transport stream output terminal 105. Is done.

In order to realize good demodulation characteristics, it is necessary to keep the amplitudes of the I signal and the Q signal input to the digital modulation signal processing system 10 constant. In order to control the amplitude so that the amplitudes of the I signal and the Q signal are kept constant, amplitude control information is generated by detecting the amplitudes of the I signal and the Q signal inside the digital modulation signal processing system 10, The signal is output to the gain control means 23 as an amplitude control signal. The gain control means 23 receives the amplitude control signal and controls the gain so that the amplitudes of the I signal and the Q signal input to the digital modulation signal processing system 10 are kept constant. Here, the gain control circuit 23 is designed to operate satisfactorily at a signal frequency of about 1 to 2 GHz band input to the reception RF signal input terminal 1.

According to this embodiment, the quadrature detection means 24 performs quadrature detection on the digitally modulated broadcast signal input from the reception RF signal input terminal 1 without frequency conversion.
The signal can be supplied to the digital modulation signal processing system 10, and the circuit scale can be significantly reduced as compared with a conventional method in which a received signal is frequency-converted into an intermediate frequency signal and then subjected to quadrature detection. . As a result, the size of the digital broadcast receiving device 26 can be reduced. Also, the gain control circuit 2
3 is capable of performing feedback control so that the input amplitude value of the digital modulation signal processing system 10 can be kept constant, so that stable and good demodulation characteristics can be maintained. And, compared to the conventional example, the number of blocks for varying the gain is reduced,
This can reduce the number of locations that need to be adjusted during production, and have the effect of improving productivity.

FIG. 2 is a block diagram showing a second embodiment of the digital broadcast receiving apparatus according to the present invention. Functional blocks having the same functions as those of the above-described embodiment are denoted by the same reference numerals, and description thereof is omitted. 231, a first amplifier provided in the gain control circuit 23; 232, a first variable attenuator provided in the gain control circuit 23; 233, a second amplifier provided in the gain control circuit 23; This is a second variable attenuator provided in the control circuit 23.

Hereinafter, the operation of the embodiment shown in FIG. 2 will be described in detail.

The gain control circuit 23 shown in this embodiment
The first amplifier 231 and the second amplifier 233 are amplifiers having fixed gains, and the gains cannot be changed. The first variable attenuator 232 and the second variable attenuator 234 in the gain control circuit 23 are attenuators capable of changing the degree of attenuation.

The digital modulation signal input from the receiving RF signal input terminal 1 is suppressed by a high-pass filter 2 to remove an interference wave, amplified by a preamplifier 3, and then input to a gain control circuit 23. The digital modulation signal input to the gain control circuit 23 is amplified by the first amplifier 231 and then attenuated by the first variable attenuator. The signal is further amplified by the second amplifier, then attenuated by the second variable attenuator, output from the gain control circuit 23, and supplied to the quadrature detector 24. The operation after the quadrature detection means is the same as the operation of the embodiment shown in FIG.

The first variable attenuator 2 in the gain control circuit 23
The attenuation of the variable attenuator 32 and the second variable attenuator 234 is controlled by an amplitude control signal output from the digital modulation signal processing system 10.
The gain control circuit 23 keeps the amplitude of the I signal and the Q signal input to the digital modulation signal processing system 10 at a constant value, that is, the signal intensity of the digital modulation signal input to the reception RF signal input terminal 1 is large. Sometimes the first variable attenuator 2
32 and the second variable attenuator 234 are set to be large, the output level of the gain control circuit 23 is reduced, and the signal intensity of the digital modulation signal input to the reception RF signal input terminal 1 is small. Are controlled so that the attenuation amounts of the variable attenuator 232 and the second variable attenuator 234 are set to be small and the output level of the gain control circuit 23 is increased.

In the gain control circuit 23, the first and second amplifiers 231 and 233 are connected to the first and second variable attenuators 232 and 23, respectively.
4, the noise figure characteristic of the gain control circuit can be improved, and therefore, the noise figure characteristic of the entire digital broadcast receiving apparatus 26 can be improved.
It is possible to improve reception demodulation characteristics.

In this embodiment, the number of blocks of each of the amplifier and the variable attenuator in the gain control circuit 23 is two, but the same effect can be obtained even if each of them is one block. Even with the above, the same effect can be obtained.

FIG. 3 is a block diagram showing a third embodiment of the digital broadcast receiving apparatus according to the present invention. Functional blocks having the same functions as those of the above-described embodiment are denoted by the same reference numerals, and description thereof is omitted. Reference numeral 22 denotes a front end, and 19 denotes a power terminal of the front end 23.

Hereinafter, the operation of the embodiment shown in FIG. 2 will be described in detail.

The front end 22 includes a high-pass filter 2, a preamplifier 3, a gain control circuit 23, and a quadrature detector 2.
4, low-pass filter 25, digital modulation signal processing system 1
0, an oscillator 12, a tuning PLL circuit 11, and a 90-degree phase shift circuit 13 in a single housing, and a reception RF input terminal 1, an outdoor unit power input terminal 15, a tuning power input terminal 16, and a PLL. A clock signal terminal 17 of a bus for transmitting information for controlling the circuit 11, a data signal terminal 18, a power supply terminal 19, a transport stream output terminal 105 of the bus for transmitting information for controlling the PLL circuit 11, and a digital modulation signal processing system. The data terminal 20 of the bus to be controlled,
A clock terminal 21 of a bus for controlling the digital modulation signal processing system, as an input / output terminal of the front end 22,
The receiving RF signal input terminal 1 is a digital broadcast receiving device 26.
Also functions as a terminal.

The above-described functional blocks are integrated and integrated into one housing, so that the digital broadcast receiving device 26
This has the effect of blocking unnecessary signals such as noise generated by other functional blocks (not shown) in the front end 2.
2, the high-frequency signal characteristics and the like are improved, and as a result, the effect of improving the reception demodulation characteristics is obtained. In addition, an effect of suppressing the influence of the noise generated by the front end 22 on the outside can be obtained, and an effect of improving the reception characteristics of the entire digital broadcast receiving apparatus 26 can be obtained. Further, the integration as the front end 22 makes it possible to handle a series of functional blocks from the reception RF signal input terminal 1 to the transport stream output terminal 105 as one component. Or an effect that makes it easy to handle during production.

A television for receiving and viewing a digital broadcast has a built-in digital broadcast receiving device. By using the digital broadcast receiving apparatus according to the present invention for viewing digital broadcasts, it is possible to reduce the size of a television for receiving and viewing digital broadcasts. ADVANTAGE OF THE INVENTION The receiving apparatus for digital broadcasting by this invention has the effect which can reduce the television for digital broadcasting viewing and listening.

A video recording / reproducing apparatus for receiving, recording, and reproducing a digital broadcast includes a digital broadcast receiving apparatus. By using the digital broadcast receiving apparatus according to the present invention for recording and reproducing digital broadcasts, it is possible to reduce the size of the video recording and reproducing apparatus for receiving, recording, and reproducing digital broadcasts. ADVANTAGE OF THE INVENTION The receiving apparatus for digital broadcasting by this invention has the effect that the video recording / playback apparatus for digital broadcast recording / playback can be miniaturized.

[0032]

According to the present invention, when quadrature detection of a received digital modulation signal is performed, the received digital modulation signal is subjected to quadrature detection at the received frequency without frequency conversion. The circuit can be dispensed with, and the size of the receiving device can be reduced.

Further, the digital modulation signal processing system detects the amplitude of a signal input to the digital modulation signal processing system,
Outputting an amplitude control signal for keeping the signal amplitude input to the digital modulation signal processing system constant, and controlling the gain by receiving the amplitude control signal in a gain control circuit provided in a stage preceding the quadrature detection means. Thereby, the amplitude of the signal input to the digital modulation signal processing system is kept constant, and the effect of obtaining stable and good reception demodulation characteristics is obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of a receiving device according to the present invention.

FIG. 2 is a block diagram showing a second embodiment of the receiving device according to the present invention.

FIG. 3 is a block diagram showing a third embodiment of the receiving apparatus according to the present invention.

FIG. 4 is a block diagram showing a conventional example of a receiving apparatus.

[Explanation of symbols]

1 ... Reception RF signal input terminal, 2 ... High pass filter, 3 ... Preamplifier, 4 ... Variable tuning filter, 5 ... RFAGC circuit, 6 ... Mixer, 7 ...
・ Band pass filter, 8 ... IFAGC circuit, 9 ・
..Quadrature detection circuit, 10 ... digital modulation signal processing system, 101 ... analog-to-digital converter, 102 ...
.Digitalization demodulation circuit, 103 ... error correction circuit, 1
05 ··· Transport stream output terminal
..PLL circuit for channel selection, 12 ... oscillator circuit, 13 ...
・ 90 ° phase shift circuit, 14 ・ ・ ・ Oscillator, 15 ・ ・ ・ Outdoor unit power input terminal, 16 ・ ・ ・ Tuning power input terminal,
17: Clock terminal of frequency synthesizer control bus, 18: Data terminal of control bus of frequency synthesizer, 19: Power supply terminal, 20: Clock terminal of control bus for digitizing demodulation means and error correction means , 21 ・
..Data terminals of control buses for digitizing demodulation means and error correction means, 22: front end, 23: gain control circuit, 231, first amplifier, 232 ... first variable attenuation , 233... Second amplifier, 234.
. A second variable attenuator, 24 ... orthogonal detection means, 25.
.. a low-pass filter, 26... A receiving device for digital broadcasting.

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Masaki Noda 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside Digital Media Development Division, Hitachi, Ltd. Address Hitachi Media Electronics Co., Ltd. F-term (reference)

Claims (9)

[Claims] 1. A receiving apparatus comprising a tuner section having a high-frequency input terminal, an oscillating means, a quadrature detecting means, a digital modulation signal processing system having an analog-to-digital converting means, a digitizing demodulating means and an error correcting means, The tuner unit has at least one gain control unit, the quadrature detection unit operates in a frequency band of a signal input from the high frequency input terminal, and the digital modulation signal processing system adjusts an amplitude of the input signal. A receiving apparatus comprising: means for detecting; outputting an amplitude control signal to the gain control means so that the amplitude becomes a constant value; and performing feedback control on the gain control means. 2. The digital modulation signal processing system according to claim 2, wherein said quadrature detection means outputs a baseband signal obtained by multiplying the input digital modulation signal by an oscillation signal generated by said oscillation means to said digital modulation signal processing system. The receiving device according to claim 1, wherein 3. The receiving apparatus according to claim 1, wherein said gain control means is provided before said quadrature detection means. 4. The gain control means includes an amplifier circuit having a fixed gain, and a variable attenuation circuit capable of changing an attenuation degree, wherein the attenuation degree of the variable attenuation circuit is determined by the digital modulation signal processing. 4. The receiving device according to claim 3, wherein the receiving device is controlled by an amplitude control signal output from a system. 5. The receiving apparatus according to claim 3, wherein the attenuation of the variable attenuation circuit is controlled by converting an amplitude control signal output from the digital modulation signal processing system into a voltage value. 6. The digital signal processing system according to claim 1, wherein said tuner section and said digital modulation signal processing system are integrated.
The receiving device according to any one of the above. 7. A digital signal processing system according to claim 1, further comprising a terminal for outputting an output signal of said digital modulation signal processing system.
7. The receiving device according to any one of claims 6 to 6. 8. The receiving device according to claim 1, further comprising display means for displaying an image based on an output signal of said digital modulation signal processing system. 9. The receiving apparatus according to claim 1, further comprising a recording / reproducing means for recording / reproducing an output signal of said digital modulation signal processing system.