JP2002009863A - Reception device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a reception device having a smaller bit error rate to the reception signal of a wide dynamic range. SOLUTION: Signals which are gain-controlled by a first gain control circuit 2 are orthogonally detected by orthogonal detectors 3 and 4 and an I signal and a Q signal are outputted. A second gain control circuit 5 controls the gain of the I signal. A third gain control circuit 6 controls the gain of the Q signal. The I signal and/or the Q signal as control signals to a first gain control circuit 2, the I signal as the control signal to a second gain control circuit 5 and the Q signal as the control signal to a third gain control circuit 6 are obtained from a digital demodulation part 11 and supplied to the control circuits, respectively.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a receiving apparatus for receiving digital broadcasting such as digital satellite broadcasting, terrestrial broadcasting, and CATV.

[0002]

2. Description of the Related Art A receiving apparatus for receiving digital satellite broadcasting receives a radio wave from a satellite with a parabolic antenna, converts the frequency into a first intermediate frequency signal (first IF signal) with an outdoor converter, and a tuner section at the next stage. , Quadrature detection, and baseband I (Inphase) signal and Q (Quadrature)
The signal is converted to a signal, and digitally demodulated by a digital demodulation unit at the next stage. In some devices, the first IF signal is not directly converted into I and Q signals in the baseband, but the first IF signal is once converted into a second intermediate frequency signal (second IF signal) and then subjected to quadrature detection.

On the other hand, a receiving apparatus for receiving digital terrestrial broadcasting converts the frequency of an RF signal received by an antenna into an IF signal in a next-stage tuner section, and digitally demodulates the IF signal in a next-stage digital demodulation section. . Note that the first IF signal is not directly demodulated by the digital demodulator,
There is also a device for temporarily converting an IF signal into a second intermediate frequency signal (second IF signal) and then performing quadrature detection.

[0004] A receiving device for receiving digital terrestrial broadcasts includes:
The configuration is almost the same as that of the receiving apparatus for receiving the digital terrestrial broadcast, except that the frequency-converted IF signal is frequency-converted again, and the second IF signal is digitally demodulated by the digital demodulation unit at the next stage. There is also a device that converts the second IF signal into a third intermediate frequency signal (second IF signal) and then performs quadrature detection.

Such a receiving apparatus is disclosed in, for example,
This publication further discloses digital satellite broadcasting, digital terrestrial broadcasting, and the like.
Although a sharing device for receiving digital terrestrial broadcasting is disclosed, it discloses a circuit sharing of a quadrature detection unit.

[0006]

In digital broadcasting, the dynamic range of a received input signal is wide, and the level range of the input level is large. Therefore, unless the input level is set within a predetermined range, appropriate signal processing cannot be performed. As a result, bits of digital data are incorrectly processed and bit
The error rate will increase.

Therefore, it is necessary to provide a gain control circuit in the signal processing system and increase the gain control amount supplied by the gain control circuit.

In the conventional receiving apparatus, gain control is performed on the high frequency signal and the intermediate frequency signal, but there is a problem that it is difficult to secure a sufficient gain control amount. There is also a problem that the noise figure characteristic when a weak electric field is input is deteriorated.

[0009] Further, for the shared reception of satellite broadcasting, terrestrial broadcasting, and CATV, only the sharing of the IQ quadrature detection unit is being studied, and the sharing of the level detection unit for performing digital signal processing and the digital demodulation unit is discussed. Not considered.

An object of the present invention is to provide a receiving apparatus having a low bit error rate for a received signal having a wide dynamic range.

[0011]

According to the present invention, in a receiving apparatus for receiving a digitally modulated signal, a first gain control circuit for controlling a gain of a received signal, and a gain control by the first gain control circuit. Quadrature detector that performs quadrature detection on the extracted signal to output an I signal and a Q signal, a second gain control circuit that controls the gain of the I signal, and a third gain control that controls the gain of the Q signal A digital-to-analog (D / A) converter that converts each signal whose gain is controlled by the second and third gain control circuits into a digital signal, and a digital demodulation unit that digitally demodulates the digital signal. Controlling the I signal and / or the Q signal as a control signal to the first gain control circuit, controlling the I signal as a control signal to the second gain control circuit, controlling the third gain control circuit As a signal The serial Q signals, a receiving apparatus and supplying obtained from the digital demodulation unit.

According to the present invention, in a receiving apparatus for receiving a digitally modulated signal, a first gain control circuit for controlling a gain of the received signal, and a signal whose gain has been controlled by the first gain control circuit are provided. A quadrature detector that outputs an I signal and a Q signal by performing quadrature detection, an A / D converter having a digital signal processing circuit configuration that converts the I signal and the Q signal into respective digital signals, and a gain of the I signal Control the second
A gain control circuit, a third gain control circuit for controlling the gain of the Q signal, and a digital demodulation unit for digitally demodulating the digital signal gain-controlled by the second and third gain control circuits. And the I signal and / or the Q signal as a control signal to the first gain control circuit, the I signal as a control signal to the second gain control circuit, and the control signal to the third gain control circuit. A receiving device, wherein the Q signal is obtained as a control signal from the digital demodulation unit and supplied.

The present invention also provides a digitally modulated first
And a receiver for receiving the second signal, a first gain control circuit for controlling the gain of the first received signal, and an I signal by performing quadrature detection on the signal whose gain has been controlled by the first gain control circuit. A quadrature detector for outputting a Q signal and a Q signal;
A second gain control circuit for controlling the gain of the signal, a third gain control circuit for controlling the gain of the Q signal, a fourth gain control circuit for controlling the gain of the second received signal, A frequency conversion circuit for frequency-converting the signal whose gain has been controlled by the fourth gain control circuit, a fifth gain control circuit for controlling the gain of the frequency-converted second received signal,
A digital demodulation unit for digitally demodulating a signal whose gain has been controlled by the third and fifth gain control circuits, wherein the I signal and / or the Q signal are used as control signals to the first gain control circuit. The I signal as a control signal to a second gain control circuit, the Q signal as a control signal to the third gain control circuit, and the Q signal as a control signal to the fourth and fifth gain control circuits. 2. The receiving device according to claim 1, wherein the receiving signal is obtained from the digital demodulation unit and supplied.

Further, according to the present invention, when the received signal level is low, the second and third gain control circuits perform gain control, and as the received signal level increases, the first gain control circuit performs gain control. This is a receiving device characterized by applying.

Further, according to the present invention, in the digital demodulation section,
A first detector having a digital signal processing circuit configuration for detecting a level of an I signal, a second detector having a digital signal processing circuit configuration for detecting a level of a Q signal, and the first and second detectors. A generator for generating a third detection output from the output; and a synchronization detector for detecting whether or not the digital demodulation unit is in a synchronous state. When the digital demodulation unit is not in the synchronous state, the third detection signal is output. Control the first, second, and third gain control circuits, and when the digital demodulation unit is in a synchronized state,
The second gain control circuit is controlled by the detection level signal of the I signal, the third gain control circuit is controlled by the detection level signal of the Q signal, and the first gain is controlled by the third detection signal. A receiving device for controlling a control circuit.

Further, according to the present invention, the digital demodulation section comprises:
The first I signal and the first Q signal of the quadrature detected output of the first received signal and the second I signal and the second Q signal of the quadrature detected output of the second received signal are , A switch for selecting in accordance with a received signal, a first detector of a digital signal processing circuit configuration for detecting the level of the first or second I signal of the switch output, and a first or second Q. A second detector having a digital signal processing circuit configuration for detecting a signal level, a generator for generating a third detection output from the outputs of the first and second detectors, and the digital demodulator being in a synchronized state And a synchronous detector for detecting whether or not there is a digital demodulator. If the synchronous detector is not in a synchronous state, the first, second, and third gain control circuits are controlled by the third detection signal, and a digital demodulator is provided. Are synchronized, the detection level signal of the I signal is Controlling the second gain control circuit, controlling the third gain control circuit with the detection level signal of the Q signal, and controlling the first gain control circuit with the third detection signal. It is a receiving device characterized by the following.

Further, according to the present invention, the digital demodulation section comprises:
An error correction circuit is provided, wherein at least a part of an error correction circuit used for demodulating the first received signal and at least a part of an error correction circuit used for demodulating the second received signal are shared. Is a receiving device.

Further, according to the present invention, the digital demodulation section comprises:
A complex multiplier, a filter, and an error correction circuit;
And at least a part of the complex multiplier, filter, and error correction circuit used for demodulating the second received signal. A receiving device characterized in that:

[0019]

FIG. 1 is a block diagram showing a first embodiment of a receiving apparatus according to the present invention.
It is a figure showing composition of an embodiment.

The digitally modulated signal is input from a terminal 1 and gain controlled by a control signal 15 by a gain control circuit 2. An output signal from the gain control circuit 2 is subjected to quadrature detection by a quadrature detector including a mixer 3 and a mixer 4, and is output as a substantially baseband signal of an I (Inphase) signal 16 and a Q (Quadrature) signal 17, respectively. I (Inphase) signals 16 and Q which are baseband signals
The (Quadrature) signal 17 is input to the gain control circuit 5 and the gain control circuit 6, respectively.
The gain is controlled by 3,14. The signals whose gains are controlled by the gain control circuits 5 and 6 are input to an A / D converter 9 and an A / D converter 10 via a filter 7 and a filter, respectively, are converted into digital signals, and are converted into digital signals by a digital demodulation unit. After being digitally demodulated at 11, it is output as a demodulated signal 12.

In FIG. 1, the signal input from the terminal 1 may be the first intermediate frequency signal (first IF signal) or the second intermediate frequency signal (second IF signal) in the case of satellite broadcasting.
IF signal). The signal input from the terminal 1 may be an RF signal or an IF signal in the case of terrestrial broadcasting or CATV broadcasting.

In the present embodiment, gain control of a received signal is performed using a baseband signal. Since the frequency of the baseband signal is lower than that of the intermediate frequency signal, the gain is easily controlled, and the range of the gain control is easily set. Therefore,
According to the present embodiment, it is possible to obtain a receiver having a low bit error rate for a received signal having a wide input dynamic range.

FIG. 2 is a diagram showing the characteristics of the gain control amount with respect to the received electric field of the gain control circuit 2 for controlling the gain of the input signal and the gain control circuits 5 and 6 for controlling the gain of the baseband signal in FIG. It is. A characteristic 18 indicates a gain control characteristic of the gain control circuit 2, and a characteristic 19 indicates a gain control characteristic of the gain control circuits 5 and 6. Here, the characteristic 18 has an offset of 0 to A with respect to the characteristic 19. That is, in the gain control circuit 2, the gain control does not work when the reception electric field is 0 to A, and the gain control works only when the reception electric field is A or more. On the other hand, the gain control circuits 5 and 6 perform gain control if there is a received electric field.

As described above, when the received electric field is weak, only the gain control circuits 5 and 6 perform gain control, and when the received electric field becomes large, both the gain control circuits 2 and 5 and 6 perform gain control. easy. As described above, by properly using the gain control by the gain control circuit 2 and the gain control circuits 5 and 6 according to the strength of the reception electric field, the gain control of the gain control circuit 2 does not work particularly when the reception electric field is weak. It is possible to suppress deterioration of the noise figure characteristic when a weak electric field is input.

FIG. 3 is a diagram showing the configuration of the second embodiment of the receiving apparatus of the present invention. A digitally modulated signal is input from terminal 1 and gain control circuit 2 controls control signal 1.
5 is gain-controlled. An output signal from the gain control circuit 2 is subjected to quadrature detection by a quadrature detector including a mixer 3 and a mixer 4, and an I (Inphase) signal 16 and a Q
(Quadrature) The signal 17 is output almost as a baseband signal. I (Inphase) which is a baseband signal
A signal 16 and a Q (Quadrature) signal 17 are respectively passed through filters 7 and 8 to an A / D converter 9 and an A / D
The signal is converted into a digital signal by the converter 10 and input to the gain control circuit 5 and the gain control circuit 6, respectively. The gain control circuit 5 and the gain control circuit 6 are controlled in gain by control signals 13 and 14, and the signals subjected to the gain control are digitally demodulated by a digital demodulation unit 11 and then output as a demodulated signal 12. Here, the gain control circuit 5 and the gain control circuit 6 have a digital signal processing circuit configuration, and the control signal is also a digital signal from the digital demodulation unit 11.

In FIG. 3, the signal input from terminal 1 may be the first intermediate frequency signal (first IF signal) or the second intermediate frequency signal (second IF signal) in the case of satellite broadcasting.
IF signal). The signal input from the terminal 1 may be an RF signal or an IF signal in the case of terrestrial broadcasting or CATV broadcasting.

Also in the present embodiment, gain control of a received signal is performed using a baseband signal. Since the frequency of the baseband signal is lower than that of the intermediate frequency signal, the gain is easily controlled, and the range of the gain control is easily set. Therefore, according to the present embodiment, it is possible to obtain a receiver having a low bit error rate for a received signal having a wide input dynamic range. Also, according to the present embodiment, since the baseband band gain control circuit 5 and gain control circuit 6 have a digital signal processing circuit configuration, the gain control circuit 5 and the gain control circuit 6 are not susceptible to variations in components constituting the circuit, and have good gain control. Properties can be obtained. Further, the characteristics of the gain control amount with respect to the reception electric field of the gain control circuit 2 for controlling the gain of the input signal and the gain control circuits 5 and 6 for controlling the gain of the signal in the baseband are as shown in FIG. It is possible to suppress deterioration of the noise figure characteristic when a weak electric field is input.

FIG. 4 is a diagram showing the configuration of a third embodiment of the receiving apparatus of the present invention. As a digitally modulated signal, for example, a first IF signal or a second IF signal of satellite broadcasting is input from a terminal 1, and gain control is performed by a gain control circuit 2 by a control signal 15. An output signal from the gain control circuit 2 is subjected to quadrature detection by a quadrature detector including a mixer 3 and a mixer 4, and is output as a substantially baseband signal of an I (Inphase) signal 16 and a Q (Quadrature) signal 17, respectively. The baseband signal I (Inphas
e) The signal 16 and the Q (Quadrature) signal 17 are input to the gain control circuit 5 and the gain control circuit 6, respectively.
The gain is controlled by control signals 13 and 14. The signals whose gains are controlled by the gain control circuits 5 and 6 are respectively filtered by filters 7
The signal is input to an A / D converter 9 and an A / D converter 10 via a filter and a filter, is converted into a digital signal, is digitally demodulated by a digital demodulation unit 11, and is output as a demodulated signal 12.

On the other hand, for example, an RF signal of a terrestrial broadcast or a CATV broadcast as a digitally modulated signal is supplied to a terminal 2
0, and the gain is controlled by the control signal 26 in the gain control circuit 21. An output signal from the gain control circuit 21 is frequency-converted by the mixer 22 and output as an IF signal. This IF signal is input to the gain control circuit 23, and the gain is controlled by the control signal 27. The signal whose gain is controlled by the gain control circuit 23 passes through a filter 24,
The signal is converted into a digital signal by the A / D converter 25, digitally demodulated by the digital demodulation unit 11, and output as a demodulated signal 28. Here, the digital demodulation unit 11 is a digital demodulation unit that can demodulate a satellite broadcast signal input from the terminal 1 and a terrestrial or CATV broadcast signal input from the terminal 20, and a demodulation circuit for demodulating the satellite broadcast signal and a terrestrial broadcast or At least a part of a demodulation unit for demodulating CATV broadcast is shared.

Also in the present embodiment, gain control of a received signal is performed using a baseband signal. Since the frequency of the baseband signal is lower than that of the intermediate frequency signal, the gain is easily controlled, and the range of the gain control is easily set. Therefore, according to the present embodiment, it is possible to obtain a receiver having a low bit error rate for a received signal having a wide input dynamic range. Further, according to the present embodiment, since at least a part of the digital demodulation unit for the satellite broadcast signal input from terminal 1 and the terrestrial or CATV broadcast signal input from terminal 20 is shared, the circuit configuration is simplified. And power consumption can be reduced. Further, a gain control circuit 2 for controlling the gain of the input signal and gain control circuits 5 and 6 for controlling the gain of the baseband signal.
By setting the characteristic of the gain control amount with respect to the received electric field as shown in FIG. 2, it is possible to suppress the deterioration of the noise figure characteristic when the weak electric field is input.

FIG. 5 is a diagram showing the configuration of the digital demodulator 11 shown in FIGS. As input, the baseband IQ signals 29 and 30 converted into digital signals by the A / D converters 9 and 10 in FIGS. 1 and 3 are input, and the signal level is passed through a complex multiplier 32 and a filter 33. The signals are input to the detectors 34 and 35. Detection signals from the level detectors 34 and 35 are supplied to filters 37 and 38 and D /
Via the A converters 40 and 41, the detection signal 49 and the detection signal 50 are input to the switch 43. Similarly, the detection signals from the level detectors 34 and 35 take the sum or the sum of the squares of the detection signals from the level detectors 34 and 35 in an adder 36, and are switched via a filter 39 and a D / A converter 42. Input to the detector 43 as a detection signal 51. The switch 43 is controlled based on a control signal 46 from the synchronization detector 45.

The baseband IQ signals 29 and 30 after quadrature detection of the satellite broadcast reception signal are output to the complex multiplier 3.
2. The signal is input to the synchronous reproduction circuit 54 via the filter 33, and is then input to the error correction circuit 60 including the Viterbi decoder 58 and the RS (Reed-Solomon) decoder 59, where the error is corrected and DEMAX (multiplex separation) is performed. In the circuit 61,
A demodulated signal 12 is output.

Here, the signal from the synchronous reproducing circuit 54 is input to the synchronous detector 45, and a control signal 46 determines whether the carrier reproducing system and the timing reproducing system of the demodulation unit are synchronized.
Output as When the control signal 46 indicates that the signals are not synchronized, the received signals input to the level detectors 34 and 35 are phase-rotated, and thus the individual detection signals from the level detectors 34 and 35 are not detected. It is not possible to detect an accurate received signal level only by the above. Therefore, the switch 43 outputs detection signals 49 and 50 based on a control signal 46 from a synchronization detector 45 for detecting that the carrier reproduction system and the timing reproduction system of the demodulation unit are synchronized.
8. If the control signal 46 indicates that synchronization has not been detected, the detection signal 51 is selected and output 67 and 68 instead of the detection signals 49 and 50. Here, the output 67
Therefore, the detection signal 51 is output 69. As described above, by determining whether or not a synchronization state is established and selecting a detection signal in accordance with the determination, it is possible to obtain good gain control performance even when the synchronization state is not established. Next, switch 4
The output signal from 3 is output from an offset circuit 44 to output 6
7 and 68, the output 69 is given the offset shown in FIG. 2 and output as gain control signals 13, 14, and 15.
The gain control signals 13, 14, 15 shown in FIGS.
And

FIG. 6 is a diagram showing the configuration of the switch 43 of FIG. The switch 43 includes a switch 47 and a switch 48. The detection signal 49 and the detection signal 51 are input to the switch 47, and the detection signal 50 and the detection signal 51 are input to the switch 48. When the carrier reproduction system and the timing reproduction system of the demodulation unit are not synchronized, the switch 47 selects the detection signal 51 and the switch 48 selects and outputs the detection signal 51 according to the control signal 46. On the other hand, when the carrier reproduction system and the timing reproduction system of the demodulation unit are synchronized, the switch 4
7, a detection signal 49 is output from the switch 48, and a detection signal 50 is output from the switch 48.
Select and output. As described above, by determining whether or not a synchronization state is established and selecting a detection signal in accordance with the determination, it is possible to obtain good gain control performance even when the synchronization state is not established.

FIG. 7 is a diagram showing an operation flow of the switch 43 of FIG. First, a signal is received (S71), and it is detected whether or not synchronization has been detected (S72). When the synchronization is detected, the switches 47 and 48 are set to the detection signals 49 and
50 (S73), and supply a gain control signal (S7).
4). If no synchronization is detected, switches 47 and 48
Is set to the detection signal 51 side (S75), and a gain control signal is supplied (S74).

FIG. 8 is a diagram showing the configuration of the gain control signal generator of the digital demodulator 11 of FIG. As input,
For example, a baseband IQ signal 2 of a satellite broadcast signal converted into a digital signal by the A / D converters 9 and 10 in FIG.
9, 30 and the IF signal 31 of, for example, a terrestrial broadcast signal converted into a digital signal by the A / D converter 25 of FIG. The baseband IQ signals 29 and 30 are input to the switch 66 via the complex multiplier 32 and the filter 33. The IF band signal 31 is output from the complex multiplier 5.
2, input to the switch 66 via the filter 53. In the switch 66, the I and Q signals 29, 30
And an I signal obtained by detecting the IF signal 31 by the complex multiplier 52,
By switching between 70 and 71 of the Q signal,
Signal and Q signal are selected. For example, when satellite broadcasting is received, I and Q signals 29 and 30 are selected, and when terrestrial broadcasting is received, I and Q signals 70 and 71 obtained by detecting the IF signal 31 are selected.

Next, the selected I signal and Q signal are input to signal level detectors 34 and 35. Level detector 3
The detection signals from the filters 4 and 35 are respectively filtered by filters 37 and 3
8 and the D / A converters 40 and 41, are input to the switch 43 as a detection signal 49 and a detection signal 50. The detection signals from the level detectors 34 and 35 are
The adder 36 calculates the sum or the sum of the squares of the detection signals from the level detectors 34 and 35, and inputs the detection signal 51 to the switch 43 via the filter 39 and the D / A converter 42, as well as the offset. The signal is input to the circuit 65.

Now, when a satellite broadcast signal is being received (when the switching circuit 66 has selected I and Q signals 29 and 30), when the carrier reproduction system and the timing reproduction system of the demodulation unit are not synchronized. Since the received signals input to the level detectors 34 and 35 are rotated in phase, an accurate received signal level cannot be detected only by a single detection signal from the level detectors 34 and 35. Therefore, the switch 43 outputs detection signals 49 and 50 based on a control signal 46 from a synchronization detector 45 for detecting that the carrier reproduction system and the timing reproduction system of the demodulation unit are synchronized.
8. If the control signal 46 indicates that synchronization has not been detected, the detection signal 51 is selected and output 67 and 68 instead of the detection signals 49 and 50. Here, the detection signal 51 is also output 69.

As described above, by judging whether or not a synchronous state is established and selecting a detection signal in accordance therewith, good gain control performance can be obtained even when the synchronous state is not established. Next, the output signal from the switch 43 is output by the offset circuit 44 to the output
Is given the offset shown in FIG.
3, 14, and 15, and the gain control signals 13, 14, and 15 shown in FIGS.

On the other hand, when a terrestrial broadcast signal is received (when the switching circuit 66 selects the IQ signals 70 and 71), the detection signal 51 from the D / A converter 42 is output to the output circuit 27 by the offset circuit 65. On the other hand, the output 26 is given the offset shown in FIG. 2 and is output as gain control signals 27 and 26, which are the gain control signals 27 and 26 shown in FIG.

According to the present embodiment, when a satellite broadcast or a terrestrial broadcast is received, a signal level detector and an adder are switched by switching the baseband IQ signal of the satellite broadcast signal or the terrestrial broadcast signal by the switch. ,
Filters and the like can be shared, and the circuit scale can be reduced and low power consumption can be achieved.

FIG. 9 is a diagram showing the configuration of the transmission line demodulation unit of the digital demodulator 11 of FIG. The baseband IQ signals 29 and 30 after orthogonal detection of the satellite broadcast reception signal are
After passing through the complex multiplier 32, the filter 33, and the synchronous reproduction circuit 54, the data is input to an error correction circuit 60 including a Viterbi decoder 58 and an RS (Reed-Solomon) decoder 59, where the error is corrected. Demodulated signal 1
2 is output. Also, IF signal 3 of the terrestrial broadcast reception signal
1 is a complex multiplier 52, a filter 53, a synchronous reproduction circuit 5
5, FFT (fast Fourier transform) circuit 56, equalizer 57
Is input to an error correction circuit 60 composed of a Viterbi decoder 58 and an RS (Reed-Solomon) decoder 59 to correct the error, and a DEMAX (demultiplexing) circuit 61 outputs the demodulated signal 28.

According to the present embodiment, the error correction circuit 60 of the satellite broadcast signal demodulation unit and the terrestrial broadcast signal demodulation unit can be shared and the operation clock speed can be switched so that the circuit scale can be reduced and the power consumption can be reduced. Electricity can be achieved.

FIG. 10 is a diagram showing another configuration of the transmission line demodulator of the digital demodulator 11 of FIG. Baseband IQ signal 29,3 after orthogonal detection of satellite broadcast received signal
0 is a complex multiplier 63, a filter 64, a synchronous reproduction circuit 5
4, the signal is input to an error correction circuit 60 comprising a Viterbi decoder 58 and an RS (Reed-Solomon) decoder 59, where the error is corrected, and a demodulated signal 12 is output by a DEMAX (multiplex separation) circuit 61. Also, the IF of the terrestrial broadcast reception signal
The signal 31 is passed through a complex multiplier 63, a filter 64, a synchronous reproduction circuit 55, an FFT (Fast Fourier Transform) circuit 56, and an equalizer 57. The Viterbi decoder 58 and the RS (Reed-Solomon) decoder 59 correct the error. The error is corrected by input to the circuit 60, and the demodulated signal 28 is output by the DEMAX (demultiplexing) circuit 61.

According to the present embodiment, the complex multiplier 63 of the satellite broadcast signal demodulator and the terrestrial broadcast signal demodulator and the filter 6
4, the error correction circuit 60 is shared, and the error correction circuit 60 can cope by switching its speed, so that the circuit scale can be reduced and the power consumption can be reduced.

[0046]

According to the present invention, it is possible to provide a receiving apparatus having a low bit error rate for a received signal having a wide dynamic range.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a configuration of a first embodiment of a receiving device of the present invention.

FIG. 2 is a diagram showing characteristics of a gain control amount with respect to a received electric field of a gain control circuit 2 for controlling a gain of an input signal and gain control circuits 5 and 6 for controlling a gain of a baseband signal in FIG.

FIG. 3 is a diagram illustrating a configuration of a second embodiment of the receiving device of the present invention.

FIG. 4 is a diagram illustrating a configuration of a third embodiment of the receiving device of the present invention.

FIG. 5 is a diagram showing a configuration of a digital demodulator 11 of FIGS. 1 and 3;

FIG. 6 is a diagram showing a configuration of a switch 43 of FIG.

FIG. 7 is a diagram showing an operation flow of a switch 43 in FIG. 6;

8 is a diagram illustrating a configuration of a gain control signal generation unit of the digital demodulator 11 of FIG.

9 is a diagram illustrating a configuration of a transmission line demodulation unit of the digital demodulator 11 of FIG.

FIG. 10 is a diagram showing another configuration of the transmission line demodulation unit of the digital demodulator 11 of FIG.

[Description of Signs] 1,20: input terminal, 2, 21, 23 ... gain control circuit,
3, 4, 22 ... mixer, 5, 6 ... gain control circuit, 7,
8, 24 ... filter, 9, 10, 25 ... A / D converter,
11 ... Digital demodulator, 12, 28 ... Output terminal, 13,
14, 15, 26, 27 ... control signal, 16 ... I signal, 1
7 ... Q signal, 18, 19 ... gain control characteristic, 29 ... I input signal, 30 ... Q input signal, 31 ... IF input signal, 32,
52: complex multiplier, 33, 53: filter, 34, 35
... Level detector, 36 ... Adder, 37, 38, 39 ... Filter, 40,41,42 ... D / A converter, 43 ... Switcher, 44 ... Offset circuit, 45 ... Synchronization detector, 4
6 ... control signal, 47, 48 ... switch, 49, 50, 5
1: detection signal, 54, 55: synchronous reproduction circuit, 56: FF
T circuit, 57: equalizer, 58: Viterbi decoder, 59: R
S decoder, 60 ... error correction circuit, 61, 62 ... DEMA
X circuit.

Claims (9)

[Claims] 1. A receiving apparatus for receiving a digitally modulated signal, comprising: a first gain control circuit for controlling a gain of a received signal; and quadrature detection of the signal whose gain has been controlled by the first gain control circuit. A quadrature detector that outputs an I signal and a Q signal; a second gain control circuit that controls the gain of the I signal; a third gain control circuit that controls the gain of the Q signal; 3 for converting each signal whose gain is controlled by the gain control circuit 3 into a digital signal.
A D converter and a digital demodulator for digitally demodulating the digital signal, wherein the I signal and / or the Q signal are sent to the second gain control circuit as a control signal to the first gain control circuit. And the Q signal as a control signal to the third gain control circuit.
A receiving device, wherein a signal is obtained from the digital demodulation unit and supplied. 2. A receiving apparatus for receiving a digitally modulated signal, comprising: a first gain control circuit for controlling a gain of a received signal; and quadrature detection of the signal whose gain has been controlled by the first gain control circuit. A quadrature detector that outputs an I signal and a Q signal; an A / D converter having a digital signal processing circuit configuration that converts the I signal and the Q signal into respective digital signals; 2, a third gain control circuit for controlling the gain of the Q signal, and a digital demodulation unit for digitally demodulating the digital signal gain-controlled by the second and third gain control circuits. And a control signal to the first gain control circuit.
Obtaining the signal and / or the Q signal, the I signal as a control signal to the second gain control circuit, and the Q signal as a control signal to the third gain control circuit from the digital demodulation unit. A receiving device characterized by supplying. 3. A receiving apparatus for receiving digitally modulated first and second signals, a first gain control circuit for controlling a gain of the first received signal, and a gain in the first gain control circuit. The controlled signal is subjected to quadrature detection to obtain an I signal and a Q signal.
A quadrature detector for outputting a signal, a second gain control circuit for controlling the gain of the I signal, a third gain control circuit for controlling the gain of the Q signal, and a gain of the second received signal. A fourth gain control circuit for controlling, a frequency conversion circuit for frequency-converting the signal whose gain has been controlled by the fourth gain control circuit, and a fifth gain for controlling the gain of the frequency-converted second received signal A control circuit, and a digital demodulation unit that digitally demodulates the signal whose gain has been controlled by the second, third, and fifth gain control circuits, wherein the I signal and the control signal to the first gain control circuit are provided. And / or the Q signal, the I signal as a control signal to the second gain control circuit, and the Q signal as a control signal to the third gain control circuit.
A receiving device, wherein a signal is obtained from the digital demodulation unit and supplied as a control signal to the fourth and fifth gain control circuits. 4. The receiving apparatus according to claim 1, wherein when the received signal level is low, gain control is performed by said second and third gain control circuits, and said first signal is increased as the received signal level increases. A receiving device, wherein gain control is performed by a gain control circuit. 5. The receiving apparatus according to claim 3, wherein when the received signal level is low, gain control is performed by said second, third, and fifth gain control circuits.
A receiving device, wherein the first and fourth gain control circuits also perform gain control. 6. The receiving apparatus according to claim 1, wherein said digital demodulation section includes a first detector having a digital signal processing circuit configuration for detecting a level of an I signal, and a digital detector for detecting a level of a Q signal. A second detector having a signal processing circuit configuration, a generator for generating a third detection output from outputs of the first and second detectors, and detecting whether or not the digital demodulation unit is in a synchronized state; A synchronization detector, and when not in synchronization, controls the first, second, and third gain control circuits with the third detection signal, and when the digital demodulation unit is in synchronization, The second gain control circuit is controlled by a detection level signal of the I signal, the third gain control circuit is controlled by a detection level signal of the Q signal, and the first gain control is performed by the third detection signal. A receiving device for controlling a circuit. 7. The receiving apparatus according to claim 3, wherein said digital demodulation section comprises: a first I signal and a first Q signal which are output by quadrature detection of said first received signal; The second I signal and the second
And a first detector having a digital signal processing circuit configuration for detecting the level of the first or second I signal output from the switcher. Alternatively, a second detector having a digital signal processing circuit configuration for detecting the level of a second Q signal, a generator for generating a third detection output from the outputs of the first and second detectors, And a synchronization detector for detecting whether or not the demodulation unit is in a synchronized state. When the demodulation unit is not in a synchronized state, the first, second, and third gain control circuits are controlled by the third detection signal, When the digital demodulation unit is in a synchronized state, the second gain control circuit is controlled by the detection level signal of the I signal, and the third gain control circuit is controlled by the detection level signal of the Q signal. The first gain control circuit using a third detection signal Receiver and controls. 8. The receiving apparatus according to claim 3, wherein said digital demodulation unit includes an error correction circuit, wherein said digital demodulation unit is used for demodulating said first received signal, and said second received signal is demodulated. A receiver that shares at least a part of an error correction circuit used for demodulating the signal. 9. The receiving apparatus according to claim 3, wherein said digital demodulation unit comprises a complex multiplier, a filter, and an error correction circuit, and wherein said complex demodulator is used for demodulating said first received signal. , An error correction circuit, and a complex multiplier, a filter, used for demodulating the second received signal,
A receiving device wherein at least a part of an error correction circuit is shared.