JP2001358260A - Semiconductor package - Google Patents
Semiconductor packageInfo
- Publication number
- JP2001358260A JP2001358260A JP2000179896A JP2000179896A JP2001358260A JP 2001358260 A JP2001358260 A JP 2001358260A JP 2000179896 A JP2000179896 A JP 2000179896A JP 2000179896 A JP2000179896 A JP 2000179896A JP 2001358260 A JP2001358260 A JP 2001358260A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor package
- package according
- protection member
- chip
- light
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、安価にある程度の
防湿特性、遮光性を必要とする半導体パッケージに関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor package which requires a certain amount of moisture-proof properties and light-shielding properties at a low cost.
【０００２】[0002]
【従来の技術】これまでの半導体パッケージの防湿処理
は、パッケージを形成する樹脂材料自体の特性を低吸湿
化することによって、吸湿し難いパッケージ製品を製造
するといった方策をとっている。例えば、エポキシ系樹
脂にＳｉフィラーを添加するといった形態である。2. Description of the Related Art Hitherto, in a moisture-proof treatment of a semiconductor package, a measure is taken to manufacture a package product which is difficult to absorb moisture by lowering the characteristics of a resin material itself which forms the package. For example, a form in which a Si filler is added to an epoxy resin.
【０００３】一方、半導体パッケージの遮光対策は、パ
ッケージを形成する樹脂材料中に顔料（カーボンなど）
を混入する。これにより、パッケージが着色され、遮光
性を有するようにしていた。また、チップサイズパッケ
ージ、チップスケールパッケージと呼ばれるようなＣＳ
Ｐ製品は、半導体チップが樹脂で封止されない構造であ
る。このようなパッケージ製品は、パッケージ自体に遮
光性がないため、組込まれたケース等、完成品外装によ
り遮光されなければならない。On the other hand, as a measure against light shielding of a semiconductor package, a pigment (such as carbon) is contained in a resin material forming the package.
Is mixed. As a result, the package is colored and has a light-shielding property. In addition, CS such as chip size package and chip scale package
The P product has a structure in which a semiconductor chip is not sealed with a resin. In such package products, since the package itself does not have a light-shielding property, it must be shielded from light by a finished product exterior such as a built-in case.
【０００４】その他、パッケージ製品として、製品固有
の識別、商品名、ロゴ等のマーキングを要するものが多
く、パッケージ表面への専用の単独工程（印字工程）が
必要であった。[0004] In addition, many package products require product-specific identification, product names, logos and other markings, and require a dedicated single process (printing process) on the package surface.
【０００５】[0005]
【発明が解決しようとする課題】半導体パッケージを形
成する樹脂（エポキシ系モールドコンパウンド、ポッテ
ィング材料など）は、本質的に吸湿挙動を示すものであ
る。このため、組成改良、添加材改良等、物性自体の改
善（低吸湿化）は容易なことではない。The resin (epoxy-based mold compound, potting material, etc.) forming the semiconductor package essentially exhibits a moisture absorbing behavior. For this reason, it is not easy to improve the physical properties themselves (low moisture absorption) such as composition improvement and additive material improvement.
【０００６】低吸湿特性を有する高品質の樹脂の使用
は、パッケージコストにも直接結びついてしまう恐れも
ある。しかし、パッケージが吸湿することによって、そ
のパッケージの信頼性（耐熱性他）は確実に低下する傾
向にある。すなわち、熱ストレスで引き起こされるデラ
ミネーション、クラック等の発生率は高くなる。[0006] The use of a high quality resin having low moisture absorption properties may be directly linked to the package cost. However, when the package absorbs moisture, the reliability (heat resistance, etc.) of the package tends to surely decrease. That is, the rate of occurrence of delamination, cracks, and the like caused by thermal stress increases.
【０００７】一方、半導体パッケージの遮光対策に関
し、封止樹脂中に導電性のカーボン粒子が混入される。
このため、今後増える傾向にある微細パッドピッチ製品
においては、隣接パッド間でカーボン粒子の影響による
リーク、ショート不良を引き起こす危険性がある。[0007] On the other hand, with respect to light shielding measures of a semiconductor package, conductive carbon particles are mixed in a sealing resin.
For this reason, in a fine pad pitch product which tends to increase in the future, there is a risk of causing a leak or a short circuit between adjacent pads due to the influence of carbon particles.
【０００８】その他、パッケージ製品としての、製品固
有の識別、商品名、ロゴ等のマーキングは、専用の印字
工程のためだけに半導体パッケージ製造の工数が増える
懸念があった。このため、製品コストの上昇にもつなが
る。In addition, there is a concern that the identification of the product as a package product, the marking of a product name, a logo, etc., is performed only for a dedicated printing process, and the number of steps for manufacturing the semiconductor package increases. This leads to an increase in product cost.
【０００９】本発明は上記事情を考慮してなされたもの
で、高価な低吸湿特性の封止樹脂を不要とし、かつ、カ
ーボン粒子等の導電性を有する物質を混入しなくても遮
光可能で、さらには専用の印字工程をも省略でき得る半
導体パッケージを提供しようとするものである。The present invention has been made in view of the above circumstances, eliminates the need for an expensive sealing resin having a low moisture absorption property, and enables light shielding without mixing a conductive substance such as carbon particles. Another object of the present invention is to provide a semiconductor package which can omit a special printing process.
【００１０】[0010]
【課題を解決するための手段】本発明の第１の半導体パ
ッケージは、主表面に複数の電極が形成された半導体チ
ップと、前記半導体チップを保護する封止部材と、一端
側が前記封止部材から外部へ伸び、他端側が前記半導体
チップの電極に電気的に接続される外部端子と、少なく
とも前記封止部材表面部分に設けられた防湿及び遮光特
性を有する保護部材とを具備したことを特徴とする。According to a first aspect of the present invention, there is provided a semiconductor package having a plurality of electrodes formed on a main surface thereof, a sealing member for protecting the semiconductor chip, and a sealing member at one end. An external terminal extending from the outside to the other end, the other end of which is electrically connected to the electrode of the semiconductor chip, and a protection member having moisture-proof and light-shielding properties provided at least on the surface of the sealing member. And
【００１１】上記本発明の半導体パッケージによれば、
封止部材表面部分に防湿及び遮光特性を有する保護部材
を付加する形態である。これにより、高性能（低吸湿特
性）の封止樹脂を用いなくてもよいし、カーボン粒子等
の導電性を有する物質を混入しなくても遮光可能であ
る。さらには上記保護部材の工夫で専用の印字工程をも
省略でき得る構成となる。According to the semiconductor package of the present invention,
In this embodiment, a protective member having moisture-proof and light-shielding properties is added to the surface of the sealing member. Accordingly, it is not necessary to use a high-performance (low moisture absorbing property) sealing resin, and light can be shielded without mixing a conductive substance such as carbon particles. Furthermore, a configuration in which a dedicated printing step can be omitted by devising the above-described protective member is obtained.
【００１２】上記本発明の第１の半導体パッケージに関
して、保護部材は、少なくとも次の（１）〜（４）いず
れかの特徴を含む。（１）印刷による部分コーティング
処理により形成されていることを特徴とする。（２）封
止部材全体を実質的に被覆するものであることを特徴と
する。（３）金属製であることを特徴とする。（４）製
品固有のマーキング箇所を有することを特徴とする。ま
た、上記（４）において、マーキング箇所は、上記保護
部材をマスクで抜いた領域により形成されることを特徴
とする。In the first semiconductor package of the present invention, the protection member has at least one of the following features (1) to (4). (1) It is formed by a partial coating process by printing. (2) It is characterized by substantially covering the entire sealing member. (3) It is made of metal. (4) It is characterized by having a marking part unique to the product. Further, in the above (4), the marking location is formed by a region where the protective member is removed by a mask.
【００１３】また、本発明の第２の半導体パッケージ
は、主表面に複数のパッド部が形成された半導体チップ
がフリップチップ構造によって外部端子を導出するイン
ターポーザと電気的に接続される構成において、少なく
とも前記半導体チップ露出部分に設けられた防湿及び遮
光特性を有する保護部材とを具備したことを特徴とす
る。In a second semiconductor package according to the present invention, at least a semiconductor chip having a plurality of pad portions formed on a main surface is electrically connected to an interposer for leading external terminals by a flip chip structure. A protection member provided on the exposed portion of the semiconductor chip and having moisture-proof and light-shielding properties.
【００１４】上記本発明の第２の半導体パッケージによ
れば、半導体チップ露出部分に防湿及び遮光特性を有す
る保護部材を付加する形態である。これにより、パッケ
ージ製品自体で遮光可能である。さらには上記保護部材
の工夫で専用の印字工程をも省略でき得る構成となる。According to the second semiconductor package of the present invention, a protective member having moisture-proof and light-shielding properties is added to the exposed portion of the semiconductor chip. Thereby, light can be shielded by the package product itself. Furthermore, a configuration in which a dedicated printing step can be omitted by devising the above-described protective member is obtained.
【００１５】上記本発明の第２の半導体パッケージに関
して、保護部材は、少なくとも次の（１）〜（４）いず
れかの特徴を含む。（１）印刷による部分コーティング
処理により形成されていることを特徴とする。（２）半
導体チップ露出部分全体を実質的に被覆するものである
ことを特徴とする。（３）金属製であることを特徴とす
る。（４）製品固有のマーキング箇所を有することを特
徴とする。また、上記（４）において、マーキング箇所
は、上記保護部材をマスクで抜いた領域により形成され
ることを特徴とする。According to the second semiconductor package of the present invention, the protective member has at least one of the following features (1) to (4). (1) It is formed by a partial coating process by printing. (2) It is characterized in that it substantially covers the entire exposed portion of the semiconductor chip. (3) It is made of metal. (4) It is characterized by having a marking part unique to the product. Further, in the above (4), the marking location is formed by a region where the protective member is removed by a mask.
【００１６】[0016]
【発明の実施の形態】図１は、本発明の第１実施形態に
係る半導体パッケージの要部構成を示す断面図である。
半導体パッケージ１０において、半導体チップ（ＩＣチ
ップ）１１は、主表面に複数の電極が形成され、裏面側
がダイ１２に固定されており封止部材１３によって保護
されている。外部端子１４は、その一端側が封止部材１
３から外部へ伸び、他端側がＩＣチップ１１の対応する
電極に例えばボンディングワイヤ１５により電気的に接
続されている。FIG. 1 is a sectional view showing a configuration of a main part of a semiconductor package according to a first embodiment of the present invention.
In the semiconductor package 10, a semiconductor chip (IC chip) 11 has a plurality of electrodes formed on a main surface, a back surface fixed to a die 12, and protected by a sealing member 13. One end of the external terminal 14 has the sealing member 1.
3, the other end is electrically connected to a corresponding electrode of the IC chip 11 by, for example, a bonding wire 15.
【００１７】さらに、図示のように上記封止部材１３表
面部分（主表面部）には、防湿及び遮光特性を有する保
護部材１６が設けられている。この保護部材１６は、例
えば表面印刷による部分コーティング処理により形成さ
れている。Further, as shown in the figure, a protective member 16 having a moisture-proof and light-shielding property is provided on the surface portion (main surface portion) of the sealing member 13. The protection member 16 is formed by, for example, a partial coating process using surface printing.
【００１８】例えば保護部材１６は、防湿及び遮光特性
を有する薬品のコーティングであって、コーティング厚
さは１００μｍ程度である。このコーティングの厚さは
防湿及び遮光特性の効果が得られれば１００μｍより薄
くてもよい。あるいは保護部材１６は、金属物質（金属
板）から構成されていてもよい。このような保護部材１
６の適用により防湿及び遮光特性が向上する。For example, the protective member 16 is a coating of a chemical having moisture-proof and light-shielding properties, and has a coating thickness of about 100 μm. The thickness of this coating may be less than 100 μm as long as the effect of moisture proof and light shielding properties can be obtained. Alternatively, the protection member 16 may be made of a metal material (metal plate). Such a protection member 1
By applying 6, moisture-proof and light-shielding properties are improved.
【００１９】上記構成によれば、封止部材１３表面部分
に防湿及び遮光特性を有する保護部材１６を付加する形
態である。これにより、封止部材１３として高性能（低
吸湿特性）の封止樹脂を用いなくてもよく、製品コスト
削減に寄与する。According to the above configuration, a protective member 16 having moisture-proof and light-shielding properties is added to the surface of the sealing member 13. Accordingly, it is not necessary to use a high-performance (low moisture absorption property) sealing resin as the sealing member 13, which contributes to a reduction in product cost.
【００２０】また、封止部材１３にカーボン粒子等の導
電性を有する物質を混入しなくても遮光可能となる。従
って、隣接パッド間でカーボン粒子の影響によるリー
ク、ショート不良を引き起こす危険性はなくなる。この
結果、狭いパッドピッチ製品に非常に有利である。Further, light can be shielded without mixing a conductive substance such as carbon particles into the sealing member 13. Therefore, there is no danger of causing a leak or a short circuit between adjacent pads due to the influence of the carbon particles. This is very advantageous for narrow pad pitch products.
【００２１】さらには、上記保護部材１６の工夫次第で
パッケージ製品として製品固有の識別、商品名、ロゴ等
のマーキング専用の印字工程をも省略でき得る構成とな
る。以下、これにつき説明する。Further, depending on the contrivance of the protective member 16, it is possible to omit a printing process dedicated to marking such as a product-specific identification, a product name and a logo as a package product. Hereinafter, this will be described.
【００２２】図２は、本発明の第２実施形態に係る半導
体パッケージの要部構成を示す概観図である。図１の構
成と同様の箇所には同一の符号を付して説明する。封止
部材１３上に形成した保護部材１６において、製品固有
のマーキング箇所２１を有している。すなわち、パッケ
ージ製品としての、製品固有の識別、商品名、ロゴ等の
マーキングは、この保護部材１６の形成時にマスクで抜
いて完成させる。FIG. 2 is a schematic view showing a configuration of a main part of a semiconductor package according to a second embodiment of the present invention. The same portions as those in the configuration of FIG. The protective member 16 formed on the sealing member 13 has a marking portion 21 unique to the product. That is, the identification of the product, the product name, the marking of the logo, etc. as the package product is completed by removing the protective member 16 with a mask at the time of formation.
【００２３】上記構成によれば、パッケージ製品への専
用の印字工程が省略できる。なお、封止部材１３と保護
部材１６の色を変えれば、よりマーキングとしてのコン
トラストが出せる。封止部材１３中にカーボン粒子を混
入させないように構成できるので封止部材１３の色の自
由度は向上する。According to the above configuration, a dedicated printing step for a package product can be omitted. In addition, if the colors of the sealing member 13 and the protection member 16 are changed, the contrast as a marking can be obtained more. Since it is possible to prevent the carbon particles from being mixed into the sealing member 13, the degree of freedom of the color of the sealing member 13 is improved.
【００２４】図３は、本発明の第３実施形態に係る半導
体パッケージの要部構成を示す断面図である。前記第１
実施形態の図１と同様の箇所には同一の符号を付す。前
記図１に示した保護部材１６は、表面印刷による部分コ
ーティング処理によるものであった。これに対し、図３
では、防湿及び遮光特性を有する保護部材１６がディッ
ピング等により形成され、封止部材１３全体を実質的に
被覆している。FIG. 3 is a sectional view showing a configuration of a main part of a semiconductor package according to a third embodiment of the present invention. The first
The same parts as those in FIG. 1 of the embodiment are denoted by the same reference numerals. The protection member 16 shown in FIG. 1 is obtained by partial coating processing by surface printing. In contrast, FIG.
In FIG. 2, the protective member 16 having moisture-proof and light-shielding properties is formed by dipping or the like, and substantially covers the entire sealing member 13.
【００２５】上記構成によっても、前記第１実施形態と
同様の効果を有する。すなわち、封止部材１３としては
高性能（低吸湿特性）の封止樹脂を用いなくてもよく、
製品コスト削減に寄与する。With the above configuration, the same effects as in the first embodiment can be obtained. That is, it is not necessary to use a high-performance (low moisture absorption property) sealing resin as the sealing member 13.
Contribute to product cost reduction.
【００２６】また、保護部材１６が遮光性を有するの
で、封止部材１３自体に遮光性を持たせる必要がない。
このため、封止部材１３にカーボン粒子等の導電性を有
する物質を混入しなくてもよくなる。従って、隣接パッ
ド間でのリーク、ショート不良は低減される。この結
果、狭いパッドピッチ製品に非常に有利である。Further, since the protective member 16 has a light-shielding property, it is not necessary for the sealing member 13 itself to have a light-shielding property.
Therefore, it is not necessary to mix a conductive material such as carbon particles into the sealing member 13. Therefore, leakage and short-circuit failure between adjacent pads are reduced. This is very advantageous for narrow pad pitch products.
【００２７】図４は、本発明の第４実施形態に係る半導
体パッケージの要部構成を示す概観図である。半導体パ
ッケージ４０は、チップサイズパッケージまたはチップ
スケールパッケージと呼ばれるＣＳＰ製品の一例であ
る。主表面に複数のパッド部が形成された半導体チップ
（ＩＣチップ）４１がフリップチップ構造によって、外
部端子を導出するインターポーザ４２と電気的に接続さ
れた構成になっている。半導体チップ４１とインターポ
ーザ４２が対向する接続領域及びその近辺は保護材４３
で覆われている。インターポーザ４２の外部端子側の面
にはボール電極４４が設けられている（ＢＧＡ：Ball G
rid Array ）。FIG. 4 is a schematic view showing a configuration of a main part of a semiconductor package according to a fourth embodiment of the present invention. The semiconductor package 40 is an example of a CSP product called a chip size package or a chip scale package. A semiconductor chip (IC chip) 41 having a plurality of pad portions formed on a main surface is electrically connected to an interposer 42 for leading external terminals by a flip-chip structure. The connection region where the semiconductor chip 41 and the interposer 42 face each other and the vicinity thereof are provided with a protective material 43.
Covered with. A ball electrode 44 is provided on a surface on the external terminal side of the interposer 42 (BGA: Ball G).
rid Array).
【００２８】さらに、図示のように上記半導体チップ４
１露出部分（主表面部）には、防湿及び遮光特性を有す
る保護部材４６が設けられている。この保護部材４６
は、例えば表面印刷による部分コーティング処理によっ
て形成されている。すなわち、防湿及び遮光特性を有す
る薬品のコーティングであり、そのコーティング厚さは
１００μｍ程度である。コーティングの厚さは防湿及び
遮光特性の効果が得られれば、１００μｍより薄くても
よい。あるいは保護部材４６は、金属物質（金属板）で
もよい。このような保護部材４６の適用により防湿及び
遮光特性が向上する。Further, as shown in FIG.
On one exposed portion (main surface portion), a protection member 46 having moisture-proof and light-shielding properties is provided. This protection member 46
Is formed, for example, by a partial coating process using surface printing. That is, it is a coating of a chemical having moisture-proof and light-shielding properties, and its coating thickness is about 100 μm. The thickness of the coating may be thinner than 100 μm as long as the effects of moisture proof and light shielding properties can be obtained. Alternatively, the protection member 46 may be a metal material (metal plate). By applying such a protective member 46, the moisture-proof and light-shielding properties are improved.
【００２９】上記構成によれば、半導体チップ４１の露
出部分に防湿及び遮光特性を有する保護部材４６を付加
する形態である。これにより、パッケージ製品自体で遮
光可能である。According to the above configuration, the protection member 46 having the moisture-proof and light-shielding properties is added to the exposed portion of the semiconductor chip 41. Thereby, light can be shielded by the package product itself.
【００３０】さらには、上記保護部材４６の工夫で専用
の印字工程をも省略でき得る構成となる。すなわち、図
示しないが前記第２実施形態と同様に、製品固有の識
別、商品名、ロゴ等のマーキングが、上記保護部材１６
の所定部分をマスクで抜くことによって達成されるよう
にしてもよい。Further, a special printing step can be omitted by devising the protective member 46. That is, although not shown, similar to the second embodiment, the unique identification of the product, the product name, and the marking such as the logo are performed by the protection member 16.
May be achieved by removing a predetermined portion of the above with a mask.
【００３１】図５は、本発明の第５実施形態に係る半導
体パッケージの要部構成を示す断面図である。前記第４
実施形態の図４と同様の箇所には同一の符号を付す。前
記図４では、インターポーザ４２の外部端子側の面には
ボール電極４４が設けられるＢＧＡ構成であったが、ボ
ール電極４４の代りにランド部４５が設けられたＬＧＡ
（Land Grid Array ）タイプとなっている。FIG. 5 is a sectional view showing a configuration of a main part of a semiconductor package according to a fifth embodiment of the present invention. The fourth
The same parts as those in FIG. 4 of the embodiment are denoted by the same reference numerals. In FIG. 4, the BGA structure in which the ball electrode 44 is provided on the surface of the interposer 42 on the side of the external terminal is used, but the LGA in which the land portion 45 is provided instead of the ball electrode 44 is used.
(Land Grid Array) type.
【００３２】また、前記図４では、保護部材４６は、表
面印刷による部分コーティング処理によるものであっ
た。これに対し、この図５では、防湿及び遮光特性を有
する保護部材４６がディッピング等により形成され、半
導体チップ４１露出部分全体を実質的に被覆している。
この構成によっても、前記第４実施形態と同様の効果を
有する。製品自体の遮光性はより向上する。In FIG. 4, the protective member 46 is formed by a partial coating process by surface printing. On the other hand, in FIG. 5, a protective member 46 having moisture-proof and light-shielding properties is formed by dipping or the like, and substantially covers the entire exposed portion of the semiconductor chip 41.
This configuration also has the same effect as the fourth embodiment. The light shielding properties of the product itself are further improved.
【００３３】もちろん、前記第４実施形態における図４
のＢＧＡタイプにおいても、保護部材４６がディッピン
グ等により形成され、半導体チップ４１露出部分全体を
実質的に被覆する構成をとってもよい。Of course, FIG.
In the BGA type described above, the protection member 46 may be formed by dipping or the like to substantially cover the entire exposed portion of the semiconductor chip 41.
【００３４】以上各実施形態によれば、樹脂封止パッケ
ージにおいては、高性能（低吸湿特性）の封止樹脂を用
いることは重要ではなくなる。すなわち、封止表面上の
部分領域、あるいは全体を被覆する防湿及び遮光性を有
する保護部材を設けることにより、安価に基準をクリア
する、ある程度の防湿及び遮光が期待できる。また、こ
れにより封止樹脂には遮光のためカーボン粒子等の物質
を混入しなくてもよくなる。よって、動作上の電流リー
ク、パッド間のショート等の不具合が起こり難いという
利点もある。According to the above embodiments, it is not important to use a high-performance (low moisture absorption) sealing resin in the resin sealing package. In other words, by providing a protective member having a moisture-proof and light-shielding property that covers a partial area on the sealing surface or the whole, it is possible to expect a certain degree of moisture-proof and light-shielding that meets the standards at low cost. This also eliminates the need to mix a substance such as carbon particles into the sealing resin for shielding light. Therefore, there is also an advantage that inconveniences such as a current leak in operation and a short circuit between pads hardly occur.
【００３５】さらには、特に上記保護部材を印刷でコー
ティング処理するものでは、製品固有の識別、商品名、
ロゴ等のマーキングが、上記保護部材の所定部分をマス
クで抜くことによって達成可能であるため、専用のマー
キング工程をも省略できる構成となる。これにより、工
数の削減、製品コストの低減が期待できる。Further, in particular, in the case where the above-mentioned protective member is subjected to a coating process by printing, identification of a product, product name,
Marking such as a logo can be achieved by removing a predetermined portion of the protective member with a mask, so that a dedicated marking step can be omitted. As a result, reductions in man-hours and product costs can be expected.
【００３６】もちろん、パッケージ製品において、防湿
及び遮光性の一層の向上が要求されるなら、上記保護部
材はマスク抜きせず、あるいは、全体を被覆（ディッピ
ング等）した後、専用のマーキング工程を付加すればよ
い。Of course, if further improvement in moisture proof and light-shielding properties is required in the packaged product, the above-mentioned protective member is not removed from the mask, or a dedicated marking step is added after covering the whole (such as dipping). do it.
【００３７】また、ＢＧＡパッケージ、ＬＧＡパッケー
ジに代表されるＣＳＰ（Chip sizePackage またはChip
scale Package）製品においては、半導体チップの露出
した部分領域、あるいは全体を被覆する防湿及び遮光性
を有する保護部材を設けることにより、安価に基準をク
リアするある程度の防湿及び遮光が期待できる。A CSP (Chip size Package or Chip) represented by a BGA package and an LGA package
In the case of a scale package) product, by providing a protective member having a moisture-proof and light-shielding property that covers the exposed partial area or the whole of the semiconductor chip, it is possible to expect a certain degree of moisture-proof and light-shielding that meets the standards at low cost.
【００３８】また、特に上記保護部材を印刷でコーティ
ング処理するものでは、製品固有の識別、商品名、ロゴ
等のマーキングが、上記保護部材の所定部分をマスクで
抜くことによって達成可能であるため、専用のマーキン
グ工程をも省略でき得る構成となる。これにより、工数
の削減、製品コストの低減が期待できる。In particular, in the case where the protective member is coated by printing, the identification of the product, the product name, and the marking such as a logo can be achieved by removing a predetermined portion of the protective member with a mask. The configuration is such that a dedicated marking step can be omitted. As a result, reductions in man-hours and product costs can be expected.
【００３９】もちろん、パッケージ製品において、防湿
及び遮光性の一層の向上が要求されるなら、上記保護部
材はマスク抜きせず、あるいは、全体を被覆（ディッピ
ング等）した後、専用のマーキング工程を付加すればよ
い。Of course, if further improvement in moisture proof and light-shielding properties is required for packaged products, the above-mentioned protective member is not removed from the mask, or a dedicated marking step is added after covering the whole (dipping etc.). do it.
【００４０】[0040]
【発明の効果】以上説明したように、本発明の樹脂封止
型の半導体パッケージによれば、封止部材表面部分に防
湿及び遮光特性を有する保護部材を付加する形態であ
る。これにより、高性能（低吸湿特性）の封止樹脂を用
いなくてもよいし、カーボン粒子等の導電性を有する物
質を混入しなくてもよい。これにより、狭いパッドピッ
チ製品に対し高信頼性が得られる。さらには上記保護部
材の工夫で専用の印字工程をも省略でき得る構成とな
る。As described above, according to the resin-sealed type semiconductor package of the present invention, a protective member having moisture-proof and light-shielding properties is added to the surface of the sealing member. Accordingly, it is not necessary to use a high-performance (low moisture absorption property) sealing resin, and it is not necessary to mix a conductive material such as carbon particles. Thereby, high reliability can be obtained for a narrow pad pitch product. Furthermore, a configuration in which a dedicated printing step can be omitted by devising the above-described protective member is obtained.
【００４１】あるいは、本発明のＣＳＰ（Chip size Pa
ckage またはChip scale Package）タイプの半導体パッ
ケージによれば、半導体チップ露出部分に防湿及び遮光
特性を有する保護部材を付加する形態である。これによ
り、パッケージ製品自体で遮光可能である。さらには上
記保護部材の工夫で専用の印字工程をも省略でき得る構
成となる。Alternatively, the CSP (Chip size Pa) of the present invention
According to a semiconductor package of the "ckage or chip scale package" type, a protection member having moisture-proof and light-shielding properties is added to an exposed portion of the semiconductor chip. Thereby, light can be shielded by the package product itself. Furthermore, a configuration in which a dedicated printing step can be omitted by devising the above-described protective member is obtained.
【００４２】このような結果、本発明によれば、高価な
低吸湿特性の封止樹脂を不要とし、かつ、カーボン粒子
等の導電性を有する物質を混入しなくても遮光可能であ
り、さらには専用の印字工程をも省略でき得る半導体パ
ッケージを提供することができる。As a result, according to the present invention, it is possible to eliminate the need for an expensive sealing resin having a low hygroscopic property and to shield light without mixing a conductive substance such as carbon particles. Can provide a semiconductor package in which a dedicated printing step can be omitted.
【図面の簡単な説明】[Brief description of the drawings]
【図１】本発明の第１実施形態に係る半導体パッケージ
の要部構成を示す断面図である。FIG. 1 is a cross-sectional view illustrating a main configuration of a semiconductor package according to a first embodiment of the present invention.
【図２】本発明の第２実施形態に係る半導体パッケージ
の要部構成を示す概観図である。FIG. 2 is an outline view showing a main configuration of a semiconductor package according to a second embodiment of the present invention.
【図３】本発明の第３実施形態に係る半導体パッケージ
の要部構成を示す断面図である。FIG. 3 is a cross-sectional view illustrating a main part configuration of a semiconductor package according to a third embodiment of the present invention.
【図４】本発明の第４実施形態に係る半導体パッケージ
の要部構成を示す概観図である。FIG. 4 is a schematic view showing a main configuration of a semiconductor package according to a fourth embodiment of the present invention.
【図５】本発明の第５実施形態に係る半導体パッケージ
の要部構成を示す断面図である。FIG. 5 is a sectional view showing a configuration of a main part of a semiconductor package according to a fifth embodiment of the present invention.
１０，４０…半導体パッケージ １１，４１…半導体チップ（ＩＣチップ） １２…ダイ １３…封止部材 １４…外部端子 １５…ボンディングワイヤ １６，４６…保護部材 ４２…インターポーザ ４３…保護材 ４４…ボール電極 ４５…ランド部 10, 40 semiconductor package 11, 41 semiconductor chip (IC chip) 12 die 13 sealing member 14 external terminal 15 bonding wire 16, 46 protective member 42 interposer 43 protective material 44 ball electrode 45 … Land
Claims (12)
チップと、 前記半導体チップを保護する封止部材と、 一端側が前記封止部材から外部へ伸び、他端側が前記半
導体チップの電極に電気的に接続される外部端子と、 少なくとも前記封止部材表面部分に設けられた防湿及び
遮光特性を有する保護部材と、を具備したことを特徴と
する半導体パッケージ。A semiconductor chip having a plurality of electrodes formed on a main surface thereof; a sealing member for protecting the semiconductor chip; one end extending to the outside from the sealing member, and the other end forming an electrode of the semiconductor chip. A semiconductor package comprising: an external terminal to be electrically connected; and a protection member having moisture-proof and light-shielding properties provided at least on a surface portion of the sealing member.
ィング処理により形成されていることを特徴とする請求
項１記載の半導体パッケージ。2. The semiconductor package according to claim 1, wherein the protection member is formed by a partial coating process by printing.
質的に被覆するものであることを特徴とする請求項１記
載の半導体パッケージ。3. The semiconductor package according to claim 1, wherein the protection member substantially covers the entire sealing member.
徴とする請求項１記載の半導体パッケージ。4. The semiconductor package according to claim 1, wherein said protection member is made of metal.
箇所を有することを特徴とする請求項１記載の半導体パ
ッケージ。5. The semiconductor package according to claim 1, wherein the protection member has a marking part unique to a product.
マスクで抜いた領域により形成されることを特徴とする
請求項５記載の半導体パッケージ。6. The semiconductor package according to claim 5, wherein said marking portion is formed by a region where said protective member is removed by a mask.
導体チップがフリップチップ構造によって外部端子を導
出するインターポーザと電気的に接続される構成におい
て、 少なくとも前記半導体チップ露出部分に設けられた防湿
及び遮光特性を有する保護部材と、を具備したことを特
徴とする半導体パッケージ。7. In a configuration in which a semiconductor chip having a plurality of pad portions formed on a main surface is electrically connected to an interposer for leading external terminals by a flip-chip structure, at least a moisture proof provided at an exposed portion of the semiconductor chip. And a protection member having a light-shielding property.
ィング処理により形成されていることを特徴とする請求
項７記載の半導体パッケージ。8. The semiconductor package according to claim 7, wherein said protection member is formed by a partial coating process by printing.
部分全体を実質的に被覆するものであることを特徴とす
る請求項７記載の半導体パッケージ。9. The semiconductor package according to claim 7, wherein the protection member substantially covers the entire exposed portion of the semiconductor chip.
特徴とする請求項７記載の半導体パッケージ。10. The semiconductor package according to claim 7, wherein said protection member is made of metal.
グ箇所を有することを特徴とする請求項７記載の半導体
パッケージ。11. The semiconductor package according to claim 7, wherein the protection member has a marking part unique to a product.
をマスクで抜いた領域により形成されることを特徴とす
る請求項１１記載の半導体パッケージ。12. The semiconductor package according to claim 11, wherein said marking portion is formed by a region where said protective member is removed by a mask.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000179896A JP2001358260A (en) | 2000-06-15 | 2000-06-15 | Semiconductor package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000179896A JP2001358260A (en) | 2000-06-15 | 2000-06-15 | Semiconductor package |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2001358260A true JP2001358260A (en) | 2001-12-26 |
Family
ID=18681083
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000179896A Withdrawn JP2001358260A (en) | 2000-06-15 | 2000-06-15 | Semiconductor package |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2001358260A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20030033611A (en) * | 2001-10-24 | 2003-05-01 | 정운영 | Stacked semiconductor package and fabricating method thereof |
-
2000
- 2000-06-15 JP JP2000179896A patent/JP2001358260A/en not_active Withdrawn
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20030033611A (en) * | 2001-10-24 | 2003-05-01 | 정운영 | Stacked semiconductor package and fabricating method thereof |
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