JP2001358097A - Machining device of semiconductor wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a machining device of a semiconductor wafer for improving a machining yield by preventing the semiconductor wafer from being broken and at the same time for miniaturizing facilities. SOLUTION: In this machining device of a semiconductor wafer 11 where the surface of a semiconductor wafer 11 is polished by machine polishing and then the damaged layer of the polished surface is removed, a polishing part 6, a pre-center part 5, a wafer-washing part 10, plasma treatment parts 4A and 4B, and magazines 2A and 2B are arranged radially with a zero point O in the polar coordinate system of a wafer transport part 3 having a robot mechanism as a center, a polishing part 6, a pre-center part 5, a wafer-washing part 10, plasma treatment parts 4A and 4B, and magazines 2A and 2B are arranged radially, and the arrangement position is set so that the zero point O is located on the extended line of wafer carry out/in center lines La and Lb of the plasma treatment parts 4A and 4B, thus reducing the number of shift of the semiconductor wafer 11 for preventing the semiconductor wafer 11 from being broken, and at the same time covering the delivery of the semiconductor wafer between the parts of a single robot mechanism and miniaturizing the facilities.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer processing apparatus for polishing and thinning a semiconductor wafer.

[0002]

2. Description of the Related Art In a manufacturing process of a semiconductor wafer used for a semiconductor device, a polishing process is performed to reduce the thickness of the semiconductor wafer as the semiconductor device becomes thinner. This polishing is performed by forming a circuit pattern on the front surface of the semiconductor wafer and then mechanically polishing the back surface opposite to the circuit formation surface. On the surface of the semiconductor wafer after mechanical polishing, there is a damaged layer that has been embrittled by microcracks formed by processing. It is known that this damaged layer contains microcracks and impairs the bending strength of the semiconductor wafer.

Recently, semiconductor wafers have a thickness of 100 μm.
There is an increasing demand for the following, and to achieve this, thinning processing including removal of a damaged layer is being studied. The most realistic method is to provide a processing line with an existing mechanical polishing device and an existing etching device, and to transport a semiconductor wafer between the two devices.

[0004]

However, the mechanically polished semiconductor wafer is in an extremely thin state, and the damaged layer is formed on the surface of the mechanically polished semiconductor wafer as described above. Folding strength is extremely weak and handling is difficult, and breakage is likely to occur during transport, especially during delivery. In particular, in the operation of taking out a machined semiconductor wafer from a mechanical polishing apparatus and setting it in an etching apparatus, there is a high possibility that the semiconductor wafer will be damaged, and the yield may be deteriorated.

[0005] In the equipment in which the processing line is constituted by the existing equipment as described above, since the fragile semiconductor wafer is delivered many times, the processing yield is reduced due to the damage of the semiconductor wafer, and the equipment is reduced in size. There is a problem that it is difficult to reduce the cost.

Accordingly, an object of the present invention is to provide a semiconductor wafer processing apparatus capable of preventing damage to a semiconductor wafer, improving the processing yield, and reducing the size of equipment.

[0007]

According to the present invention, there is provided a semiconductor wafer processing apparatus for polishing a surface of a semiconductor wafer by mechanical polishing, and then removing a damaged layer on the polished surface. Polishing means for mechanically polishing the semiconductor wafer, a mounting portion for mounting and positioning the semiconductor wafer before being transferred to the polishing means, and transferring the semiconductor wafer from the mounting portion to the polishing means. First
A transfer unit, a second transfer unit for taking out the semiconductor wafer polished by the polishing unit, a cleaning unit for receiving and cleaning the polished semiconductor wafer from the second transfer unit, and a damaged layer of the cleaned semiconductor wafer. And a wafer handling unit including a polar coordinate system robot mechanism for transferring a semiconductor wafer between the polishing unit, the cleaning unit, and the damaged layer removing unit, and the damaged layer removing unit includes: The origin of the polar coordinate system of the robot mechanism is the common origin, and the origin of the polar coordinate system is the third layer and the fourth quadrant of the orthogonal coordinate system in which the direction of the polishing means is the positive direction of the Y axis. Are arranged on an extension of the semiconductor wafer carry-in / out center line.

A semiconductor wafer processing apparatus according to claim 2 is the semiconductor wafer processing apparatus according to claim 1,
A storage means is provided for storing a semiconductor wafer before processing before being supplied to the polishing means and / or a processed semiconductor wafer taken out from the damaged layer removing means.

A semiconductor wafer processing apparatus according to a third aspect is the semiconductor wafer processing apparatus according to the first aspect,
The cleaning unit was arranged in one of the first quadrant and the second quadrant of the coordinate system.

A semiconductor wafer processing apparatus according to a fourth aspect is the semiconductor wafer processing apparatus according to the third aspect,
The mounting section is arranged in a quadrant on the opposite side of the washing section with respect to the Y axis of the coordinate system.

According to the present invention, polishing means for mechanically polishing a semiconductor wafer, cleaning means for receiving and cleaning the polished semiconductor wafer, damage layer removing means for removing a damaged layer of the cleaned semiconductor wafer, By providing, in the same apparatus, wafer handling means by a robot mechanism of a polar coordinate system for transferring a semiconductor wafer between the polishing means, the cleaning means and the damaged layer removing means in the same apparatus, thereby reducing the number of times semiconductor wafers need to be changed. The wafer can be prevented from being damaged, and the equipment can be made compact.

[0012]

Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a perspective view of a semiconductor wafer processing apparatus according to one embodiment of the present invention, FIG. 2 is a plan view of a semiconductor wafer processing apparatus according to one embodiment of the present invention, and FIGS. FIG. 5 is a perspective view of a wafer storage unit of the semiconductor wafer processing apparatus according to the embodiment; FIG. 5 is a partial plan view of the semiconductor wafer processing apparatus according to one embodiment of the present invention; Side view of a polishing unit of a wafer processing apparatus,
7 is a cross-sectional view of a wafer cleaning unit of the semiconductor wafer processing apparatus according to one embodiment of the present invention, FIG. 8 is a cross-sectional view of a plasma processing unit of the semiconductor wafer processing apparatus of one embodiment of the present invention,
9 and 10 are process explanatory views of a method for processing a semiconductor wafer according to one embodiment of the present invention, and FIG. 11 is a flow chart of semiconductor wafer cleaning in the method for processing a semiconductor wafer according to one embodiment of the present invention.

First, the overall structure of a semiconductor wafer processing apparatus will be described with reference to FIGS. 1 and 2,
In the first half 1a of the upper surface of the base 1, a wafer storage unit 2 having magazines (wafer cassettes) 2A and 2B, a first plasma processing unit, and a wafer transfer unit 3 having a robot mechanism of a polar coordinate system. 4A, a second plasma processing unit 4B, a pre-center unit 5, and a wafer cleaning unit 10 are radially arranged, and these are arranged in a range where a wafer can be taken in and out by the wafer transfer unit 3.

The magazines 2A and 2B of the wafer storage unit 2
The semiconductor wafers before and after processing are stored. That is, the wafer storage unit 2 is a storage unit for the semiconductor wafer 11. The first plasma processing unit 4A and the second plasma processing unit 4B remove a damaged layer generated by mechanical polishing on the surface of the semiconductor wafer by an etching action of plasma generated in a reduced-pressure atmosphere. Therefore, the first plasma processing unit 4A and the second plasma processing unit 4B serve as damaged layer removing means for the semiconductor wafer 11.

The pre-center unit 5 performs a pre-center operation for pre-positioning the semiconductor wafer 11 to be transferred to a polishing unit 6 described later. The wafer cleaning unit 10 cleans the semiconductor wafer 11 polished by the polishing unit 6 with a cleaning liquid. That is, the wafer cleaning unit 10 is a cleaning unit for the semiconductor wafer 11.

A polishing section 6 is provided on the rear half 1b of the upper surface of the base section 1. The polishing unit 6 includes a wall 6a erected on the upper surface of the base 1, and a first polishing unit 8A and a second polishing unit 8B are disposed on the front side surface of the wall 6a. The first polishing unit 8A and the second polishing unit 8B perform rough polishing and finish polishing of the semiconductor wafer 11, respectively. That is, the polishing section 6 is a polishing means for mechanically polishing the semiconductor wafer 11. A turntable 7 is disposed below the first polishing unit 8A and the second polishing unit 8B, surrounded by the combing 6b. The turntable 7 rotates by an index, holds the semiconductor wafer to be polished, and positions it with respect to the first polishing unit 8A and the second polishing unit 8B.

In front of the polishing section 6, a wafer loading section 9 is provided.
A, a wafer unloading section 9B is provided. The wafer carry-in unit 9A carries the semiconductor wafer positioned in the pre-center unit 5 into the polishing unit 6. The wafer unloading section 9B unloads the semiconductor wafer after mechanical polishing from the polishing section 6. Therefore, the above-described wafer transfer unit 3, wafer carry-in unit 9A, and wafer carry-out unit 9B serve as the semiconductor wafer 11 between the polishing unit 6, the wafer cleaning unit 10, the first plasma processing unit 4A, or the second plasma processing unit 4B. And a wafer handling means for supplying the semiconductor wafer 11 to the polishing unit 6 and taking out the dry-etched semiconductor wafer 11 from the first plasma processing unit 4A or the second plasma processing unit 4B.

Here, the layout of the above components on the base 1 will be described. As shown in FIG. 2, on the base unit 1, an XY orthogonal coordinate system is set in which the origin O of the polar coordinate system of the robot mechanism of the wafer transfer unit 3 is a common origin, and the direction of the polishing unit 6 is the positive Y-axis direction. Have been. In this orthogonal coordinate system, the pre-center unit 5, the wafer loading unit 9A, the first
Of the second polishing unit 8A in the first quadrant
B, the wafer unloading section 9B, the wafer cleaning section 10 in the second quadrant, the first plasma processing section 4A, the magazine 2A in the third quadrant, and the second plasma processing section 4B, the magazine 2B.
Are arranged in the fourth quadrant, respectively.

In this layout, the magazine 2A,
2B, the first plasma processing unit 4A, the second plasma processing unit 4B, the pre-center unit 5, and the wafer loading / unloading direction of each unit of the wafer cleaning unit 10 are arranged so as to coincide with the direction of the origin O of the polar coordinate system. ing. In particular, since the first plasma processing unit 4A and the second plasma processing unit 4B require high accuracy in the directional position at the time of loading / unloading of the wafer, the extension lines La, Lb of the respective wafer loading / unloading center lines.
The disposition position is set so that the origin O is accurately located above.

Hereinafter, the configuration and function of each section will be sequentially described. First, the wafer transfer unit 3 will be described. FIG.
2, a wafer transfer section 3 is provided in a recess 1c formed at the center of the first half 1a. On the base member 3a of the wafer transfer section 3, a robot mechanism of a polar coordinate system is provided. The base member 3a is moved on the base portion 1 around the origin O of the polar coordinate system by a driving mechanism (not shown).
The robot can be turned by 60 degrees, and the direction of the robot mechanism can be freely controlled.

The robot mechanism includes a second swing arm 14b and a first swing arm 14a extending in the lateral direction with respect to an arm shaft (not shown) which can be vertically extended and retracted on the base member 3a. The second rotating arm 14b is connected to the wafer holding unit 17 at the distal end thereof.
The wafer holding unit 17 has a suction hole 17a on its upper surface.
A crotch fork-like member 17b (see FIG. 4);
It is rotated about an axis by the hand rotation mechanism 15 and the inclination of the wafer holding unit 17 is controlled by the wrist mechanism 16. Further, by turning the first turning arm 14a and the second turning arm 14b, the wafer holder 17 can be moved forward and backward in the horizontal direction.

By driving each part of the robot mechanism, the wafer holding unit 17 can store the wafers such as the magazines 2A and 2B, the first plasma processing unit 4A, the second plasma processing unit 4B, the pre-center unit 5, and the wafer cleaning unit 10. Move to the delivery target. As described above, these parts to be transferred are arranged so that the respective wafer loading / unloading directions coincide with the direction of the origin O of the polar coordinate system. The semiconductor wafer 11 can be transferred between the parts to be transferred.

That is, the wafer holder 17 can be turned so that the wafer holding portion 17 can be directed in the wafer loading / unloading direction of each portion to be transferred.
a) The second pivot arm 14b allows the wafer holding unit 17 to move forward in the horizontal direction to access each unit. By driving an arm shaft (not shown), the wafer holder 17 moves up and down. This vertical movement and ON / OFF of vacuum suction from the suction hole 17a of the wafer holding unit 17
By combining the above, the semiconductor wafer 11 can be attracted to and detached from the wafer holding unit 17. Further, by driving the hand rotation mechanism 15, the semiconductor wafer 11 (see FIG. 4) in a state of being suction-held by the suction hole 17a in the wafer holding unit 17 can be turned upside down.

As described above, by adopting a configuration in which the respective parts to be transferred are radially arranged around the wafer transfer part 3 using the robot mechanism of the polar coordinate system.
A single robot mechanism can cover a plurality of wafer delivery targets, and a compact semiconductor wafer processing apparatus with excellent work efficiency is realized.

Next, the wafer storage section 2 will be described. As shown in FIGS. 1 and 2, the wafer storage unit 2 includes two wafer storage magazines 2A and 2B.
A and 2B store a large number of semiconductor wafers to be thinned. As shown in FIGS. 3 and 4, the magazines 2 </ b> A and 2 </ b> B have a structure in which shelf members 13 are provided in multiple stages inside a housing 12, and a semiconductor wafer 11 is placed on the shelf members 13.

The semiconductor wafer 11 contains silicon as a main component, and has a plurality of semiconductor elements. A protective film 11a is formed on the circuit formation surface of the semiconductor wafer 11 (see FIG. 10B). The protective film 11a has a function of protecting the circuit pattern of the semiconductor wafer 11 and reinforcing the semiconductor wafer 11 to improve the bending strength. When the semiconductor wafer 11 is stored in the magazines 2A and 2B, the shelf member 1 is placed with the protective film 11a facing upward.
3 is placed.

Here, the operation of taking out and storing the semiconductor wafer 11 from the magazines 2A and 2B by the wafer holding unit 17 will be described. At the time of unloading, as shown in FIG. 3, the wafer holding unit 17 is inserted up to above the semiconductor wafer 11 stored in the magazine 2A (2B) with the suction hole 17a facing downward. Next, the wafer holding unit 1
The semiconductor wafer 11 is lowered and brought into contact with the upper surface of the semiconductor wafer 11, and in this state, the semiconductor wafer 11 is suction-held on the lower surface of the wafer holding portion 17 by vacuum suction from the suction holes 17 a. Thereafter, when the wafer holding unit 17 is raised again and pulled out of the magazine 2A (2B), the semiconductor wafer 11 is taken out while being held by suction on the lower surface of the wafer holding unit 17.

FIG. 4 shows a semiconductor wafer 11 in a magazine 2A.
(2B) shows the storing operation of returning the inside. In this storing operation, the semiconductor wafer 1 sucked and held from the upper surface side by the wafer holding unit 17 with the thinned surface facing upward.
1 is turned upside down by rotating the wafer holding unit 17 around an axis, and is stored in the magazine 2A (2B) with the protective film 11a facing upward. At this time, the same semiconductor wafer 11 is returned to the same position stored before processing.

This return is carried out by inserting the wafer holding portion 17 holding the semiconductor wafer 11 on the upper surface into the magazine 2A (2B), and then releasing the vacuum suction and lowering the wafer holding portion 17. That is, in this lowering operation, as shown in FIG. 4, the fork-like member 17 b of the wafer holding unit 17 passes through the notch 13 a downward with the semiconductor wafer 11 placed on the shelf member 13. Then, the storage of the semiconductor wafer 11 is completed by pulling the wafer holding unit 17 out of the magazine.

Next, the pre-center unit 5 will be described with reference to FIG. The pre-center unit 5 is for positioning the semiconductor wafer 11 supplied to the polishing unit 6 in advance. In FIG. 5, a pre-center unit 5 is a circular mounting table 20.
It has. On the upper surface of the mounting table 20, there is formed a removed portion 21 (see hatched portion) whose upper surface is partially removed corresponding to the shape of the wafer holding portion 17, and the depth of the removed portion 21 is equal to the removed portion 21. The depth is set so that the wafer holding unit 17 can be accommodated therein.

The loading of the semiconductor wafer 11 into the pre-center unit 5 is performed as follows. First, the wafer holding unit 17 holding the semiconductor wafer 11 on the upper surface side is placed on the mounting table 20.
The horizontal position of the wafer holding unit 17 is moved upward to remove unit 2.
After that, the wafer holding unit 17 is lowered to a height position where the wafer holding unit 17 is accommodated in the removing unit 21. Thereby, the semiconductor wafer 11 is mounted on the mounting table 20. Thereafter, the wafer holding unit 17 is retracted from the inside of the removing unit 21 to complete the loading of the semiconductor wafer 11.

The mounting table 20 is provided with a plurality of groove portions 22 radially toward the center at equal positions at 120 degrees, and each groove portion 22 is positioned so as to be movable along the groove direction. The claw 22a is provided. By moving the positioning claw 22a toward the center of the mounting table 20 while the semiconductor wafer 11 is mounted on the mounting table 20, the semiconductor wafer 11 is aligned with the center position of the mounting table 20. Is done. That is, the pre-center unit 5
This is a mounting section for mounting and positioning the semiconductor wafer 11 supplied to the polishing section 6.

The wafer loading section 9 is adjacent to the pre-center section 5.
A is provided. As shown in FIG. 5, the wafer carrying-in section 9A is configured by attaching a suction head 25A to a distal end of a transfer arm 24A that is turned and moved up and down by an arm driving mechanism 23. When the suction head 25A is moved over the semiconductor wafer 11 in the pre-center section 5 and lowered, the suction head 25A suction-holds the semiconductor wafer 11. Thereafter, the semiconductor wafer 11 is carried into the polishing unit 6 by moving the transfer arm 24A upward and turning in the direction of the polishing unit 6, and moves to a wafer delivery station (described later).

Next, the polishing section 6 will be described with reference to FIGS. As shown in FIGS. 2 and 6, a turntable 7 is provided on the upper surface of the base 1. The turntable 7 is rotatable by an index around the central axis.
A base chuck table 7a is provided.

Each chuck table 7a receives the semiconductor wafer 11 from the transfer arm 24A of the wafer loading section 9A at the wafer transfer station (the index position on the left side in FIG. 6). Chuck table 7a
The semiconductor wafer 11 adsorbs and holds the semiconductor wafer 11 on its upper surface, and is rotatable about the axis.

A first polishing unit 8A and a second polishing unit 8B are provided on the side surface of the wall portion 6a erected on the right end of the upper surface of the base portion 1. First polishing unit 8
A, the horizontal arrangement of the second polishing unit 8B corresponds to the index position of the turntable 7, respectively, and the lower index position of the first polishing unit 8A and the second polishing unit 8B is Each has a rough polishing station and a finish polishing station.

The first polishing unit 8A and the second polishing unit 8B each have a rotation drive unit 30 at the lower part. On the lower surface of the rotation drive unit 30, grindstones 31A and 31B for rough polishing or finish polishing for polishing the semiconductor wafer 11 are mounted. A grindstone of about # 500 is used for rough polishing, and generally # 3000 to # 4000 for finish polishing.
Is used. These first polishing units 8
A, the first polishing unit 8B is moved up and down by a built-in vertical movement mechanism.

As shown in FIG. 6, the chuck table 7a holding the semiconductor wafer 11 is moved to the first polishing unit 8A.
The grinding wheel 31A is moved to the index position (polishing position) below the (or second polishing unit 8B).
(Or 31B) is lowered and brought into contact with the upper surface of the semiconductor wafer 11, and the grindstone 31A (or 31B) is rotated by the rotation drive unit 30, whereby the semiconductor wafer 11 is rotated.
Is polished.

When the chuck table 7a is located at a polishing position below the first polishing unit 8A and the first polishing unit 8B, the chuck table 7a is driven to rotate by a driving mechanism (not shown). I have. The rotation of the chuck table 7a and the grinding wheel 31
By combining the rotations of A and 31B, the upper surface of the semiconductor wafer 11 is uniformly polished without bias during polishing.

During this polishing, a polishing liquid is supplied to the polishing surface of the semiconductor wafer 11 by a polishing liquid supply means (not shown). The polishing liquid is accumulated in the combing 6b provided on the upper surface of the base 1 and surrounding the turntable 7, and is led out. The polished semiconductor wafer 11 moves to the wafer delivery position by moving the chuck table 7a by the index rotation of the turntable 7, and then moves the transfer arm 2 of the wafer unloading section 9B.
It is carried out by 4B.

Next, the structure of the wafer cleaning section 10 will be described with reference to FIG. The wafer cleaning unit 10 is disposed on the opposite side of the printer unit 5 with respect to the Y axis of the rectangular coordinate system. In FIG. 7 showing a cross section taken along the line BB of FIG. 2, an opening 35a is provided in the upper part of the box-shaped cleaning frame 35 by partially cutting off the front surface and two side surfaces. The opening 35a has such a size that the wafer carrying-out section 9B holding the semiconductor wafer 11 can enter and exit. An opening 35c for drainage and a bearing boss 35d projecting upward are formed in the bottom 35b of the cleaning frame 35.
Is provided. A bearing 38 is provided in the bearing boss 35d.
And a rotation support portion 40 is coupled to an upper portion of a vertical shaft portion 39 supported by the bearing 38.

A plurality of suction holes 40a are provided on the horizontal upper surface of the rotation support portion 40, and the suction holes 40a
It communicates with the suction hole 39a provided in the inside. When the semiconductor wafer 11 is placed on the upper surface of the rotary support part 40, the suction control part 46 connected to the suction hole 39a is driven to perform vacuum suction from the suction hole 39a, so that the semiconductor wafer 11
Is sucked and held on the upper surface of the rotation support section 40.

A pulley 41 is connected to a lower portion of the shaft 39, and a pulley 43 connected to a rotating shaft 44a of a motor 44 and a belt 42 are tuned to the pulley 41. The motor 44 is driven by a motor drive unit 45.
By driving the motor 44, the shaft 39 rotates, and therefore the semiconductor wafer 11 held by the rotation support 40 is rotated.
Spins.

A cylindrical cover 36 surrounding the semiconductor wafer 11 is vertically movably mounted inside the cleaning frame 35. A flange 36a provided above the cover 36 has a flange 36a. , The rod 37a of the cylinder 37 is connected. By driving the cylinder 37,
The cover 36 moves up and down. In a state where the cover 36 is raised, the flange 36 a is at a position in contact with the ceiling surface of the cleaning frame 35, and the opening 35 a is closed by the cover 36.

A cleaning liquid nozzle 47 and an air nozzle 49 are disposed on the ceiling surface of the cleaning frame portion 35 with their jetting directions directed downward. The cleaning nozzle 47 is connected to a cleaning liquid supply unit 48 that supplies a cleaning liquid such as pure water, and by driving the cleaning liquid supply unit 48, the semiconductor wafer 1 supported by the rotation support unit 40 from the cleaning nozzle 47.
The cleaning liquid is sprayed on the upper surface of the first cleaning liquid.

At this time, by driving the motor 44, the semiconductor wafer 11 is in a spin rotation state, and the cleaning liquid jetted to the center of the semiconductor wafer 11 flows toward the outer edge of the semiconductor wafer 11 by centrifugal force. As a result, foreign matters adhering to the upper surface of the semiconductor wafer 11 are removed together with the cleaning liquid, and accumulate on the bottom surface of the cleaning frame 35. Then, the liquid is guided from the opening 35c to a wastewater treatment device (not shown) through the drainpipe 35e together with the cleaning liquid.

The air nozzle 49 is provided with an air supply unit 50.
When the air supply unit 50 is driven, air is jetted downward from the air hole 49 a of the air nozzle 49. Thereby, the semiconductor wafer 11 after cleaning
The cleaning droplets remaining on the upper surface are removed, and draining and drying are performed. The above operations are performed by the cylinder 37, the motor drive unit 45, the suction control unit 46, the cleaning liquid supply unit 48, and the air supply unit 50 by the control unit (not shown) of the apparatus main body.
It is performed by controlling by.

Next, the first and second plasma processing units 4A and 4B will be described with reference to FIG. These two plasma processing units have the same function, and only one or both of them are used depending on the work load. In FIG. 8 showing an AA cross section in FIG. 2, an opening 51a is provided on a side surface of the vacuum chamber 51.
The opening 51a is for carrying in and out the semiconductor wafer 11, and has a size that allows the wafer holding unit 17 holding the semiconductor wafer 11 to enter and exit. The opening 51a has a vertically movable gate 56, and the gate 56 is connected to a rod 57a of a cylinder 57. By driving the cylinder 57, the gate 56 moves up and down, and the opening 51a is opened and closed.

Openings 51b and 51c are provided on the ceiling surface and the bottom surface of the vacuum chamber 51, respectively. The upper electrode 5 is connected to the opening 51b via a vacuum-tight bearing 51e.
The second support portion 52a is inserted so as to be vertically movable. The support portion 52a is connected to the electrode lifting / lowering driving portion 55, and the upper electrode 52 is raised / lowered by driving the electrode lifting / lowering driving portion 55.

A gas outlet 52b is provided on the lower surface of the upper electrode 52.
Are opened, and the gas ejection port 52b is
Gas supply unit 54 through an inner hole 52c provided inside
Is connected to The gas supply unit 54 supplies a mixed gas mainly composed of oxygen and a fluorine-based gas such as CF ₄ for generating plasma.

A support portion 58 a of the lower electrode 58 is inserted through an opening 51 c on the bottom surface of the vacuum chamber 51 via an insulator 53 in a vacuum-tight manner. The upper surface of the lower electrode 58 is provided with a suction hole 5.
8b are provided, and the suction holes 58b are
a through the inner hole 58c provided inside the suction control unit 6
0 is connected. By driving the suction control unit 60 and performing vacuum suction through the suction holes 58 b, the semiconductor wafer 11 is suction-held on the upper surface of the lower electrode 58 and held. By driving the suction control unit 60 to apply a positive pressure to the suction holes 58b, the suction-held semiconductor wafer 11 is released from the suction state.

A cooling hole 58d is provided inside the lower electrode 58, and the cooling hole 58d is formed in the inner hole 5 in the support portion 58a.
8e, it is connected to the electrode cooling unit 61. By driving the electrode cooling unit 61 to circulate the coolant in the cooling holes 58d, the heat generated during the plasma processing is reduced by the lower electrode 5
8 to the refrigerant. Thereby, abnormal temperature rise of the lower electrode 58 is prevented, and damage to the protective film 11a of the semiconductor wafer 11 mounted on the lower electrode 58 due to heat can be prevented.

The vacuum chamber 51 is provided with an exhaust hole 51d, and the exhaust hole 51d is connected to a gas exhaust portion 59 via a pipe joint 51f. By driving the gas exhaust unit 59, the space in the vacuum chamber 51 is evacuated. The lower electrode 58 is electrically connected to the high-frequency power supply 62 via a support 58a. The upper electrode 52 is connected to the ground part 52d via the support part 52a, and by driving the high frequency power supply part 62, a high frequency voltage is applied between the opposed upper electrode 52 and lower electrode 58.

In the plasma processing, with the semiconductor wafer 11 placed and held on the lower electrode 58, first, the vacuum chamber 51 is closed and the inside is evacuated. Then, the upper electrode 52 and the lower electrode 5 are supplied to the vacuum chamber 51 while the mixed gas for plasma generation is supplied from the gas supply unit 54.
8, a high frequency voltage is applied to the upper electrode 5
A plasma discharge occurs between the second electrode 58 and the lower electrode 58.
Due to the plasma etching effect generated by this,
The upper surface of the semiconductor wafer 11 is etched and thinned.

By controlling the gas supply unit 54, the electrode elevation drive unit 55, the gas exhaust unit 59, the suction control unit 60, the electrode cooling unit 61, and the high frequency power supply unit 62 by the control unit (not shown) of the main unit, The above-described plasma processing operation is performed. At this time, data of the gas flow rate is transmitted from the gas supply unit 54, data of the chamber internal pressure is transmitted from the gas exhaust unit 59, and data of the refrigerant temperature (that is, the electrode temperature) is transmitted from the suction control unit 60 to the control unit. The control unit controls the plasma processing operation based on these data.

This semiconductor wafer processing apparatus is configured as described above. Hereinafter, the thinning processing of the semiconductor wafer will be described. This thinning is performed by forming a protective film 11 on a circuit forming surface of a semiconductor wafer 11 in which a plurality of semiconductor elements are formed.
This is performed after forming a. This semiconductor wafer 11
As shown in FIG. 3, the protective film 1 is formed on the magazine 2A (or 2B).
3A is supplied in a state where it is stored with the side 1a facing upward.
As shown in (2), the protective film 11a side is taken out by vacuum suction by the wafer holding unit 17. And the semiconductor wafer 1
The wafer holding unit 17 holding the wafer 1 by suction is moved to the pre-center unit 5 by the robot mechanism of the wafer transfer unit 3.

Here, the wafer holding unit 17 is rotated about an axis, and the semiconductor wafer 1 sucked and held by the wafer holding unit 17 is rotated.
1 is turned upside down. As a result, the semiconductor wafer 11 is suction-held on the upper surface of the wafer holding unit 17 with the protective film 11a facing downward as shown in FIG. By lowering the wafer holder 17, the semiconductor wafer 11 is mounted on the mounting table 20 with the protective film 11a side facing down. Thereafter, when the wafer holding unit 17 is retracted from the inside of the groove 21, the positioning claw 22a presses the outer peripheral portion of the semiconductor wafer 11 toward the center from three directions. Thereby, the alignment of the semiconductor wafer 11, that is, the pre-center operation is performed.

Next, the semiconductor wafer 11 positioned by the pre-center operation is picked up by the suction head 25A of the wafer loading section 9A and transferred to the polishing section 6 as shown in FIG. That is, the suction head 25A is moved to the wafer transfer position, where the semiconductor wafer 11 is transferred onto the chuck table 7a.

Thereafter, mechanical polishing by the polishing section 6 is performed. First, the chuck table 7a holding the semiconductor wafer 11 moves to the rough polishing station below the first polishing unit 8A, where the rough polishing using the grindstone 31A is performed. Next, the chuck table 7a moves to the finishing polishing station, and the second polishing unit 8B performs the final polishing using the finer grindstone 31B.
At this time, the semiconductor wafer 11 is thinned to a size thicker by a predetermined thickness than a predetermined target thickness, that is, a size larger by a dry etching allowance set in a range of 3 μm to 50 μm.

When the finish polishing is completed, the chuck table 7a holding the semiconductor wafer 11 moves to the wafer transfer station again due to the index rotation of the turntable 7. The semiconductor wafer 11 is picked up by the suction head 25B of the wafer unloading section 9B and moved to the wafer cleaning section 10 by rotating the transfer arm 24B. Therefore, the wafer unloading section 9B serves as a pre-cleaning transfer means for taking out the polished semiconductor wafer 11 from the polishing section 6 and passing it to the wafer cleaning section 10.

In the unloading operation of the semiconductor wafer 11, in the present embodiment, the protective film 11
Since a is formed, the bending strength is reinforced even in the state where the microcrack-introduced layer is generated by the mechanical polishing, and the semiconductor wafer 11 during transportation can be prevented from being damaged.

Next, the cleaning operation in the wafer cleaning section 10 will be described with reference to the flow chart of FIG. First, in FIG. 7, with the cover portion 36 lowered, the transfer arm 24B of the wafer carrying-out portion 9B is turned, and the semiconductor wafer 11 held by the suction head 25B is carried into the cleaning frame portion 35 and is placed on the rotation supporting portion 40. (ST1).

Next, the semiconductor wafer 11 is sucked and held by vacuum suction from the suction hole 40a of the rotary support portion 40 (ST2), and the suction of the semiconductor wafer 11 by the suction head 25B is released (ST3). Then, when the transfer arm 24B has retracted to the outside, the cover unit 36 is raised (ST4). As a result, the semiconductor wafer 11 is in a state in which the periphery is enclosed in the cleaning frame portion 35, and a state in which the cleaning liquid can be jetted.

After that, the motor 44 is driven to
0, and the semiconductor wafer 11 is spin-rotated (ST5). In this state, the cleaning liquid is jetted from the cleaning nozzle 47 (ST6), and after a predetermined cleaning time has elapsed, the jetting of the cleaning liquid is stopped (ST7). After this, air nozzle 4
Air is blown out from the semiconductor wafer 9 (ST8), and the semiconductor wafer 11
Drain and dry the top surface. After a predetermined time, the air blowing is stopped (ST9), and thereafter, the rotation of the rotation support unit 40 is stopped (ST10). Thus, the washing, draining and drying are completed.

When the cover 36 is lowered (ST11), the robot mechanism of the wafer transfer unit 3 is driven to move the wafer holder 17 into the cleaning frame 35 (ST12). Then, the suction hole 17 of the wafer holding unit 17
The upper surface of the semiconductor wafer 11 is sucked by a, and the suction by the suction hole 40a of the rotation support unit 40 is released (ST13). Then, the wafer holding unit 17 picking up the semiconductor wafer 11 is lifted and carried out of the cleaning frame unit 35 (ST14).

Next, the semiconductor wafer 11 from which foreign substances on the surface have been removed by cleaning is removed from the first plasma processing section 4A or the second plasma processing section 4A.
The plasma etching (dry etching) is performed here. In this plasma etching, the surface of the semiconductor wafer 11 thinned to a size larger by a dry etching allowance set in a range of 3 μm to 50 μm than a target thickness by mechanical polishing is further plasma etched to remove the dry etching allowance. Thereby, the semiconductor wafer 11 is thinned to the target thickness.

When finish polishing is performed with a grindstone of # 3000 to # 4000, the dry etching allowance is 5 μm to 6 μm.
It is desirable to set it to about m. As a result, the application rate of mechanical polishing with excellent polishing efficiency is increased as much as possible to improve the work efficiency, and the microcrack-introduced layer (generally 3 μm to 5 μm) generated by the finish polishing can be completely removed. And removal quality can be compatible.

This plasma etching is described with reference to FIG.
This will be described with reference to FIG. As shown in FIG.
The wafer cleaning unit 10 is operated by the robot mechanism of the wafer transfer unit 3.
Then, the wafer holding unit 17 holding the semiconductor wafer 11 after cleaning on the lower surface by suction is moved to the side of the opening 51 a of the vacuum chamber 51. At this time, the gate 56 is lowered, the opening 51a is in an open state, and the upper electrode 52 is in a state of being raised by the electrode lifting drive unit 55. The wafer transfer unit 3 cleans the semiconductor wafer 1 after cleaning from the wafer cleaning unit 10.
1 is taken out and transferred to the plasma processing units 4A and 4B to serve as a post-cleaning transfer unit.

Next, as shown in FIG. 9B, the wafer holder 17 is moved into the vacuum chamber 51 through the opening 51a, and the wafer holder 17 is lowered.
The semiconductor wafer 11 held on the lower surface is placed on the upper surface of the lower electrode 58. Then, the suction by the wafer holding unit 17 is released, and the protective film 11 a of the semiconductor wafer 11 is sucked and held by the suction hole 58 b of the lower electrode 58. When the semiconductor wafer 11 is carried in and out of the plasma processing units 4A and 4B, the carry-in / out center line L of the plasma processing units 4A and 4B is used.
Since the arrangement of the plasma processing units 4A and 4B is set such that the origin 0 is located on the extension line of a and Lb (see FIG. 2), the carrying-in / out operation with high directional accuracy is realized.

Thereafter, when the wafer holding unit 17 is raised and retracted to the outside, the cylinder 57 is driven to raise the gate 56 and close the vacuum chamber 51 as shown in FIG. The upper electrode 52 is lowered by driving the electrode raising / lowering drive unit 55, and the distance between the lower surface of the upper electrode 52 and the upper surface of the lower electrode 58 is set to a predetermined value suitable for plasma etching as shown in FIG. The distance D between the electrodes is set.

Then, the above-described plasma etching process is performed in this state. That is, after the inside of the vacuum chamber 51 is evacuated, a mixed gas of a fluorine-based gas and an oxygen gas is ejected from the gas ejection port 52b on the lower surface of the upper electrode 52 as a plasma generating gas to maintain the inside of the vacuum chamber 51 at a predetermined gas pressure. I do. In this state, a high-frequency voltage is applied between the upper electrode 52 and the lower electrode 58. As a result, a plasma discharge is generated in the space between the upper electrode 52 and the lower electrode 58, and silicon on the surface of the semiconductor wafer is removed by the action of an active substance generated by the plasma discharge.

This plasma etching process is continuously performed until the semiconductor wafer 11 reaches the target thickness. Thereby, in the mechanical polishing process, the semiconductor wafer 1
The micro-crack-introduced layer formed on the surface of No. 1 is removed. This microcrack-introduced layer is usually 3 μm to 5 μm
As described above, the target thickness is mechanically polished to a dimension larger than the target thickness by a dry etching allowance exceeding the microcrack introduction layer, and then removed by plasma etching for the dry etch allowance. In the state where it has been processed, the microcrack-introduced layer is completely removed.

The semiconductor wafer 11 after the completion of the plasma etching is taken out by the wafer holding section 17 of the wafer transfer section 3 and stored in the same position of the magazine 2A (or 2B) in the wafer storage section 2 where the semiconductor wafer 11 is taken out. Is done. Then, the above operation is continuously repeated for the other semiconductor wafers 11. In the transfer of the semiconductor wafer 11 after the thinning, the damaged layer is completely removed as described above, so that the bending strength of the semiconductor wafer 11 is improved and the semiconductor wafer 11 is not damaged.

As described above, according to the present embodiment, it is possible to prevent breakage that occurs during the manufacturing process such as when the semiconductor wafer 11 is transported due to microcracks, and to improve the processing yield. In addition, in the present embodiment, since the components that perform the respective functions of mechanical polishing, cleaning, and removal of the damaged layer are connected by a single robot mechanism, the area occupied by the equipment is reduced, and the equipment cost is reduced. In addition to reducing the number of times the semiconductor wafer 11 has to be transferred during transfer compared to a conventional apparatus, that is, a method in which a semiconductor wafer is transferred between a plurality of individual apparatuses using a transfer means such as a robot. It can be reduced to the minimum number. Therefore, the probability of occurrence of breakage of the semiconductor wafer during handling can be reduced, and the above-mentioned processing yield can be further improved.

Further, in the semiconductor wafer processing apparatus shown in the present embodiment, the regions of the polishing section 6 and the other sections are separately arranged on the common base section 1, and individual sections are provided between them. The semiconductor wafer 11 by the transfer means
Is passed. That is, the transfer and processing of the semiconductor wafer 11 in a state where the contaminants adhere to the work area (see the second half 1b shown in FIGS. 1 and 2) in which the adherence of contaminants such as polishing powder is inevitable using the polishing liquid. A clean room area such as a plasma etching process in which a high cleanliness is required for the object (the first half 1a shown in FIGS. 1 and 2)
The transfer of the semiconductor wafer 11 in the clean state in (see) is performed separately by separate transfer means.

As a result, the transfer means in the clean room area is not contaminated by the adhesion of the contaminants. Therefore, in the plasma etching process performed for the purpose of removing the microcrack-introduced layer, the surface of the semiconductor wafer 11 does not have any foreign matter that inhibits the etching effect, and the damaged layer on the surface of the semiconductor wafer 11 is completely removed. The folding strength can be improved.

The present invention is not limited to the above-described embodiment, but may be implemented with various changes. For example, in the present embodiment, mechanical polishing is performed in two stages of the rough polishing process and the finish polishing process, but the finish polishing process may be omitted. In this case, the depth of the damaged layer on the upper surface of the wafer is 10 μm or more because the wafer is polished with a coarse grindstone. Therefore, the damage layer can be completely removed by leaving a dry etching allowance of about 50 μm and dry etching the remaining to a target thickness. By making the mechanical polishing only one step of the rough polishing step, the size of the polishing section can be reduced, and a semiconductor wafer processing apparatus with a small occupied floor area can be realized.

Further, in the present embodiment, the pre-center unit 5 and the wafer loading unit 9A are arranged in the first quadrant of the rectangular coordinate system, and the wafer unloading unit 9B and the wafer cleaning unit 10 are arranged in the second quadrant. May be interchanged, and the wafer unloading section 9B and the wafer cleaning section 10 may be arranged in the first quadrant.

Further, in this embodiment, an example is shown in which dry etching by plasma processing is used as a means for removing a damaged layer. However, the present invention is not limited to this, and wet etching is performed using a chemical solution such as hydrofluoric acid or nitric acid. It may be by etching.

[0080]

According to the present invention, a polishing means for mechanically polishing a semiconductor wafer, a cleaning means for receiving and cleaning the polished semiconductor wafer, and a damaged layer removing means for removing a damaged layer of the cleaned semiconductor wafer And a wafer handling means by a robot mechanism of a polar coordinate system for transferring the semiconductor wafer between the polishing means, the cleaning means and the damaged layer removing means in the same apparatus. As a result, the semiconductor wafer can be prevented from being damaged, the processing yield can be improved, and the equipment can be made compact.

[Brief description of the drawings]

FIG. 1 is a perspective view of a semiconductor wafer processing apparatus according to an embodiment of the present invention.

FIG. 2 is a plan view of a semiconductor wafer processing apparatus according to one embodiment of the present invention;

FIG. 3 is a perspective view of a wafer storage unit of the semiconductor wafer processing apparatus according to one embodiment of the present invention;

FIG. 4 is a perspective view of a wafer storage unit of the semiconductor wafer processing apparatus according to one embodiment of the present invention;

FIG. 5 is a partial plan view of the semiconductor wafer processing apparatus according to one embodiment of the present invention;

FIG. 6 is a side view of a polishing unit of the semiconductor wafer processing apparatus according to one embodiment of the present invention;

FIG. 7 is a sectional view of a wafer cleaning unit of the semiconductor wafer processing apparatus according to one embodiment of the present invention;

FIG. 8 is a sectional view of a plasma processing unit of the semiconductor wafer processing apparatus according to one embodiment of the present invention;

FIG. 9 is a process explanatory view of a semiconductor wafer processing method according to one embodiment of the present invention;

FIG. 10 is a process explanatory view of a method for processing a semiconductor wafer according to one embodiment of the present invention;

FIG. 11 is a flowchart of semiconductor wafer cleaning in the semiconductor wafer processing method according to one embodiment of the present invention;

[Explanation of symbols]

 Reference Signs List 2 wafer storage unit 3 wafer transfer unit 4A first plasma processing unit 4B second plasma processing unit 5 pre-center unit 6 polishing unit 8A first polishing unit 8B second polishing unit 9A wafer loading unit 9B wafer unloading unit 10 wafer Cleaning unit 11 Semiconductor wafer

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Tetsuhiro Iwai 1006 Kadoma Kadoma, Osaka Pref. Matsushita Electric Industrial Co., Ltd. 72) Inventor Kiyoshi Arita 1006 Kazuma Kadoma, Kadoma City, Osaka Prefecture F-term in Matsushita Electric Industrial Co., Ltd. (reference) 3C058 AA07 AB01 AB03 AB06 AB08 AC01 CB05 CB06 DA17

Claims (4)

[Claims] 1. A semiconductor wafer processing apparatus for polishing a surface of a semiconductor wafer by mechanical polishing and then removing a damaged layer on the polished surface, comprising: polishing means for mechanically polishing the semiconductor wafer; A mounting portion for mounting and positioning the semiconductor wafer before being passed to the first mounting portion for transferring the semiconductor wafer from the mounting portion to the polishing means, and a semiconductor wafer polished by the polishing means. A second transfer unit to be taken out, a cleaning unit that receives and cleans the polished semiconductor wafer from the second transfer unit, a damaged layer removing unit that removes a damaged layer of the semiconductor wafer after cleaning; A wafer transfer unit having a polar coordinate system robot mechanism for transferring the semiconductor wafer between the cleaning unit and the damaged layer removing unit, wherein the damaged layer removing unit is In the third and fourth quadrants of a rectangular coordinate system in which the origin of the polar coordinate system of the mechanism is a common origin and the direction of the polishing means is the positive direction of the Y axis, the origin of the polar coordinate system is the semiconductor wafer of the damage layer removing means. An apparatus for processing a semiconductor wafer, wherein the apparatus is disposed so as to be located on an extension of a carry-in / out center line. 2. A wafer transfer unit capable of loading and unloading a semiconductor wafer before processing before being supplied to the polishing means and a storage means for storing a processed semiconductor wafer taken out from the damaged layer removing means. The apparatus for processing a semiconductor wafer according to claim 1, wherein the apparatus is provided at an appropriate position. 3. The apparatus for processing a semiconductor wafer according to claim 1, wherein said cleaning section is arranged in one of a first quadrant and a second quadrant of said coordinate system. 4. The apparatus for processing a semiconductor wafer according to claim 3, wherein the mounting portion is disposed in a quadrant on the opposite side of the cleaning portion with respect to the Y axis of the coordinate system.