JP2001356737A - Display device and control method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce electromagnetic radiation because each bit of display data is inverted so frequently that the electromagnetic radiation is increased by switching when frequency components of a picture contained in the display data are high. SOLUTION: When a half number of bits or more of parallel input display data 10 are inverted at the same time, a display data generation part 4 inverts original display data. Also, it outputs a data inversion signal 13 indicating that the data have been inverted to a control circuit 5. Based on the signal outputted from the part 4, the control circuit 5 performs processing by converting into original display data. Thus, it is possible to reduce a switching frequency of a digital circuit and control the undesired electromagnetic radiation.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device for inputting digital display data used in a computer, a television, and the like, and more particularly, to a display device capable of suppressing radiation noise from digital data and a method of controlling the display device.

[0002]

2. Description of the Related Art FIG. 9 is a block diagram showing a configuration of a display device using a conventional liquid crystal. In this figure, the liquid crystal panel 5
Reference numeral 1 denotes a liquid crystal panel made of STN or TFT, and a scan drive circuit 52 is connected to the scan lines of the liquid crystal panel 51 to drive the scan lines.
It shows the case where one is used. The signal drive circuit 53 is connected to signal lines of the liquid crystal panel 51 and applies a voltage corresponding to display data to the signal lines. In this example, four identical circuit blocks are used. The control circuit 54 receives input display data 6 input from the outside.
0, the input clock 61, the enable signal 62, the vertical synchronizing signal 63, and the horizontal synchronizing signal 64,
And a clock for operating the signal drive circuit 53, a driver control signal 65, and display data 66. The power supply circuit 55 supplies a predetermined voltage to the scan drive circuit 52, the signal drive circuit 53, and the control circuit 54.

[0003] The operation of the liquid crystal display device configured as described above will be described below. The input display data 60 is, for example, 6-bit digital data, and is transferred in synchronization with the input clock 61. At this time, the display data is transferred line by line in synchronization with the horizontal synchronization signal 64 with the vertical synchronization signal 63 as a start signal. The enable signal 62 is a signal indicating the position of one line of valid display data, and a range in which the enable signal 62 is active is valid display data. For the display data input as described above, the control circuit 54 generates a signal drive circuit 53 and a scan drive circuit 52 based on the horizontal / vertical synchronization signals 63 and 64 and the enable signal 62.
, And a display data signal 66 is generated by rearranging and dividing the input display data as necessary, and a 1
Send out line by line. The scan drive circuit 52 selects a liquid crystal panel line by line, and the signal drive circuit 53 outputs a display drive voltage corresponding to the transferred display data, and writes the display voltage for one line to the liquid crystal panel. By repeating this operation, an image corresponding to the input display data can be displayed on the screen.

[0004]

In the conventional configuration as described above, since there is no restriction on the input display data, when the frequency component of the image included in the display data is very high, 1,0 of each bit of display data
Change becomes very fast, and electromagnetic radiation is increased. In particular, when an image is repeatedly turned ON and OFF for each dot continuously, all bits constituting the display data are repeatedly switched at half the frequency of the clock, thereby increasing unnecessary electromagnetic radiation and increasing logic. There is a problem that the power consumption of the circuit unit increases. This phenomenon is a similar problem both in the case of display data externally input to the control circuit and in the case of display data output from the control circuit and input to the signal drive circuit.

The display device and the control method thereof according to the present invention have been made in order to solve such a problem, and can reduce unnecessary electromagnetic radiation and power consumption even when the frequency component of display data is high. The purpose is to do.

[0006]

According to a first aspect of the present invention, there is provided a display panel, a driving circuit for supplying a display signal to the display panel, and a control circuit for outputting a display signal and a timing signal to the driving circuit. In the display device comprising: a display signal represented by a plurality of parallel bits is input at a predetermined period, and when bits changing simultaneously exceed half of the number of data bits, all bits of the display signal A display data generation unit that inverts the data from the original data, generates a converted display signal in which the display data remains unchanged when the data is 1/2 or less, and activates an output data inversion signal when the data is inverted; The control circuit receives the converted display data and the output data inverted signal output from the display data generation unit, and uses the converted display data as a basis. Includes data inversion control circuit for converting the display data, and said display data in synchronism with the input timing signal to output to the drive circuit.

According to a second aspect of the present invention, there is provided a display panel, a driving circuit for supplying a display signal to the display panel,
A control circuit for inputting a display signal and a timing signal to the drive circuit, wherein a display signal represented by a plurality of parallel bits is input at a predetermined cycle, and bits that change simultaneously have a number of bits of the plurality of data bits. When the value exceeds 1/2, the data of all the bits of the display signal is inverted from the original data, and when less than 1/2, a converted display signal in which the display data remains unchanged is generated.
A first display data generation unit that activates an output data inversion signal when inverting data; the control circuit includes a display data after conversion and an output data inversion signal output from the first display data generation unit; And a first data inversion control circuit for converting the converted display data into the original display data, and display data represented by a plurality of parallel bits output to the drive circuit in synchronization with the input timing signal. The number of bits changing simultaneously is 1/2
Invert the data of all the bits of the display signal when the value exceeds the threshold value, generate a converted display signal with the display data as it is when the value is 1/2 or less, and activate the output data inversion signal when the data is inverted. And a display data generator for outputting display data to the drive circuit in synchronization with an input timing signal. The drive circuit inverts display data output from the control circuit and output data inversion. It is characterized by including a second data inversion control circuit for converting display data after conversion into original display data based on a signal.

According to a third aspect of the present invention, there is provided a display panel, a driving circuit for supplying a display signal to the display panel,
A control circuit that outputs a display signal and a timing signal to the drive circuit, wherein a plurality of display signals, each represented by a plurality of parallel bits, are input at a predetermined cycle, and bits that change simultaneously are each When the number of data bits exceeds デ ー タ, all the bits of the display signal are inverted from the original data, and when the number is less than ２, a converted display signal with the display data as it is is generated. Has a plurality of display data generation unit to activate each output data inversion signal at the time of inversion,
The control circuit includes a plurality of data inversion control circuits to which the converted display data and the output data inversion signal output from the respective display data generation units are input, and converts the converted display data into the original display data. The display data is output to the drive circuit in synchronization with the timing signal.

According to a fourth aspect of the present invention, there is provided a display panel, a driving circuit for supplying a display signal to the display panel,
A control circuit for inputting a display signal and a timing signal to the drive circuit, wherein a plurality of display signals, each represented by a plurality of parallel bits, are input at a predetermined cycle, and bits that change simultaneously When the number of data bits exceeds デ ー タ, all the bits of the display signal are inverted from the original data, and when the number is less than ２, a converted display signal with the display data as it is is generated. Has a plurality of first display data generation units that activate the output data inversion signal at the time of inversion,
The control circuit receives the converted display data and the output data inversion signal output from the plurality of first display data generation units, and converts the converted display data into the original display data. A data inversion control circuit, and when the number of simultaneously changing bits of the display data represented by a plurality of parallel bits output to the drive circuit in synchronization with the input timing signal exceeds half thereof, A second display data generation unit that inverts data of all bits and generates a converted display signal in which display data remains unchanged when the data is 1/2 or less, and activates an output data inversion signal when the data is inverted; And outputs display data to the drive circuit in synchronization with the input timing signal. Characterized in that it is intended to include a second data inversion control circuit for converting the display data converted based on the display data and the output data inversion signal forces the original display data.

According to a fifth aspect of the present invention, there is provided a display panel, a driving circuit for supplying a display signal to the display panel,
A control circuit that outputs a display signal and a timing signal to the drive circuit, wherein even display signals represented by parallel bits that are simultaneously input to different display areas of the display panel are displayed. When the correlation between a pair of display signals that are input and simultaneously input exceeds a predetermined value, all the data of one of the display signals are inverted, and when they do not match, a converted display signal that retains the display signal is generated. A display data generation unit that activates an output data inversion signal when inverting data; the control circuit receives the converted display data and the output data inversion signal output from the display data generation unit, Includes a data inversion control circuit that converts display data to the original display data, and displays in synchronization with the input timing signal And outputs the over data to the drive circuit.

[0011] The invention of claim 6 of the present invention relates to claims 1 to 5
3. The display device according to claim 1, wherein the display panel is a liquid crystal display panel.

According to a seventh aspect of the present invention, there is provided a display panel, a driving circuit for supplying a display signal to the display panel,
A control circuit that outputs a display signal and a timing signal to the drive circuit, wherein a display signal represented by a plurality of parallel bits is input at a predetermined cycle and the bits that change simultaneously are the same. When the number of data bits exceeds 1/2, the data of all bits of the display signal is inverted, and when the number of data bits is 1/2 or less, a converted display signal with the display data as it is is generated. While the inversion signal is activated, the converted display data and the output data inversion signal are input to the control circuit, the converted display data is converted into the original display data, and the display data is synchronized with the input timing signal. The signal is output to the driving circuit.

According to an eighth aspect of the present invention, there is provided a display panel, a driving circuit for supplying a display signal to the display panel,
A control circuit that outputs a display signal and a timing signal to the drive circuit, wherein the control method is represented by parallel bits that are simultaneously input to different display areas of the display panel. When two display signals are input and the correlation of the simultaneously input display signals exceeds a predetermined value, all the data of one of the display signals are inverted, and when they do not match, a converted display signal is generated without changing the display signal. When the data is inverted, the output data inversion signal is activated, and the converted display data and the output data inversion signal are input to the control circuit, and the converted display data is converted into the original display data. The display data is output to the drive circuit in synchronization with a timing signal.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a display device and a control method thereof according to the present invention will be described based on specific embodiments. (Embodiment 1) FIG. 1 is a block diagram showing a display device according to Embodiment 1 of the present invention. In FIG. 1, a liquid crystal panel 1 is a liquid crystal panel composed of an STN or a TFT, and a scanning drive circuit 2 is connected to a scanning line of the liquid crystal panel 1 and drives the scanning line. It shows the case where one is used. The signal drive circuit 3 is connected to a signal line of the liquid crystal panel 1 and applies a voltage corresponding to display data to the signal line. In this example, a case where four identical circuit blocks are used is shown. A drive circuit includes the scan drive circuit 2 and the signal drive circuit 3.
The display data generation unit 4 inverts or non-inverts the data according to the input display data 10 and the input clock 11 input from the outside, and converts the generated converted display data 12 and the data inversion signal 13 into a control circuit. 5 is output. The control circuit 5 receives the input clock 1
1, conversion display data 12, data inversion signal 13, enable signal 14, vertical synchronization signal 15, and horizontal synchronization signal 16, display data 17 for operating scanning drive circuit 2 and signal drive circuit 3, clock 18, driver control Signal 1
9, for generating a data inversion signal 20. The power supply circuit 6 supplies a predetermined voltage to the scanning drive circuit 2, the signal drive circuit 3, the display data generator 4, and the control circuit 5.

Next, the display data generator 4 will be described. FIG. 2 is a block diagram showing a configuration of the display data generation unit 4, and includes a data latch circuit 31, a data comparison circuit 32,
It is configured to include a data inversion control circuit 33. The data latch circuit 31 temporarily latches the input display data 10 represented by a plurality of parallel bits and delays it by one clock, and its output is supplied to a data comparison circuit 32 and a data inversion circuit 33. The data comparison circuit 32 compares the input display data 10 with the latched display data, and determines whether or not a majority of the display data has been inverted. The discrimination result is supplied to the data inversion control circuit 33 as the data inversion signal 13 and is also output to the control circuit 5. The data inversion control circuit 33 inverts the input display data based on the inversion signal or leaves it as it is, and outputs the converted display data 12 to the control circuit 5.

FIG. 2B shows a part of the input portion of the control circuit 5. The control circuit 5 includes a data inversion control circuit 34 that inverts the input converted display data 12 based on the data inversion signal 13 or converts the converted display data 12 into original display data as it is.

The operation of the liquid crystal display device configured as described above will be described with reference to the time chart of FIG. 3 and the flowchart of FIG. The input display data 10 is, for example, 6
Bit digital data is transferred in synchronization with the input clock 11, as shown in FIGS. At this time, data is transferred line by line in synchronization with the horizontal synchronization signal 16 with the vertical synchronization signal 15 as a start signal. FIG.
The enable signal 14 shown in (c) is a signal indicating the position of one line of valid display data, and the range in which the enable signal 14 is active is the valid display data.

The display data generator 4 controls the logical inversion of the input display data by an algorithm as shown in FIG. The algorithm of FIG. 4 determines the number n of bits that change simultaneously when the input display data changes every clock. When the number n exceeds 1/2 of the total number of bits N (6 in this case) constituting the display data, all the display data input at that time are logically inverted. For example, the portion indicated by hatching in FIG. 3E is obtained by logically inverting all the display data bits. At this time, the control circuit 5 is activated by activating a data inversion signal indicating that the data has been inverted as shown in FIG.
To pass the logic inversion information to the.

The logical inversion information of the display data 12 converted as described above is given by a data inversion signal 13,
When the data inversion signal 13 is active, the control circuit 5 inverts the converted display data 12 by the data inversion control circuit 34 to correct the logic, corrects the converted display data 12 to correct logic, performs necessary processing, and sends the signal drive circuit 3 a predetermined timing. Output the display data 17. The driver control signal 19 is composed of a start pulse of the scanning drive circuit 2 synchronized with the vertical synchronization signal 15, a start pulse of the signal drive circuit 3 synchronized with the horizontal synchronization signal 16 and the enable signal 14, and a latch pulse. 17 is transferred to the signal driving circuit 3 and the scanning driving circuit 2 outputs a scanning voltage line by line, whereby an image can be displayed on the liquid crystal display panel.

By controlling in this manner, the number of simultaneously changing bits of the display data can always be suppressed to less than half of all the bits N, and the number of switching of the logic circuit which occurs when the signal changes can be reduced. It is possible to greatly reduce the unnecessary electromagnetic radiation and the increase in power consumption.

In this embodiment, the control circuit 5 returns the display data to the original data based on the data inversion signal. However, when the display data is transferred from the control circuit 5 to the signal driving circuit 3, Also, the same logical inversion control may be performed. In this case, the same display data generator as that shown in FIG. 2A is provided at the output part of the control circuit 5, and the data inversion control circuit shown in FIG. 2B is provided at the input part of the signal drive circuit 3. When the display data 17 is logically inverted, the data inversion signal 2
By making 0 active, logical inversion information is given to the signal drive circuit 3. In this way, the control circuit 5 can perform logical inversion control on the display data output to the signal drive circuit 3 as necessary.

In this embodiment, the control circuit 5 sets the display data in a normal state based on the data inversion signal. 3 may be sent. In this case, it is assumed that a data inversion control circuit shown in FIG. 2B is provided inside the signal drive circuit 3 to convert the signal into an original signal and drive each signal line.

Second Embodiment Next, a display device according to a second embodiment of the present invention will be described with reference to FIG. In the second embodiment, the input display data is divided into two display portions, and the input display data 10A and 10B for each block are output data generation units 4A and 4B, respectively.
Is input to The display data generators 4A and 4B are shown in FIG.
This is the same configuration as that of (a).
A, 12B and their data inverted signals 13A, 13B. Other components are the same as those in the first embodiment shown in FIG. In this embodiment, since a data inversion signal corresponding to each of the two divided input display data is provided, the logical inversion control can be independently performed for each display data of each block.
Even when there is no correlation between the data of the two blocks, the optimal logic inversion control can be performed for each display data, so that the effect of the measures against unnecessary electromagnetic radiation can be further enhanced. Also in this case, the control circuit 5A and the signal drive circuit 3
May be applied between them.

Third Embodiment Next, a third embodiment of the present invention will be described. FIG. 6 is a block diagram showing a configuration of the display device according to the third embodiment. In this figure, it is assumed that input display data 10A and 10B composed of a plurality of bits are simultaneously input to two divided areas of the liquid crystal panel 1 and applied to the display data generation unit 21. The display data generation unit 21 determines whether or not these two input signals match, and when they match, one of the display data,
Here, the logic of all the bits of the input display data 10B is inverted. A signal indicating whether or not the data has been inverted is applied to the control circuit 22 as a data inverted signal 13C. The control circuit 22 inverts or non-inverts the converted display data 12C based on this signal and returns the original display data 1C.
Convert to 0B. Other configurations are the same as those of the above-described embodiment.

FIG. 7 is a block diagram showing the configuration of the display data generation unit. In the figure, the display data generation unit 21
Is composed of a data comparison circuit 35 and a data inversion circuit 36. And two input data 10A, 10B
Is applied to the data comparison circuit 35. The data comparison circuit compares each data to determine whether or not they match each other, and if they match, outputs a data inversion signal 13C that goes high when the data inversion circuit 36 and the control circuit 22
Output to The data inverting circuit 36 inverts only the input display data 10B based on this data to generate converted display data 12C.

FIG. 8 is a flowchart showing this operation. As shown in FIG. 8, two divided input display data are compared for each clock, and if the display data is the same, one display data is logically inverted. The data inversion signal on the display data side after the logic inversion is activated, and the logic inversion information is passed to the control circuit 22. When there is a correlation between the data divided into the two blocks as described above, the unnecessary electromagnetic field from each block is electromagnetically canceled by dephasing the data of one block, thereby reducing unnecessary radiation. Can be achieved.

In the third embodiment, inversion is performed when display data of two input display data that are simultaneously input coincides with each other, but when the correlation between the two input display data is high and exceeds a predetermined threshold, one of the two display data is inverted. May be reversed.

In the first to third embodiments, the logic of the input display data is corrected in accordance with the data inversion signal when the display data is input to the control circuit. A configuration may be adopted in which the logical correction processing is not performed, and the logical inversion information is output from the control circuit while being stored, and the logical correction processing is performed in the signal drive circuit. In this case, the effect of suppressing unnecessary electromagnetic radiation and an increase in power consumption due to switching of the logic circuit generated inside the control circuit can be expected.

In the second embodiment, the number of divisions of the input data is two. However, the number of divisions is not limited to two as long as the number of divisions is plural. In the third embodiment, the number of divisions of the input data is two. However, the number of divisions is not limited to two as long as it is an even number. Further, two cases, one in which the data inversion control method is controlled by the number of bits and the other in which one is inverted when the same data is used, are shown. It goes without saying that the control method may be switched according to the method.

Although these embodiments show the case of a liquid crystal display device, any display device other than liquid crystal, for example, a plasma panel, an EL panel, or a flat panel having independent pixels of a similar configuration can be applied. Needless to say.

[0031]

As described above, according to the display device and the driving method of the present invention, the logical inversion of the display data can be reduced by performing the logical inversion control on the input display data. It is possible to greatly suppress unnecessary electromagnetic radiation and an increase in power consumption due to switching of the digital logic circuit, and to realize a display device with low unnecessary electromagnetic radiation and low power consumption.

In particular, according to the first and second aspects of the present invention, for input digital data composed of a plurality of bits, when the data changes, the number of changed bits is ２ of the number of bits constituting the data. Is exceeded, the data is logically inverted, and control is performed so that an inversion control signal is input to the data inversion control terminal, so that the number of simultaneous switching of digital signals can always be reduced to 以下 or less. Therefore, it is possible to reduce the switching noise and the power consumption due to the reduced switching.

According to the third and fourth aspects of the present invention, even when data having no correlation with each other is input to each of a plurality of blocks, data inversion can be controlled independently. Even when the data is divided into two parts, the effects of reducing unnecessary electromagnetic radiation and reducing power consumption can be further enhanced.

According to the fifth aspect of the present invention, when each of the data divided into a plurality of blocks has a correlation, the data of one of the blocks is inverted in phase so that unnecessary electromagnetic waves from each block are electromagnetically generated. This cancels out the field and reduces unnecessary radiation.

According to the invention of claim 6 of the present invention, the display panel is made of liquid crystal, and it is particularly effective in a liquid crystal display device that handles multi-bit digital data.

Also, since there is an effect that the unnecessary electromagnetic radiation and the power consumption of the display data transmitting section of the electronic device using the display device can be suppressed at the same time, an electronic device with a display device with low unnecessary radiation and low power consumption is provided. It is possible to do.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a display device according to an embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of a part of a display data generation unit and a control circuit according to the first embodiment;

FIG. 3 is a time chart showing input / output signals of a display data generation unit according to the first embodiment;

FIG. 4 is a flowchart showing an algorithm showing a display device control method according to the first embodiment;

FIG. 5 is a block diagram showing a configuration of a display device according to a second embodiment of the present invention.

FIG. 6 is a block diagram showing a configuration of a display device according to a third embodiment of the present invention.

FIG. 7 is a block diagram illustrating a configuration of a display data generation unit according to the present embodiment.

FIG. 8 is a flowchart of an algorithm showing a display device control method according to the third embodiment.

FIG. 9 is a block diagram illustrating a configuration of a conventional liquid crystal display device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Liquid crystal panel 2 Scan drive circuit 3 Signal drive circuit 4, 4A, 4B, 21 Display data generation part 5, 5A, 22 Control circuit 6 Power supply circuit 10, 10A, 10B Input display data 12, 12A, 12B, 12C Conversion display data 13, 13A, 13B, 13C Data inversion signal 11 Input clock 14 Enable signal 15 Vertical synchronization signal 16 Horizontal synchronization signal 19 Driver control signal 20 Data inversion signal

Claims (8)

[Claims] 1. A display device comprising: a display panel; a driving circuit that supplies a display signal to the display panel; and a control circuit that outputs a display signal and a timing signal to the driving circuit. When the display signal to be displayed is input at a predetermined cycle and the number of simultaneously changing bits exceeds 1/2 of the number of the plurality of data bits, the data of all the bits of the display signal is inverted from the original data, and At the same time as generating a converted display signal with the display data as it is,
A display data generation unit that activates an output data inversion signal when the data is inverted; the control circuit receives the converted display data and the output data inversion signal output from the display data generation unit, and displays the converted display A display device comprising a data inversion control circuit for converting data into original display data, and outputting display data to the driving circuit in synchronization with an input timing signal. 2. A display device comprising: a display panel; a drive circuit for supplying a display signal to the display panel; and a control circuit for inputting a display signal and a timing signal to the drive circuit. When the display signal to be displayed is input at a predetermined cycle and the number of simultaneously changing bits exceeds 1/2 of the number of the plurality of data bits, the data of all the bits of the display signal is inverted from the original data, and At the same time as generating a converted display signal with the display data as it is,
A first display data generation unit that activates an output data inversion signal when inverting data; the control circuit includes a display data after conversion and an output data inversion signal output from the first display data generation unit; And a first data inversion control circuit for converting the converted display data into the original display data; and display data represented by a plurality of parallel bits output to the drive circuit in synchronization with the input timing signal. When the number of simultaneously changing bits exceeds 1/2, the data of all bits of the display signal is inverted, and when it is 1/2 or less, a converted display signal with the display data as it is is generated. And a second display data generation unit that activates an output data inversion signal when the display data is inverted, and the display data is synchronized with an input timing signal. A second data inversion control for converting the converted display data into the original display data based on the display data output from the control circuit and the output data inversion signal. A display device including a circuit. 3. A display device comprising: a display panel; a drive circuit for supplying a display signal to the display panel; and a control circuit for outputting a display signal and a timing signal to the drive circuit. When a plurality of display signals represented by are input at a predetermined period, and simultaneously changing bits exceed の of the respective plurality of data bit numbers, the data of all the bits of the display signal are inverted from the original data, A display data generation unit that generates a converted display signal with the display data as it is when it is 以下 or less, and activates each output data inversion signal when inverting the data; The converted display data and the output data inverted signal output from each of the display data generators are input, and the converted display data is converted to the original display data. It includes a plurality of data inversion control circuit for converting the data, a display device and outputs to the drive circuit of the display data in synchronism with the input timing signal. 4. A display device comprising: a display panel; a drive circuit for supplying a display signal to the display panel; and a control circuit for inputting a display signal and a timing signal to the drive circuit. When a plurality of display signals represented by are input at a predetermined period, and simultaneously changing bits exceed の of the respective plurality of data bit numbers, the data of all the bits of the display signal are inverted from the original data, A plurality of first display data generators for generating a converted display signal with the display data as it is when the ratio is 1/2 or less and activating an output data inversion signal when inverting the data; Receiving the converted display data and the output data inverted signal output from the plurality of first display data generators, A plurality of data inversion control circuits for converting the data into original display data, and the number of simultaneously changing bits of display data represented by a plurality of parallel bits output to the drive circuit in synchronization with the input timing signal Inverts the data of all bits of the display signal when が exceeds １ ／, and generates a converted display signal with the display data as it is when 以下 or less. And a second display data generation unit for activating the display circuit to output display data to the drive circuit in synchronization with an input timing signal. The drive circuit outputs a display signal from the control circuit. A second data inversion control circuit for converting the converted display data into the original display data based on the data and the output data inversion signal. The display device according to symptoms. 5. A display device comprising: a display panel; a drive circuit for supplying a display signal to the display panel; and a control circuit for outputting a display signal and a timing signal to the drive circuit. Even display signals represented by parallel bits input simultaneously to different display areas are input, and when the correlation between a pair of display signals input simultaneously exceeds a predetermined value, all the display signals of one of the display signals are output. A display data generation unit that inverts the data and generates a converted display signal in which the display signal remains unchanged when the data does not match, and activates an output data inversion signal when inverting the data; The converted display data and the output data inverted signal output from the data generator are input, and the converted display data is converted to the original display data. Display device comprising includes data inversion control circuit for converting, in synchronization with the inputted timing signal and outputs the display data to the drive circuit thing. 6. The display device according to claim 1, wherein the display panel is a liquid crystal display panel. 7. A control method for a display device, comprising: a display panel; a driving circuit that supplies a display signal to the display panel; and a control circuit that outputs a display signal and a timing signal to the driving circuit. When a display signal represented by a plurality of parallel bits is input at a predetermined cycle, and when simultaneously changing bits exceed の of the number of the plurality of data bits, the data of all bits of the display signal is inverted, and １ ／ or less. When the data is inverted, a converted display signal is generated, the output data inverted signal is activated when the data is inverted, and the converted display data and the output data inverted signal are input to the control circuit, and the converted display is displayed. Converting the data to the original display data and outputting the display data to the drive circuit in synchronization with the input timing signal. Control method of a display device according to symptoms. 8. A control method for a display device, comprising: a display panel; a driving circuit that supplies a display signal to the display panel; and a control circuit that outputs a display signal and a timing signal to the driving circuit. Two display signals represented by parallel bits that are simultaneously input to different display areas of the display panel are input, and when the correlation between the simultaneously input display signals exceeds a predetermined value, one of the display signals is displayed. Invert all data,
When the data does not match, a converted display signal is generated with the display signal as it is, and when the data is inverted, the output data inverted signal is activated, and the converted display data and the output data inverted signal are input to the control circuit. Converting the display data into the original display data and outputting the display data to the drive circuit in synchronization with the input timing signal.