JP2001326505A - Microstrip line, high frequency substrate and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress the dispersion of a characteristic impedance and also to easily correspond to the high density of normal wiring patterns. SOLUTION: First, a single layer printed circuit board having a core substrate 6a, an upper conductor 4 and a lower conductor 5 and a single layer printed circuit board having a core substrate 6b, an upper conductor 8 and a lower conductor 9 are stuck together putting a prepreg 7 between them, and an elimination area 4c of width CW is formed on the upper conductor 4 of the substrate 6a. A buildup method is applied to the integrally united substrates, buildup layers 3a and 3b are first laminated, a conductor strip 1 having width W smaller than the width CW of the area 4c is arranged at the position on the layer 3a, facing the area 4c, and the normal wiring patterns 2 are arranged as necessary in an area other than the position facing the area 4c. By doing this, dielectric is defined as prescribed thickness obtained by combining the layer 3a and the substrate 6a to suppress the influence of wiring accuracy allowance that occurs at the time of manufacturing the dielectric.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microstrip line and a high-frequency substrate suitable for use in, for example, a transmitting / receiving section of a communication device, and a method of manufacturing the same.

[0002]

2. Description of the Related Art The characteristic impedance of a microstrip line composed of a conductor strip disposed on one side of a flat dielectric and a ground conductor disposed on the other side is determined by the width and thickness of the conductor strip. , The thickness of the dielectric,
Each element is selected and designed so as to have a characteristic impedance as required according to the dielectric constant.

In recent years, as electronic devices have become smaller and lighter, circuits themselves have been integrated, and a multilayer printed wiring board has been increasingly used on the board side on which circuit components are mounted. This multilayer printed wiring board
Single-layer printed wiring boards are bonded together via a prepreg. In addition, it is also possible to form a multilayer printed circuit board by sequentially stacking a conductor layer and an insulating layer by plating, printing, or the like. This method is called a build-up method.

[0004]

However, in the prior art, there is a problem in that the characteristic impedance greatly varies due to structural restrictions and accuracy in arranging the conductor strips, and desired characteristics cannot be obtained.
In recent years, communication devices have also been reduced in size and weight, and there has been an increasing demand for a transmission / reception unit having a microstrip line to respond to high density without deteriorating characteristics.

The present invention has been made in view of such a problem, and an object of the present invention is to provide a microstrip line which can suppress variations in characteristic impedance and which is advantageous for reduction in size and weight. An object of the present invention is to provide a high-frequency substrate and a method of manufacturing the high-frequency substrate.

[0006]

Means for Solving the Problems The present invention has the following constitution in order to solve the above-mentioned problems. The gist of the invention according to claim 1 is a microstrip line comprising a conductor strip provided on one surface with a plate-shaped dielectric interposed therebetween and a ground conductor provided on the other surface. Wherein the conductor is arranged in a region other than the region facing the conductor strip. The gist of the invention according to claim 2 is a high-frequency substrate having a microstrip line, wherein a flat plate-shaped first dielectric serving as a base and a predetermined region having a width CW in an upper layer of the first dielectric are provided. A first general wiring conductor, a second dielectric disposed above the first general wiring conductor, and a second general wiring disposed above the second dielectric. A wiring conductor, a conductor strip having a width W smaller than a width CW disposed at a position facing the predetermined region in the upper layer of the second dielectric, and a ground conductor disposed in a lower layer of the first dielectric And the conductor strip,
A microstrip line is constituted by the first dielectric, the second dielectric, and the ground conductor. The gist of the invention according to claim 3 is that the first dielectric, the first general wiring conductor, and the ground conductor are formed by one single-layer printed wiring board. The high frequency substrate according to claim 2 is provided. The gist of the invention described in claim 4 is that, in the lower layer of the grounding conductor, a plate-like member having a predetermined thickness for securing the strength of the entire device is provided. The high-frequency board described above exists. The gist of the invention according to claim 5 resides in the high-frequency board according to claim 4, wherein the plate-shaped member is a second single-layer printed wiring board. The gist of the invention according to claim 6 is that a prepreg as an adhesive layer is disposed between the first single-layer printed wiring board and the second single-layer printed wiring board. A high-frequency substrate according to claim 5. The gist of the invention according to claim 7 is a method for manufacturing a high-frequency substrate having a microstrip line, wherein a step of arranging a plate-shaped first dielectric serving as a base and an upper layer of the first dielectric are provided. Arranging a first general wiring conductor in a region other than a predetermined region having a width CW, arranging a second dielectric on an upper layer of the first general wiring conductor, Arranging a second general wiring conductor in an upper layer, and arranging a conductor strip having a width W smaller than the width CW of the predetermined region at a position facing the predetermined region in the upper layer of the second dielectric; And a step of arranging a ground conductor below the first dielectric. The gist of the invention according to claim 8 is that the step of arranging the second general wiring conductor and the step of arranging the conductor strip are performed simultaneously in one step. Lies in the manufacturing method. The gist of the invention according to claim 9 is that the step of arranging the first dielectric, the step of arranging the first general wiring conductor, and the step of arranging the grounding conductor are performed in separate steps in advance. The method according to claim 7 or 8, wherein the method is performed. The gist of the invention described in claim 10 is:
The method according to claim 7, further comprising a step of arranging a plate-like member having a predetermined thickness under the ground conductor to secure the strength of the entire device. . The gist of the invention according to claim 11 resides in a method of manufacturing a high-frequency board according to claim 10, further comprising a step of arranging an adhesive layer between the ground conductor and the plate-shaped member.

[0007]

Embodiments of the present invention will be described below in detail with reference to the drawings.

(First Embodiment) FIG. 1 is a sectional view showing a structure of a first embodiment of the present invention. As shown in FIG. 1, the high-frequency substrate according to the first embodiment has a core layer centered on two flat core substrates 6a and 6b. The upper conductor 4 and the lower conductor 5 are provided on one core substrate 6a.
Are formed, and an upper conductor 8 and a lower conductor 9 are formed on the other core substrate 6b. The other core substrate 6b is provided for forming a wiring pattern while ensuring the strength of the entire high-frequency substrate, and has a predetermined thickness as required. For example, a single-layer printed wiring board is used for each of the core substrate 6a, the upper conductor 4, and the lower conductor 5, and the core substrate 6b, the upper conductor 8, and the lower conductor 9. Core substrate 6a and core substrate 6b
A prepreg 7 serving as an adhesive layer is disposed between the upper conductor 4 and the upper conductor 4 of the core substrate 6a.
A deletion region 4c having W is formed.

The core substrate 6 of the core layer thus configured
The build-up layer 3a is arranged on the upper layer 4 of the upper conductor 4a. Also, a deletion area 4 above the build-up layer 3a.
The conductor strip 1 having a width W smaller than the width CW of the deletion area 4c is arranged at a position facing the deletion area 4c.
The normal wiring pattern 2 is arranged as needed in a region other than the position opposing the. Also, the core substrate 6b of the core layer
The build-up layer 3b is arranged below the lower conductor 9 of
A conductor layer is provided below the build-up layer 3b.
A normal wiring pattern is formed on the upper conductor 4 of the core substrate 6a and the upper conductor 8 and the lower conductor 9 of the core substrate 6b as necessary.

The lower conductor 5 of the core substrate 6a of the core layer is grounded and used as a ground conductor. Accordingly, a microstrip line is constituted by the conductor strip 1, the build-up layer 3a, the core substrate 6a, and the lower conductor 5 of the core substrate 6a. In other words, since the upper conductor 4 of the core substrate 6a on the lower surface side of the conductor strip 1 is provided with the deletion region 4c having a width CW wider than the conductor width W of the conductor strip 1, the dielectric is formed by the build-up layer 3a. It has a predetermined thickness in which it is combined with the core substrate 6a.

Next, a method of manufacturing the high-frequency substrate according to the first embodiment will be described. First, a single-layer printed wiring board formed in a separate step having a core substrate 6a, an upper conductor 4 and a lower conductor 5, and a single layer formed in a separate step having a core substrate 6b, an upper conductor 8 and a lower conductor 9 And a printed wiring board are prepared respectively. Next, the two single-layer printed wiring boards are bonded together via the prepreg 7, and a cutout area 4c having a width CW is formed in the upper conductor 4 of the core board 6a by etching. It should be noted that the deletion region 4c may be formed by etching before bonding, and then bonded.

[0012] The build-up method is performed on the core layer integrally formed as described above. First, the build-up layers 3a and 3b are laminated, and the conductor strip 1 and
Normally, the wiring pattern 2 and the conductor layer on the bottom side are simultaneously formed. Note that an epoxy resin or the like is used for the build-up layers 3a and 3b.

FIG. 2 is an explanatory diagram for explaining the characteristics of the microstrip line. In addition, FIG.
FIG. 2B shows the structure of a general microstrip line.
Shows an equation used to calculate the characteristic impedance of the microstrip line shown in FIG. 2A. As shown in FIG. 2A, the characteristic impedance Zo of a microstrip line composed of a conductor strip 11 disposed on one surface and a ground conductor disposed on the other surface with a plate-shaped dielectric 12 interposed therebetween And the thickness t of the dielectric 12, and the relative permittivity Er thereof. Conversely, if the characteristic impedance is constant, the width W of the conductor strip 11 is
, The thickness h of the dielectric 12, and the relative permittivity Er thereof.
Defined by

Therefore, in the above-described first embodiment, the removal region 4 having a width CW larger than the conductor width W of the conductor strip 1 is provided at a predetermined position of the upper conductor 4 of the core substrate 6a.
c is provided, the dielectric is
And the core substrate 6a are combined to have a predetermined thickness, and the width W of the conductor strip 1 can be increased. As a result, it is possible to reduce the influence of the tolerance of the wiring accuracy generated at the time of manufacturing, and to obtain a stable impedance characteristic.

Further, the first embodiment will be specifically described. The thickness of the single-layer printed wiring board having the core substrate 6b, the upper conductor 8, and the lower conductor 9 for securing the strength of the entire high-frequency substrate is 1.2 mm, and the core substrate 6a, the upper conductor 4, and the lower conductor 5 are provided. The thickness of the single-layer printed wiring board having the thickness of 0.2 mm, the thickness of the prepreg 7 is 0.1 mm, the thickness of the build-up layers 3 a and 3 b is 0.05 mm, and the total thickness of the high-frequency board is Is about 1.
It is assumed to be 6 mm. It is also assumed that the thickness of the conductor strip 1 is 0.04 mm and the relative permittivity of the core substrate 6a is 3.5.

In this case, since the portion functioning as a dielectric is a composite of the build-up layer 3a and the core substrate 6a as described above, the thickness h of the dielectric is:
(0.05 + 0.2 = 0.25 mm). Therefore,
Assuming that the characteristic impedance Zo is normalized by 50Ω, the numerical values are put into the formula shown in FIG. 2B and the calculation is performed, so that the width W of the conductor strip 1 is 0.53 mm. here,
The wiring tolerance of the width W of the conductor strip 1 is determined according to JIS standard [J
According to [IS C 5013 / 5.5.1], the tolerance is ± 0.04 mm, so that the width W of the conductor strip 1 is in the range of 0.49 mm to 0.57 mm.
When the calculation is performed again in the range of the width W and the above-described numerical values, the characteristic impedance Zo becomes 48Ω to 52Ω, and a good impedance characteristic can be obtained.

FIG. 3 is a cross-sectional view showing a structure of a high-frequency substrate by a build-up method as an example. In the case of this example, the buildup layer 33a is formed above the upper conductor 38 of the core substrate 36b, and the buildup layer 33b is formed below the lower conductor 39 of the core substrate 36b.
For this reason, the dielectric between the conductor strip 31 and the upper conductor 38 used as the ground conductor is not
When only the characteristic impedance Zo is constant, the width of the conductor strip 31 is proportional to the thickness of the build-up layer 33a. That is, since the build-up layer 33a is thin, the width of the conductor strip 31 is also small.

Here, the variation of the characteristic impedance Zo is calculated in the same manner as in the first embodiment of the present invention. The thickness of the core substrate 36b, the upper conductor 38, and the lower conductor 39 is 1.2 mm, the build-up layers 33a, 33b are 0.05 mm, and the total thickness of the high-frequency substrate is about 1.
It is assumed to be 3 mm. It is assumed that the thickness of the conductor strip 31 is 0.04 mm and the relative permittivity of the core substrate 6a is 3.5.

In this case, since only the build-up layer 33a functions as a dielectric as described above, the thickness h of the dielectric is 0.05 mm, and the characteristic impedance Zo is normalized to 50Ω. As a result, when the numerical values are put into the formula shown in FIG.
1 has a width of 0.09 mm. Here, the wiring tolerance of the width of the conductor strip 31 is determined according to the JIS standard [JIS C50].
13 / 5.5.1], the tolerance is ± 0.0
4 mm, the width of the conductor strip 31 is set to 0.
The range is from 05 mm to 0.13 mm. When the calculation is performed again using the range of the width and the above-described numerical values, the characteristic impedance Zo becomes 41Ω to 65Ω. That is, in the first embodiment, the characteristic impedance Zo is 48
Ω to 52 Ω, whereas the characteristic impedance Zo is 41 Ω to 65 Ω, and good impedance characteristics cannot be obtained.

As described above, according to the first embodiment, the following effects can be obtained. The first effect is
By increasing the thickness of the dielectric, the width of the conductor strip 1 can be increased, so that it is less likely to be affected by tolerances in wiring accuracy generated during manufacturing, and stable impedance characteristics can be obtained. The second effect is
Another object of the present invention is to easily cope with a high density wiring pattern without deteriorating the characteristics of the microstrip line.

(Second Embodiment) Next, a second embodiment of the present invention will be described. In the above description of the first embodiment, the core substrate 6a, the upper conductor 4 and the lower conductor 5, and the core substrate 6b, the upper conductor 8 and the lower conductor 9
As described above, the case where a single-layer printed wiring board is used for each is described. However, with respect to the core substrate 6b, the upper conductor 8 and the lower conductor 9, the core substrate 6a, the upper conductor 4 and the lower conductor 5 have sufficient strength. Of course, if it is not necessary to form the wiring patterns 2 and the like at a high density, it is not necessary to provide them. Further, when the core substrate 6b, the upper conductor 8 and the lower conductor 9 are provided only for reinforcing the strength, it is not necessary to use a single-layer printed wiring board. Is also good. Further, in the above description of the first embodiment, the upper conductor 4 of the core substrate 6a
Has been described, the single-sided printed wiring board having the core substrate 6a and the lower conductor 5 and the single-sided printed wiring board having the core substrate 6b and the upper conductor 8 are respectively used. May be. In this case, first, two single-sided printed wiring boards are adhered, and the upper conductor 4 and the lower conductor 9 including the deletion region 4a are formed on the integrated substrate. Other layers are stacked in the same manner as in the embodiment.

It should be noted that the present invention is not limited to the above-described embodiments, and it is obvious that the embodiments can be appropriately modified within the scope of the technical idea of the present invention. Further, the number, position, shape, and the like of the constituent members are not limited to the above-described embodiment, but can be set to numbers, positions, shapes, and the like suitable for carrying out the present invention. In each drawing, the same components are denoted by the same reference numerals.

[0023]

Since the present invention is configured as described above, the following effects can be obtained. The first effect is that the width of the conductor strip 1 can be increased by increasing the thickness of the dielectric, so that it is less likely to be affected by the tolerance of the wiring accuracy generated at the time of manufacturing, and a stable impedance characteristic can be obtained. What you can do. A second effect is that it is possible to easily cope with an increase in the density of a normal wiring pattern without deteriorating the characteristics of the microstrip line.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a structure according to a first embodiment of the present invention.

FIG. 2 is an explanatory diagram for explaining characteristics of a microstrip line.

FIG. 3 is a cross-sectional view showing a structure of a high-frequency board as an example for comparison with the first embodiment of the present invention.

[Explanation of symbols]

 1, 31: Conductor strip 2: Normal wiring pattern 3a, 3b, 33a, 33b: Build-up layer 4: Upper conductor of core substrate 6a 4c: Deletion area 5: Core substrate Lower conductor 6a 6a, 6b, 36b core substrate 7 prepreg 8 upper conductor of core substrate 6b 9 lower conductor of core substrate 6b 11 conductor strip 12 dielectric Body 38: Upper conductor of core board 36b 39: Lower conductor of core board 36b

 ──────────────────────────────────────────────────続 き Continued on the front page F-term (reference)

Claims (11)

[Claims] 1. A microstrip line comprising: a conductor strip disposed on one surface with a plate-shaped dielectric interposed therebetween; and a ground conductor disposed on the other surface, wherein: A microstrip line, wherein a conductor is arranged in a region other than a region facing the microstrip line. 2. A high-frequency substrate having a microstrip line, comprising: a plate-shaped first dielectric serving as a base; and an upper layer of the first dielectric disposed in a region other than a predetermined region having a width CW. A first general wiring conductor, a second dielectric disposed on an upper layer of the first general wiring conductor, a second general wiring conductor disposed on an upper layer of the second dielectric, A conductor strip having a width W smaller than the width CW disposed at a position facing the predetermined region in the upper layer of the second dielectric; and a ground conductor disposed in a lower layer of the first dielectric. A conductor strip, the first dielectric, and the second
A high frequency substrate, wherein a microstrip line is composed of the dielectric material and the ground conductor. 3. The printed wiring board according to claim 2, wherein the first dielectric, the first general wiring conductor, and the grounding conductor are formed of one single-layer printed wiring board. High frequency substrate. 4. The high-frequency board according to claim 2, further comprising a plate-like member having a predetermined thickness under the ground conductor to secure the strength of the entire device. 5. The high-frequency board according to claim 4, wherein said plate-shaped member is a second single-layer printed wiring board. 6. A prepreg as an adhesive layer is provided between the first single-layer printed wiring board and the second single-layer printed wiring board.
The high-frequency substrate as described. 7. A method for manufacturing a high-frequency substrate having a microstrip line, comprising the steps of: disposing a plate-shaped first dielectric serving as a base; and a predetermined layer having a width CW in an upper layer of the first dielectric. Arranging a first general wiring conductor in a region other than the region, arranging a second dielectric on an upper layer of the first general wiring conductor, and arranging a second dielectric on an upper layer of the second dielectric. Arranging a general wiring conductor; arranging a conductor strip having a width W smaller than a width CW of the predetermined region at a position facing the predetermined region in an upper layer of the second dielectric; Arranging a ground conductor below the dielectric. 8. The method according to claim 7, wherein the step of disposing the second general wiring conductor and the step of disposing the conductor strip are simultaneously performed in one step. 9. The method according to claim 1, wherein the step of arranging the first dielectric, the step of arranging the first general wiring conductor, and the step of arranging the ground conductor are performed in advance in separate steps. The method for manufacturing a high-frequency substrate according to claim 7 or 8, wherein 10. The high-frequency board according to claim 7, further comprising a step of arranging a plate-like member having a predetermined thickness under the ground conductor to secure the strength of the entire device. Manufacturing method. 11. The method according to claim 1, further comprising the step of arranging an adhesive layer between the ground conductor and the plate-shaped member.
0. The method for manufacturing a high-frequency substrate according to 0.