JP2001326429A - Printed wiring board - Google Patents

Printed wiring board

Info

Publication number
JP2001326429A
JP2001326429A JP2000144296A JP2000144296A JP2001326429A JP 2001326429 A JP2001326429 A JP 2001326429A JP 2000144296 A JP2000144296 A JP 2000144296A JP 2000144296 A JP2000144296 A JP 2000144296A JP 2001326429 A JP2001326429 A JP 2001326429A
Authority
JP
Japan
Prior art keywords
printed wiring
wiring board
pattern
board
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000144296A
Other languages
Japanese (ja)
Inventor
Hiroko Suzuki
裕子 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP2000144296A priority Critical patent/JP2001326429A/en
Publication of JP2001326429A publication Critical patent/JP2001326429A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To provide a printed wiring board that has a configuration for preventing deformation such as warpage and twisting from being generated, and allows a dummy pattern to be designed easily. SOLUTION: A printed wiring board 30 is composed of a circuit body region 32 where a wiring pattern made of copper foil is formed, and a so-called disposal board region 34 that is disposed as non-production region without forming any wiring patterns. Also in the disposal board region, as a dummy pattern, at least one portion of the same wiring pattern as the wiring pattern that is formed in the circuit body region is formed. The dummy pattern of the disposal board region is formed by etching the copper foil by the same process as the wiring pattern in the circuit body region, or the like. The ratio of remaining copper becomes nearly the same between the disposal board and circuit body regions, thus allowing the substrate to indicate the same behavior to change in temperature over both the regions, dispersing stress onto the entire surface of the printed wiring board, preventing the stress from being easily concentrated at a specific place on the printed wiring board, and hence preventing the deformation such as the warpage and twisting from being generated in the printed wiring board.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、配線パターンが形
成され、製品化される回路本体領域と、非製品部分とし
て配線パターンが形成されていない、いわゆる捨て板領
域とを有するプリント配線基板に関し、更に詳細には、
実装工程で反り、捩じれ等の変形が生じないような構成
を備えたプリント配線基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board having a circuit main body region in which a wiring pattern is formed and manufactured, and a so-called discarded plate region in which the wiring pattern is not formed as a non-product portion. More specifically,
The present invention relates to a printed wiring board having a configuration in which deformation such as warpage or twisting does not occur in a mounting process.

【0002】[0002]

【従来の技術】半導体装置の微細化、及び半導体装置を
利用している電気/電子機器の小型化に伴い、半導体装
置を実装して電気/電子機器に組み込むプリント配線板
の高密度実装化が要求されている。プリント配線板は、
配線パターンが形成されているプリント配線基板上に半
導体チップ、抵抗素子等の回路素子を実装することによ
り形成される。プリント配線基板上に回路素子を実装す
る実装工程では、はんだ接合、熱圧着等の接合方法によ
り回路素子を実装している。プリント配線板の高密度実
装化に伴い、回路素子が高密度で実装されるので、回路
素子接合の際に発生するプリント配線基板の単位面積当
たりの熱量も大きくなる。そして、発生した熱によっ
て、プリント配線基板に反り、捩じれ等の熱変形が生
じ、その変形が製品であるプリント配線板に残留するた
めに、プリント配線板の製品歩留りに大きな影響を与え
ている。
2. Description of the Related Art With the miniaturization of semiconductor devices and the miniaturization of electric / electronic devices utilizing semiconductor devices, high-density mounting of printed wiring boards on which semiconductor devices are mounted and incorporated in electric / electronic devices has been required. Has been requested. Printed wiring boards
It is formed by mounting circuit elements such as semiconductor chips and resistance elements on a printed wiring board on which a wiring pattern is formed. In a mounting step of mounting a circuit element on a printed wiring board, the circuit element is mounted by a bonding method such as solder bonding or thermocompression bonding. Since the circuit elements are mounted at a high density as the printed wiring board is mounted at a high density, the amount of heat per unit area of the printed wiring board generated when the circuit elements are joined increases. The generated heat causes thermal deformation such as warping and twisting of the printed wiring board, and the deformation remains on the printed wiring board as a product, which greatly affects the product yield of the printed wiring board.

【0003】ところで、プリント配線基板10は、通
常、図2に示すように、配線パターンが形成され、製品
化される回路本体領域12と、回路本体領域12の周り
にあって、配線パターンを形成することなく切り捨てら
れる領域である、いわゆる、捨て板領域14とから構成
されている。そこで、従来、反り、捩じれ等のプリント
配線基板の変形を防止する対策の一つとして、プリント
配線基板の捨て板領域にダミーパターンを形成したプリ
ント配線基板が提案されている。例えば、第1の対策と
して、従来例1のプリント配線基板16は、図3に示す
ように、回路本体領域12を除く捨て板領域14の片面
全面に銅箔を張りつけた、いわゆるベタパターン18を
形成することにより、回路本体領域12及び捨て板領域
14の基板全面にわたって基板の剛性をほぼ一様にする
ことにより、プリント配線基板の変形を防止する方法が
試みられている。
On the printed wiring board 10, as shown in FIG. 2, a wiring pattern is usually formed, and a circuit body region 12 to be commercialized and a circuit pattern around the circuit body region 12 are formed. And a so-called discard plate region 14 which is a region cut off without performing. Therefore, conventionally, as one of measures for preventing deformation of the printed wiring board such as warpage and twist, a printed wiring board in which a dummy pattern is formed in a discarded plate area of the printed wiring board has been proposed. For example, as a first countermeasure, as shown in FIG. 3, the printed wiring board 16 of the conventional example 1 has a so-called solid pattern 18 in which copper foil is adhered to one entire surface of the discard plate area 14 except for the circuit body area 12. An attempt has been made to prevent the printed wiring board from being deformed by forming the board so that the rigidity of the board is made substantially uniform over the entire surface of the circuit body area 12 and the discarded board area 14.

【0004】また、第2の対策として、従来例2のプリ
ント配線基板20は、図4に示すように、回路本体領域
12を除く捨て板領域14の片面全面に銅箔22をベタ
に張り付け、次いで縦、横にスリット状に銅箔を除去し
て基板下地を露出させた領域24を形成して、捨て板領
域14に張り付けた銅箔ベタパターン22の伸縮をスリ
ット状露出領域24で吸収することにより、基板の剛性
を基板全面にわたって更に一様にして、変形を防止する
方法が試みられている。スリット状露出領域24は、エ
ッチング等によりプリント配線基板の回路本体領域12
のパターン形成と同時に形成される。
As a second countermeasure, as shown in FIG. 4, in a printed wiring board 20 of the prior art 2, a copper foil 22 is attached to the entire surface of one side of the discard plate area 14 except for the circuit body area 12 by solid bonding. Next, the copper foil is removed vertically and horizontally in a slit shape to form a region 24 exposing the substrate base, and the expansion and contraction of the copper foil solid pattern 22 attached to the discarded plate region 14 is absorbed by the slit-shaped exposed region 24. Thus, a method of preventing the deformation by making the rigidity of the substrate more uniform over the entire surface of the substrate has been attempted. The slit-shaped exposed area 24 is formed in the circuit body area 12 of the printed wiring board by etching or the like.
Is formed simultaneously with the pattern formation.

【0005】更には、第3の対策として、捨て板領域に
銅箔でダミーパターンを形成する際、ダミーパターンが
存在する面積と、存在しない面積との比が、回路本体領
域の配線パターンの存在する面積と存在しない面積との
比と等しくなるように、ダミーパターンを配置したプリ
ント配線基板が提案されている。そして、ダミーパター
ンとして、6角形、3角形、5角形、8角形、台形など
が提案されている。
Further, as a third measure, when a dummy pattern is formed of copper foil in the discarded plate area, the ratio of the area where the dummy pattern exists to the area where the dummy pattern does not exist is determined by the existence of the wiring pattern in the circuit body area. There has been proposed a printed wiring board on which a dummy pattern is arranged so as to have a ratio equal to the area of the non-existent area. Hexagons, triangles, pentagons, octagons, trapezoids, and the like have been proposed as dummy patterns.

【0006】[0006]

【発明が解決しようとする課題】しかし、プリント配線
基板の変形防止の従来の対策には、次に説明するよう
に、それぞれ、問題があった。第1の対策では、捨て板
領域14の片面全面に銅箔をベタに張り付けてあるため
に、温度や湿度の変化によって生じるプリント配線基板
自体の自由な伸縮が妨げられ、結果として、実装工程
で、プリント配線基板が、反ったり、捩じれたりする変
形が生じていた。第2の対策では、銅箔ベタパターンに
設けたスリット領域によってプリント配線基板自体の伸
縮をある程度吸収することができるものの、スリット領
域と銅箔領域との境界に沿ってプリント配線板が折れ曲
がるという不具合が発生することがあった。更に言え
ば、直線的に形成されたスリット領域の剛性は銅箔領域
の剛性に比べて低いので、銅箔領域に作用した負荷がス
リット領域に集中して、折れ易くなっている。
However, the conventional countermeasures for preventing the deformation of the printed wiring board have respective problems as described below. In the first countermeasure, since the copper foil is solidly attached to the entire surface of one side of the discarded plate region 14, free expansion and contraction of the printed wiring board itself caused by a change in temperature and humidity is hindered. In addition, the printed wiring board is deformed such as warping or twisting. According to the second measure, although the expansion and contraction of the printed wiring board itself can be absorbed to some extent by the slit area provided in the copper foil solid pattern, the printed wiring board is bent along the boundary between the slit area and the copper foil area. May occur. Furthermore, since the rigidity of the slit region formed linearly is lower than the rigidity of the copper foil region, the load acting on the copper foil region is concentrated on the slit region, and the slit region is easily broken.

【0007】また、第3の対策では、ダミーパターンの
存在しない領域が直線的に連続して存在すると、第2の
対策と同様に、ダミーパターンの存在しない領域とダミ
ーパターン領域との境界に沿ってプリント配線板が折れ
曲がることが懸念されるので、ダミーパターンの存在し
ない部分が直線的に連続して存在しないようにダミーパ
ターンを配置しなくてはならない。また、プリント配線
板のデザインが変わる毎に回路配線部分のパターン占有
率を求め、回路本体領域と同じ残銅率になるように捨て
板領域にダミーパターンを配置しなくてはならない。従
って、プリント配線基板毎にダミーパターンを設計する
必要が生じ、しかもダミーパターンが複雑なパターンに
なるので、ダミーパターンの設計工数が嵩むという問題
があった。
In the third countermeasure, if the area where the dummy pattern does not exist is present linearly and continuously, similar to the second countermeasure, along the boundary between the area where the dummy pattern does not exist and the dummy pattern area. Therefore, there is a concern that the printed wiring board may be bent. Therefore, the dummy pattern must be arranged so that the portion where the dummy pattern does not exist does not exist linearly and continuously. Further, every time the design of the printed wiring board changes, the pattern occupancy of the circuit wiring portion must be obtained, and the dummy pattern must be arranged in the discarded board area so as to have the same residual copper rate as the circuit body area. Therefore, it is necessary to design a dummy pattern for each printed wiring board, and the dummy pattern becomes a complicated pattern, so that there is a problem that the number of steps for designing the dummy pattern increases.

【0008】そこで、本発明の目的は、反り、捩じれ等
の変形が生じないような構成を備え、しかもダミーパタ
ーンの設計が容易なプリント配線基板を提供することで
ある。
It is an object of the present invention to provide a printed wiring board having a configuration in which deformation such as warpage or twisting does not occur and in which a dummy pattern can be easily designed.

【0009】[0009]

【課題を解決するための手段】上記目的を達成するため
に、本発明に係るプリント配線基板は、配線パターンが
形成され、製品化される回路本体領域と、非製品部分と
して配線パターンが形成されていない、いわゆる、捨て
板領域とを有するプリント配線基板において、捨て板領
域にも、ダミーパターンとして、回路本体領域に形成さ
れている配線パターンと同じ配線パターンの少なくとも
一部が、同じ配線材料で形成されていることを特徴とし
ている。
In order to achieve the above object, a printed wiring board according to the present invention has a wiring pattern formed therein, a circuit body region to be commercialized, and a wiring pattern formed as a non-product portion. In a printed wiring board having a so-called discarded plate area, at least a part of the same wiring pattern as the dummy pattern is also formed as a dummy pattern in the discarded plate area using the same wiring material. It is characterized by being formed.

【0010】本発明で、「回路本体領域に形成されてい
る配線パターンと同じ配線パターンの少なくとも一部」
をダミーパターンとして捨て板領域に形成するとしてい
るのは、捨て板領域が回路本体領域より小さい場合に
は、配線パターンの一部であり、また捨て板領域が回路
本体領域と同じ位の面積のときには、配線パターンのほ
ぼ全部であり、捨て板領域が回路本体領域より広いとき
には、配線パターンを繰り返すことを意味している。配
線パターンの材料とダミーパターンの材料とが同じであ
る限り、配線パターン及びダミーパターンの材料には、
制約はないが、実用的には、配線パターン及びダミーパ
ターンの材料は銅箔である。また、回路本体領域の配線
パターンのパターン形状、配線パターンの配線幅等には
制約はない。
In the present invention, "at least a part of the same wiring pattern as the wiring pattern formed in the circuit body region"
Is formed as a dummy pattern in the discarded board area because, when the discarded board area is smaller than the circuit main body area, it is a part of the wiring pattern, and the discarded board area has the same area as the circuit main body area. Sometimes, the wiring pattern is almost all, and when the discard plate area is wider than the circuit body area, it means that the wiring pattern is repeated. As long as the material of the wiring pattern and the material of the dummy pattern are the same, the material of the wiring pattern and the dummy pattern includes:
Although there is no limitation, practically, the material of the wiring pattern and the dummy pattern is a copper foil. Further, there is no limitation on the pattern shape of the wiring pattern in the circuit body region, the wiring width of the wiring pattern, and the like.

【0011】本発明では、捨て板領域にダミーパターン
として回路本体領域の配線パターンの少なくとも一部を
形成することによって、必然的に、残銅率が捨て板領域
と回路本体領域との間でほぼ等しくなる。その結果、プ
リント配線基板の実装工程で、プリント配線基板の温度
分布が基板全面にわたり、即ち捨て板領域及び回路本体
領域で均一一様になるので、基板が捨て板領域と回路本
体領域との双方の領域で、温度変化に対して同じ挙動を
示す。尚、残銅率とは、金属箔、例えば銅箔からなる配
線パターンが存在する面積と、銅箔がエッチングされ、
銅箔が存在していない面積との比率を言う。よって、実
装工程で作用する熱応力がプリント配線基板全面に分散
されて、プリント配線基板の特定の個所に集中しないの
で、プリント配線基板に反り、捩じれ等の変形が生じ難
い。
In the present invention, by forming at least a part of the wiring pattern in the circuit body region as a dummy pattern in the discard plate region, the residual copper ratio is inevitably substantially between the discard plate region and the circuit body region. Become equal. As a result, in the printed wiring board mounting process, the temperature distribution of the printed wiring board becomes uniform over the entire surface of the board, that is, in the discarded board area and the circuit main body area. Both regions show the same behavior with respect to temperature change. Incidentally, the residual copper ratio is an area where a metal foil, for example, a wiring pattern made of copper foil exists, and the copper foil is etched,
It refers to the ratio to the area where no copper foil is present. Therefore, the thermal stress acting in the mounting process is dispersed over the entire surface of the printed wiring board and does not concentrate on a specific portion of the printed wiring board, so that the printed wiring board is unlikely to be warped or twisted.

【0012】また、ダミーパターンとして回路本体領域
の配線パターンの少なくとも一部を形成するので、ダミ
ーパターンを新たに設計する必要がないので、プリント
配線基板の設計工数を全体的に節減することができる。
Further, since at least a part of the wiring pattern in the circuit body region is formed as a dummy pattern, it is not necessary to newly design a dummy pattern, so that the man-hour for designing the printed wiring board can be reduced as a whole. .

【0013】[0013]

【発明の実施の形態】以下に、添付図面を参照し、実施
形態例を挙げて本発明の実施の形態を具体的かつ詳細に
説明する。 実施形態例 本実施形態例は、本発明に係るプリント配線基板の実施
形態の一例であって、図1は本実施形態例のプリント配
線基板の構成を示す平面図である。本実施形態例のプリ
ント配線基板30は、図1に示すように、銅箔からなる
配線パターンが形成され、製品化される回路本体領域3
2と、回路本体領域32の周りにあって、配線パターン
を形成することなく非製品領域として切り捨てられる、
いわゆる捨て板領域34とから構成されている。
Embodiments of the present invention will be described below in detail with reference to the accompanying drawings. Embodiment This embodiment is an example of an embodiment of a printed wiring board according to the present invention, and FIG. 1 is a plan view showing a configuration of the printed wiring board of this embodiment. As shown in FIG. 1, the printed wiring board 30 of this embodiment has a circuit body region 3 in which a wiring pattern made of copper foil is formed,
2, around the circuit body region 32, which is cut off as a non-product region without forming a wiring pattern;
And a so-called discard plate area 34.

【0014】本実施形態例では、捨て板領域34にも、
ダミーパターンとして、回路本体領域32に形成されて
いる配線パターンと同じ配線パターンの少なくとも一部
が、同じ配線材料、つまり同じ厚さで同じ純度の銅箔で
形成されている。捨て板領域34のダミーパターンは、
回路本体領域32の配線パターンの形成工程と同じ工程
で銅箔をエッチングする等により形成される。
In this embodiment, the discard plate area 34 is also
As the dummy pattern, at least a part of the same wiring pattern as the wiring pattern formed in the circuit body region 32 is formed of the same wiring material, that is, a copper foil of the same thickness and the same purity. The dummy pattern of the discard plate area 34 is
It is formed by etching a copper foil in the same step as the step of forming the wiring pattern in the circuit body region 32.

【0015】本実施形態例では、捨て板領域34に、ダ
ミーパターンとして、回路本体領域32の配線パターン
の少なくとも一部を形成することによって、必然的に、
残銅率が、捨て板領域34と回路本体領域32との間で
ほぼ等しくなる。その結果、プリント配線基板30の実
装工程で、プリント配線基板の温度分布が基板全面にわ
たり、即ち捨て板領域34及び回路本体領域32で均一
一様になるので、プリント配線基板30は捨て板領域3
4と回路本体領域32との双方の領域で温度変化に対し
て同じ挙動を示す。よって、実装の際に生じた熱応力が
プリント配線基板全面に分散されて、プリント配線基板
の特定の個所に集中しないので、プリント配線基板に反
り、捩じれ等の変形が生じ難くなる。
In the present embodiment, by forming at least a part of the wiring pattern of the circuit body region 32 as a dummy pattern in the discarded plate region 34,
The residual copper ratio becomes substantially equal between the discarded plate region 34 and the circuit body region 32. As a result, in the mounting process of the printed wiring board 30, the temperature distribution of the printed wiring board becomes uniform over the entire surface of the board, that is, in the discarded board area 34 and the circuit body area 32. 3
4 and the circuit body region 32 show the same behavior with respect to a temperature change. Therefore, the thermal stress generated at the time of mounting is dispersed over the entire surface of the printed wiring board and does not concentrate on a specific portion of the printed wiring board, so that the printed wiring board is unlikely to be warped or twisted.

【0016】[0016]

【発明の効果】本発明によれば、捨て板領域にダミーパ
ターンとして回路本体領域の配線パターンの少なくとも
一部を形成することによって、必然的に、残銅率が、捨
て板領域と回路本体領域との間でほぼ等しくなる。その
結果、プリント配線基板の実装工程で、プリント配線基
板の温度分布が基板全面にわたり、即ち捨て板領域及び
回路本体領域で均一一様になるので、プリント配線基板
が捨て板領域と回路本体領域との双方の領域で温度変化
に対して同じ挙動を示す。よって、実装の際の熱応力が
プリント配線基板全面に分散されて、プリント配線基板
の特定の個所に集中しないので、プリント配線基板に反
り、捩じれ等の変形が生じ難くなる。また、ダミーパタ
ーンとして回路本体領域の配線パターンの少なくとも一
部を形成するので、ダミーパターンを新たに設計する必
要がない。よって、プリント配線基板の全体的な設計工
数を節減することができる。
According to the present invention, by forming at least a part of the wiring pattern of the circuit body region as a dummy pattern in the waste plate region, the residual copper ratio is inevitably reduced. And becomes almost equal. As a result, in the mounting process of the printed wiring board, the temperature distribution of the printed wiring board becomes uniform over the entire surface of the board, that is, in the discarded board area and the circuit main body area. Shows the same behavior with respect to temperature change in both regions. Therefore, the thermal stress at the time of mounting is dispersed over the entire surface of the printed wiring board and is not concentrated on a specific portion of the printed wiring board, so that the printed wiring board is unlikely to be warped or twisted. Further, since at least a part of the wiring pattern in the circuit body region is formed as a dummy pattern, it is not necessary to newly design a dummy pattern. Therefore, the overall design man-hour of the printed wiring board can be reduced.

【図面の簡単な説明】[Brief description of the drawings]

【図1】実施形態例のプリント配線基板の構成を示す平
面図である。
FIG. 1 is a plan view illustrating a configuration of a printed wiring board according to an embodiment.

【図2】プリント配線基板の構成を示す平面図である。FIG. 2 is a plan view illustrating a configuration of a printed wiring board.

【図3】従来例1のプリント配線基板の構成を示す平面
図である。
FIG. 3 is a plan view showing a configuration of a printed wiring board of Conventional Example 1.

【図4】従来例2のプリント配線基板の構成を示す平面
図である。
FIG. 4 is a plan view showing a configuration of a printed wiring board of Conventional Example 2.

【符号の説明】[Explanation of symbols]

10……プリント配線基板、12……回路本体領域、1
4……捨て板領域、16……従来例1のプリント配線基
板、18……ベタパターン、20……従来例2のプリン
ト配線基板、22……銅箔ベタパターン、24……スリ
ット状露出領域、30……実施形態例のプリント配線基
板、32……回路本体領域、34……捨て板領域。
10 ... printed wiring board, 12 ... circuit body area, 1
4 ... discarded plate area, 16 ... printed wiring board of Conventional Example 1, 18 ... solid pattern, 20 ... printed wiring board of Conventional Example 2, 22 ... solid copper foil pattern, 24 ... slit-shaped exposed area , 30... The printed wiring board of the embodiment, 32... The circuit body area, 34.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 配線パターンが形成され、製品化される
回路本体領域と、非製品部分として配線パターンが形成
されていない、いわゆる、捨て板領域とを有するプリン
ト配線基板において、 捨て板領域にも、ダミーパターンとして、回路本体領域
に形成されている配線パターンと同じ配線パターンの少
なくとも一部が、同じ配線材料で形成されていることを
特徴とするプリント配線基板。
1. A printed circuit board having a circuit main body region on which a wiring pattern is formed and commercialized and a so-called discarded plate region where no wiring pattern is formed as a non-product portion, wherein the discarded plate region is also provided. A printed wiring board, wherein at least a part of the same wiring pattern as the dummy pattern in the circuit body region is formed of the same wiring material.
【請求項2】 配線パターン及びダミーパターンが、銅
箔で形成されていることを特徴とする請求項1に記載の
プリント配線基板。
2. The printed wiring board according to claim 1, wherein the wiring pattern and the dummy pattern are formed of copper foil.
JP2000144296A 2000-05-17 2000-05-17 Printed wiring board Pending JP2001326429A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000144296A JP2001326429A (en) 2000-05-17 2000-05-17 Printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000144296A JP2001326429A (en) 2000-05-17 2000-05-17 Printed wiring board

Publications (1)

Publication Number Publication Date
JP2001326429A true JP2001326429A (en) 2001-11-22

Family

ID=18650973

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000144296A Pending JP2001326429A (en) 2000-05-17 2000-05-17 Printed wiring board

Country Status (1)

Country Link
JP (1) JP2001326429A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6586308B2 (en) * 2000-10-18 2003-07-01 Infineon Technologies Ag Method for producing circuit structures on a semiconductor substrate and semiconductor configuration with functional circuit structures and dummy circuit structures
US6864434B2 (en) * 2002-11-05 2005-03-08 Siliconware Precision Industries Co., Ltd. Warpage-preventive circuit board and method for fabricating the same
WO2005112526A1 (en) * 2004-05-17 2005-11-24 Aspocomp Technology Oy Printed wiring board, manufacturing method and electronic device
JP2006005043A (en) * 2004-06-16 2006-01-05 Fujitsu Ltd Multilayer circuit board and mounting method
KR20100062922A (en) * 2008-12-02 2010-06-10 신꼬오덴기 고교 가부시키가이샤 Wiring board and electronic component device
JP2012049256A (en) * 2010-08-25 2012-03-08 Japan Electronic Materials Corp Wiring board
CN101227795B (en) * 2007-01-19 2012-03-21 日本梅克特隆株式会社 Flexible printing wiring board
JP2016110367A (en) * 2014-12-05 2016-06-20 欣永立企業有限公司 Configuration of touch electrode substrate and method for manufacturing the same
US11869543B2 (en) 2021-12-24 2024-01-09 Kabushiki Kaisha Toshiba Disk device with heat dissipation layer to suppress excessive heating

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6586308B2 (en) * 2000-10-18 2003-07-01 Infineon Technologies Ag Method for producing circuit structures on a semiconductor substrate and semiconductor configuration with functional circuit structures and dummy circuit structures
US6864434B2 (en) * 2002-11-05 2005-03-08 Siliconware Precision Industries Co., Ltd. Warpage-preventive circuit board and method for fabricating the same
US7266888B2 (en) 2002-11-05 2007-09-11 Siliconware Precision Industries, Co. Ltd. Method for fabricating a warpage-preventive circuit board
WO2005112526A1 (en) * 2004-05-17 2005-11-24 Aspocomp Technology Oy Printed wiring board, manufacturing method and electronic device
JP4672290B2 (en) * 2004-06-16 2011-04-20 富士通株式会社 Circuit board, package board manufacturing method, and package board
JP2006005043A (en) * 2004-06-16 2006-01-05 Fujitsu Ltd Multilayer circuit board and mounting method
CN101227795B (en) * 2007-01-19 2012-03-21 日本梅克特隆株式会社 Flexible printing wiring board
JP2010135418A (en) * 2008-12-02 2010-06-17 Shinko Electric Ind Co Ltd Wiring board and electronic component device
KR20100062922A (en) * 2008-12-02 2010-06-10 신꼬오덴기 고교 가부시키가이샤 Wiring board and electronic component device
US8686298B2 (en) 2008-12-02 2014-04-01 Shinko Electric Industries Co., Ltd. Wiring board and electronic component device
US9257373B2 (en) 2008-12-02 2016-02-09 Shinko Electric Industries Co., Ltd. Electronic component device
KR101643206B1 (en) * 2008-12-02 2016-07-27 신꼬오덴기 고교 가부시키가이샤 Wiring board and electronic component device
JP2012049256A (en) * 2010-08-25 2012-03-08 Japan Electronic Materials Corp Wiring board
JP2016110367A (en) * 2014-12-05 2016-06-20 欣永立企業有限公司 Configuration of touch electrode substrate and method for manufacturing the same
US11869543B2 (en) 2021-12-24 2024-01-09 Kabushiki Kaisha Toshiba Disk device with heat dissipation layer to suppress excessive heating

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