JP2001319954A - Sample processing method with focused ion beam - Google Patents
Sample processing method with focused ion beamInfo
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- JP2001319954A JP2001319954A JP2000134988A JP2000134988A JP2001319954A JP 2001319954 A JP2001319954 A JP 2001319954A JP 2000134988 A JP2000134988 A JP 2000134988A JP 2000134988 A JP2000134988 A JP 2000134988A JP 2001319954 A JP2001319954 A JP 2001319954A
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- Prior art keywords
- single crystal
- sample
- crystal wafer
- ion beam
- fib
- Prior art date
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- Crystals, And After-Treatments Of Crystals (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、シリコン単結晶ウ
ェハ表層部における欠陥箇所を解析するための試料を集
束イオンビームを用いて加工する方法に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for processing a sample for analyzing a defect in a surface layer portion of a silicon single crystal wafer by using a focused ion beam.
【０００２】[0002]
【従来の技術】ＬＳＩの高集積化および高性能化に伴
い、ＣＯＰ（Crystal Originated Particle)や転位に代
表されるシリコン（Ｓｉ）単結晶ウェハ表層部の微小欠
陥のデバイス特性への影響が顕在化し、これらの発生機
構の解明および低減技術が要求されている。Ｓｉ単結晶
ウェハ表層部における欠陥箇所の代表的な解析手法とし
て、走査型電子顕微鏡（以下ＳＥＭと略記）、透過型電
子顕微鏡（以下ＴＥＭと略記）、原子間力顕微鏡（以下
ＡＦＭと略記）による形状観察、二次イオン質量分析法
（以下ＳＩＭＳと略記）による不純物濃度プロファイル
測定、エネルギー分散型Ｘ線分光（以下ＥＤＸと略
記）、オージェ電子分光（以下ＡＥＳと略記）による組
成分析等がある。これらの手法を用いて、Ｓｉ単結晶ウ
ェハ表層部における欠陥箇所を解析する際には、集束イ
オンビーム（以下ＦＩＢと略記）を用いると、特定箇所
についての断面観察およびその試料加工を容易に行うこ
とができる。この方法に関しては、例えば特開平５−１
５９８１号公報などに記載されている。2. Description of the Related Art With the increase in integration and performance of LSIs, the influence of minute defects in the surface layer of a silicon (Si) single crystal wafer represented by COP (Crystal Originated Particles) and dislocations on device characteristics becomes apparent. There is a need for techniques for elucidating and reducing these generation mechanisms. As a typical analysis method of a defect portion in a surface layer portion of a Si single crystal wafer, a scanning electron microscope (hereinafter abbreviated as SEM), a transmission electron microscope (hereinafter abbreviated as TEM), and an atomic force microscope (hereinafter abbreviated as AFM) are used. Examples include shape observation, impurity concentration profile measurement by secondary ion mass spectrometry (hereinafter abbreviated as SIMS), composition analysis by energy dispersive X-ray spectroscopy (hereinafter abbreviated as EDX), Auger electron spectroscopy (hereinafter abbreviated as AES), and the like. When using a focused ion beam (hereinafter abbreviated as FIB) to analyze a defective portion in the surface layer portion of a Si single crystal wafer using these techniques, it is possible to easily observe a cross section of a specific portion and process a sample thereof. be able to. This method is described in, for example,
No. 5981, and the like.
【０００３】上記の従来方法によると、試料表面に所望
の観察位置を規定できるマークをＦＩＢで加工した後、
斜め方向からの断面観察を可能とする窓孔を角孔加工す
ることにより、半導体デバイス等の断面を精度良く得る
ことができる。同様に、ＴＥＭを用いて半導体デバイス
の不良箇所、シリコン単結晶ウェハにおける結晶欠陥等
の断面を観察する場合も、ＦＩＢを用いることによっ
て、所望の観察位置の薄膜試料を作製することができ
る。尚、ＦＩＢを用いた断面ＴＥＭ観察試料作製方法に
関しては、Transmission Electron Microscope Sample
Preparation Usinga Focused Ion Beam(J.Electron Mic
rosc.43,pp.322 〜326, 1994)に報告されている。According to the above-mentioned conventional method, after a mark that can define a desired observation position is processed on a sample surface by FIB,
By subjecting a window hole that enables observing a cross section from an oblique direction to a square hole, a cross section of a semiconductor device or the like can be accurately obtained. Similarly, when observing a defective portion of a semiconductor device or a cross section such as a crystal defect in a silicon single crystal wafer using a TEM, a thin film sample at a desired observation position can be manufactured by using the FIB. The method for preparing a cross-sectional TEM observation sample using FIB is described in Transmission Electron Microscope Sample.
Preparation Usinga Focused Ion Beam (J.Electron Mic
rosc.43, pp.322-326, 1994).
【０００４】また、ＦＩＢを用いると、ＥＤＸ、ＡＥＳ
等の解析装置、もしくはＴＥＭ観察試料を精密加工する
際に使用するダイシングソー等の試料加工装置で、所望
の欠陥位置を判別するためのマークを容易に且つ精度良
く形成することができる。ＦＩＢに用いられるイオンビ
ームは、通常、加速電圧３０keV 程度のガリウム（Ｇ
ａ）イオンビームであり、アパーチャの切り替えや、集
束レンズ、対物レンズ等のレンズ条件の変更等により、
集束イオンビームは、ビーム電流が数十pA程度の小電流
ビームから、数十nA程度の大電流ビームに切り替えるこ
とができる。Ｇａイオンビームで試料上を走査すること
により、イオンスパッタリングによる加工や、試料より
放出される二次電子による走査イオン顕微鏡像（以下Ｓ
ＩＭ像と略記）を用いて、試料表面の形状観察を行うこ
とができる。[0004] When FIB is used, EDX, AES
A mark for discriminating a desired defect position can be easily and accurately formed by an analyzer such as the above or a sample processing device such as a dicing saw used for precision processing of a TEM observation sample. The ion beam used for the FIB is usually gallium (G) having an acceleration voltage of about 30 keV.
a) It is an ion beam. The aperture is switched, and the lens conditions such as a focusing lens and an objective lens are changed.
The focused ion beam can be switched from a small current beam having a beam current of about several tens pA to a large current beam of about several tens nA. By scanning the sample with a Ga ion beam, processing by ion sputtering or a scanning ion microscope image (hereinafter referred to as S
The shape of the sample surface can be observed using an IM image.
【０００５】従来のＦＩＢを用いてＳｉ単結晶ウェハの
欠陥箇所を解析する試料を加工する手順を、図面を参照
しながら以下に説明する。図４（ａ）（ｂ）は欠陥部２
を含むＳｉ単結晶ウェハ１を表面から見た図である。ま
ず、ＦＩＢ装置中でシリコン単結晶ウェハ表面のＳＩＭ
像を観察しながら、所望の観察箇所近傍に試料を移動さ
せる。次に、ＳＩＭ像上でＦＩＢ加工領域７を設定し、
その領域をＧａイオンビームで走査して、シリコン単結
晶ウェハ表面を断面観察およびマーク判別が可能な深さ
だけエッチングすることにより、特定箇所についての断
面観察試料、および装置中で欠陥位置を判別するための
マークを加工していた。A procedure for processing a sample for analyzing a defect portion of a Si single crystal wafer using the conventional FIB will be described below with reference to the drawings. 4 (a) and 4 (b) show the defect 2
FIG. 2 is a view of a Si single crystal wafer 1 including the above as viewed from the surface. First, the SIM of the surface of the silicon single crystal wafer in the FIB device
While observing the image, the sample is moved to the vicinity of a desired observation point. Next, the FIB processing area 7 is set on the SIM image,
The region is scanned with a Ga ion beam, and the surface of the silicon single crystal wafer is etched to a depth at which the cross section can be observed and the mark can be determined, thereby determining a cross section observation sample at a specific location and a defect position in the apparatus. The mark was being processed.
【０００６】[0006]
【発明が解決しようとする課題】従来のＳｉ単結晶ウェ
ハ表層部における欠陥箇所を解析する試料を、ＦＩＢを
用いて加工する方法では、試料を所望の加工位置近傍に
移動させる際のＳＩＭ像観察時に、加速電圧３０keV 程
度のＧａイオンビームがＳｉ単結晶ウェハ表面に照射さ
れる。これにより、試料上の原子がスパッタされて、Ｓ
ｉ単結晶表面が損傷を受ける。図２は加速電圧３０keV
のＧａイオンビームをＳｉ表面に照射した場合の、Ｇａ
イオンの分布をモンテカルロ法によるシミュレーション
で計算したものである。これより、ＳＩＭ像観察時にＳ
ｉ単結晶ウェハの表層から約５０nmの領域が、Ｇａイオ
ンビームにより損傷を受けることがわかる。その結果、
シリコン単結晶の表層から約５０nm程度が非晶質化し、
例えば、転位や積層欠陥といった単結晶中の結晶欠陥で
あれば、観察対象となる欠陥が試料作製途中で消失して
しまう。そのため、シリコン単結晶ウェハ表層に発生す
る欠陥のＴＥＭ等を用いた正常な実態観察が困難になる
という問題があった。In the conventional method of processing a sample for analyzing a defect portion in a surface layer portion of a Si single crystal wafer by using FIB, a SIM image observation is performed when the sample is moved to a vicinity of a desired processing position. Sometimes, the surface of the Si single crystal wafer is irradiated with a Ga ion beam having an acceleration voltage of about 30 keV. As a result, atoms on the sample are sputtered and S
The i single crystal surface is damaged. Fig. 2 shows acceleration voltage of 30keV
Irradiating the Si surface with the Ga ion beam of
The distribution of ions is calculated by simulation using the Monte Carlo method. Thus, when observing the SIM image,
It can be seen that a region of about 50 nm from the surface layer of the i single crystal wafer is damaged by the Ga ion beam. as a result,
About 50 nm from the surface layer of silicon single crystal becomes amorphous,
For example, in the case of a crystal defect in a single crystal such as a dislocation or a stacking fault, a defect to be observed disappears during sample preparation. For this reason, there has been a problem that it is difficult to normally observe the actual state of a defect generated on the surface layer of the silicon single crystal wafer using a TEM or the like.
【０００７】これを防止するために、ＦＩＢ装置に装備
されている成膜装置を用いて、結晶欠陥位置上に予めタ
ングステン（Ｗ）などの保護膜を形成する方法が取られ
ている。この成膜方法は、成膜領域をＦＩＢ装置で指定
し、その領域をＧａイオンビームで繰り返し走査するこ
とによりＷ膜を形成する。その際、シリコン単結晶ウェ
ハ表面のＳＩＭ像を観察して成膜領域を探すため、シリ
コン単結晶ウェハ上に直接３０keV 程度のＧａイオンビ
ームを照射した場合と同様に、シリコン単結晶ウェハ表
層部が損傷を受けてしまう。In order to prevent this, a method of forming a protective film such as tungsten (W) in advance on a crystal defect position by using a film forming apparatus provided in the FIB apparatus has been adopted. In this film forming method, a W film is formed by designating a film forming region with an FIB apparatus and repeatedly scanning the region with a Ga ion beam. At this time, in order to observe the SIM image on the surface of the silicon single crystal wafer and search for a film formation region, the surface layer of the silicon single crystal wafer is exposed in the same manner as when directly irradiating the silicon single crystal wafer with a Ga ion beam of about 30 keV. It will be damaged.
【０００８】また、特開平１０−２８３９７１号公報に
おいて、ＳＩＭ像観察時と加工時で、異なったＧａイオ
ンビームの加速電圧を設定する方法が提案されている。
しかしながら、上記方法でも、十分な解像度のＳＩＭ像
を得るためには、Ｇａイオンビームを２５kV〜３５kVの
加速電圧で試料表面に照射する必要があるため、ＦＩＢ
による試料表層部の損傷層の形成を完全に防止すること
はできない。また、試料表面のＳＩＭ像観察領域にイオ
ン源であるＧａが混入するため、試料表層部の化学組成
が変化してしまい、シリコン単結晶ウェハ表層に発生す
る欠陥のＥＤＸやＡＥＳを用いた正確な組成分析が困難
になるという問題もあった。Japanese Patent Application Laid-Open No. 10-283971 proposes a method for setting a different acceleration voltage of a Ga ion beam between observation of a SIM image and processing of a SIM image.
However, even with the above method, in order to obtain a SIM image with sufficient resolution, it is necessary to irradiate the sample surface with a Ga ion beam at an acceleration voltage of 25 kV to 35 kV.
However, it is impossible to completely prevent the formation of a damaged layer on the sample surface layer due to the above. In addition, since Ga as an ion source is mixed into the SIM image observation region on the sample surface, the chemical composition of the sample surface layer portion changes, and an accurate defect using EDX or AES of the defect generated on the surface of the silicon single crystal wafer is used. There was also a problem that composition analysis became difficult.
【０００９】本発明の目的は、前記従来技術では不可能
であった、シリコン単結晶ウェハ表層部の欠陥解析を可
能にするためのＦＩＢを用いた試料加工方法を提供する
ものである。An object of the present invention is to provide a sample processing method using an FIB for enabling a defect analysis of a surface layer portion of a silicon single crystal wafer, which was impossible with the prior art.
【００１０】[0010]
【課題を解決するための手段】本発明は、ＦＩＢを用い
てＳｉ単結晶ウェハ表層部における欠陥箇所を形状観
察、および組成分析等により解析する試料を加工する際
に、加工領域を設定するためのＳＩＭ像観察を行う前
に、保護膜として、Ｇａイオンビームによる試料損傷に
対して、遮蔽効果を有し、かつＳｉ単結晶ウェハ表面に
損傷を与えることなく除去することが可能な薄膜をＳｉ
単結晶ウェハ表面に予め形成することにより、ＦＩＢに
よる試料表面状態の変動を防止し、Ｓｉ単結晶ウェハ表
層部における欠陥箇所の正常な解析を実現するものであ
る。SUMMARY OF THE INVENTION The present invention is directed to setting a processing area when processing a sample to be analyzed by FIB using a FIB for observing the shape of a defect in the surface layer of a Si single crystal wafer and analyzing the composition by composition analysis or the like. Before performing the SIM image observation of the above, as a protective film, a thin film having a shielding effect against sample damage due to a Ga ion beam and capable of being removed without damaging the surface of the Si single crystal wafer is used.
By forming the sample on the surface of the single crystal wafer in advance, it is possible to prevent a change in the surface state of the sample due to the FIB and to realize a normal analysis of a defective portion on the surface layer portion of the Si single crystal wafer.
【００１１】保護膜の膜種は、Ｓｉ単結晶ウェハ表層部
に影響を及ぼさない成膜方法で形成でき、かつ、Ｓｉ単
結晶ウェハ表面に損傷を与えることなく除去することが
可能である必要がある。代表的な膜種としては、シリカ
系塗布液を塗布することにより形成するシリコン酸化膜
（ＳｉＯx ）、蒸着により形成する白金パラジウム（Ｐ
ｔ−Ｐｄ）膜等がある。It is necessary that the type of the protective film can be formed by a film forming method which does not affect the surface layer portion of the Si single crystal wafer and can be removed without damaging the surface of the Si single crystal wafer. is there. Typical film types include a silicon oxide film (SiO x ) formed by applying a silica-based coating solution, and platinum palladium (P
t-Pd) film and the like.
【００１２】シリカ系塗布液（以後ＳＯＧ膜と略記）は
シラノール［ＲｎＳｉ（ＯＨ）4-n］を有機溶剤（アル
コール、エステル、ケトン）に溶解したものである。Ｓ
ＯＧ膜は、スピンコーター等を用いて塗布した後、２０
０℃程度の熱処理を施すことにより、試料表面上に容易
にシリコン酸化膜（ＳｉＯx ）を形成することができ
る。The silica-based coating solution (hereinafter abbreviated as SOG film) is obtained by dissolving silanol [RnSi (OH) 4-n ] in an organic solvent (alcohol, ester, ketone). S
After the OG film is applied using a spin coater or the like,
By performing the heat treatment at about 0 ° C., a silicon oxide film (SiO x ) can be easily formed on the sample surface.
【００１３】試料表面上に形成させるシリコン酸化膜の
膜厚は、Ｓｉ単結晶ウェハ表面がＧａイオンビームによ
る損傷を受けない厚みであればいずれでも良いが、図３
に示したように、加速電圧３０keV のＧａイオンビーム
をＳｉ上のＳｉＯx 表面に照射した場合の、Ｇａイオン
の分布をモンテカルロ法によるシミュレーションで計算
した結果から、Ｇａイオンは試料表層から１００nm以内
に分布しているため、保護膜として、Ｓｉ単結晶ウェハ
表面に１００nm以上の膜厚でＳＯＧ膜を形成することに
より、Ｓｉ層のＦＩＢによる損傷層の形成が防止でき
る。The thickness of the silicon oxide film formed on the sample surface may be any thickness as long as the surface of the Si single crystal wafer is not damaged by the Ga ion beam.
As shown in the above, when the Ga ion beam at an acceleration voltage of 30 keV was irradiated on the SiO x surface on Si, the distribution of Ga ions was calculated by a Monte Carlo simulation. As a result, Ga ions were within 100 nm from the sample surface layer. Since the SOG film is distributed over the surface of the Si single crystal wafer as a protective film with a thickness of 100 nm or more, formation of a damaged layer of the Si layer due to FIB can be prevented.
【００１４】本発明は、ＦＩＢを用いてＳｉ単結晶ウェ
ハ表層部における欠陥箇所を形状観察、および組成分析
等により解析する試料を加工する際に、保護膜としてＳ
ＯＧ膜をＳｉ単結晶ウェハ表面に予め塗布してから、所
望の観察箇所のＳＩＭ像観察、ＦＩＢ加工を行い、その
後、前記ＳＯＧをＨＦ等で除去することにより、ＦＩＢ
による損傷層形成、Ｇａ混入等の試料表面状態の変動を
防止することができる。尚、本発明におけるＳＯＧ膜の
組成は、ＬＳＩ製造工程において、層間絶縁膜として使
用されるものであればどんなものでもよい。According to the present invention, when processing a sample for analyzing the shape of a defect in the surface layer of a Si single crystal wafer using FIB and analyzing the composition by a composition analysis or the like, an S film is used as a protective film.
After applying an OG film on the surface of the Si single crystal wafer in advance, performing SIM image observation and FIB processing at a desired observation location, and then removing the SOG with HF or the like, FIB
It is possible to prevent a change in the surface state of the sample, such as formation of a damaged layer and mixing of Ga. The composition of the SOG film in the present invention may be any composition as long as it is used as an interlayer insulating film in an LSI manufacturing process.
【００１５】[0015]
【発明の実施の形態】以下に本発明によるＦＩＢを用い
たシリコン単結晶ウェハ表層部の欠陥観察試料加工手順
を、図面を参照しながら説明する。図１（ａ）は欠陥部
２を含むＳｉ単結晶ウェハ１を断面から見た図である。
まず、図１（ａ）に示すように、Ｓｉ単結晶ウェハ１上
に、膜厚１００nm以上のＳＯＧ膜３を塗布する。次に、
１００℃程度の熱処理を行い、ＳＯＧ膜３を乾燥させ
る。図１（ｂ）は欠陥部２を含むＳｉ単結晶ウェハ１を
表面から見た図である。所望の欠陥部２が中心となるよ
うに、ＦＩＢ装置中でシリコン単結晶ウェハ表面のＳＩ
Ｍ像を観察しながら、所望の観察箇所近傍に試料を移動
させ、ＳＩＭ像上で加工領域を設定し、その領域を加工
することにより、図１（ｂ）に示すようなマーク４を形
成する。マーク４ａの形状は、ＳＩＭ像上での加工領域
の設定および加工時間の制御により、次に使用する解析
装置、試料加工装置に装備されているＳＥＭもしくは光
学顕微鏡の分解能に応じて、それらで判別可能な大きさ
および深さに設定すればよい。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A procedure for processing a sample for observing a defect in a surface layer portion of a silicon single crystal wafer using an FIB according to the present invention will be described below with reference to the drawings. FIG. 1A is a view of a Si single crystal wafer 1 including a defect portion 2 as viewed from a cross section.
First, as shown in FIG. 1A, an SOG film 3 having a thickness of 100 nm or more is applied on a Si single crystal wafer 1. next,
A heat treatment at about 100 ° C. is performed to dry the SOG film 3. FIG. 1B is a diagram of the Si single crystal wafer 1 including the defect 2 as viewed from the surface. In the FIB apparatus, the SI on the surface of the silicon single crystal wafer is set so that the desired defect 2 is centered.
While observing the M image, the sample is moved to the vicinity of a desired observation point, a processing region is set on the SIM image, and the region is processed to form a mark 4 as shown in FIG. . The shape of the mark 4a is determined by setting the processing area on the SIM image and controlling the processing time, according to the resolution of the SEM or the optical microscope equipped in the analyzer or sample processing apparatus to be used next. What is necessary is just to set to the possible magnitude | size and depth.
【００１６】図１（ｃ）は図１（ｂ）におけるＳｉ単結
晶ウェハ１のＡ−Ａ′方向の断面図である。次に、図１
（ｃ）に示すように、前記ＳＯＧ膜３をＨＦ等で除去す
る。その後、ＳＥＭ、ＡＦＭによる形状観察、ＥＤＸ、
ＡＥＳによる組成分析等の目的に応じた欠陥２の解析を
行う。FIG. 1C is a cross-sectional view of the Si single crystal wafer 1 taken along the line AA 'in FIG. 1B. Next, FIG.
As shown in (c), the SOG film 3 is removed by HF or the like. After that, shape observation by SEM, AFM, EDX,
Analysis of the defect 2 according to the purpose such as composition analysis by AES is performed.
【００１７】図１（ｄ）（ｅ）はＳｉ単結晶ウェハ１を
凸型形状に加工した予備薄片５の斜視図である。欠陥２
の断面ＴＥＭ観察を行う場合は、前記ＳＯＧ膜３をＨＦ
等で除去した後、マーク４ａが凸領域のほぼ中心となる
ように、ダイシングソー等を用いて、Ｓｉ単結晶ウェハ
１を、図１（ｄ）に示すような凸型形状に精密加工し、
予備薄片５を作製する。次いで、図１（ｅ）に示すよう
に、ＦＩＢを用いて、マーク４ａを中心として予備薄片
５の凸型領域を両側から加工し、欠陥２を含む位置を
０．１μｍ程度の膜厚まで薄片化することにより、観察
位置の薄膜試料を作製する。FIGS. 1 (d) and 1 (e) are perspective views of a preliminary thin piece 5 obtained by processing the Si single crystal wafer 1 into a convex shape. Defect 2
When the cross-sectional TEM observation is performed, the SOG film 3 is
Then, the Si single crystal wafer 1 is precision-processed into a convex shape as shown in FIG. 1D using a dicing saw or the like so that the mark 4a is substantially at the center of the convex region.
A preliminary thin section 5 is prepared. Then, as shown in FIG. 1 (e), using the FIB, the convex region of the preliminary thin piece 5 is processed from both sides around the mark 4a, and the position including the defect 2 is thinned to a thickness of about 0.1 μm. Thus, a thin film sample at the observation position is prepared.
【００１８】以上、Ｓｉ単結晶ウェハ１表面の所望の欠
陥位置が既知である場合について、ＦＩＢを用いたシリ
コン単結晶ウェハ表層部の欠陥観察試料加工を説明した
が、Ｓｉ単結晶ウェハ表面の欠陥２の位置が未知である
場合は、まず、Ｓｉ単結晶ウェハ１上に、膜厚１００nm
以上のＳＯＧ膜３を塗布した後、Ｓｉ単結晶ウェハ１上
の任意箇所に、ＦＩＢを用いて図１（ｂ）に示すような
結晶欠陥位置合わせ用マーク４ｂを形成する。前記マー
クを形成する領域の大きさは、所望の結晶欠陥の密度を
考慮して、所定の領域内に数個の欠陥２が含まれるよう
に設定する。次いで、前記ＳＯＧ膜３をＨＦ等で除去し
た後、ＡＦＭ等の表面形状解析装置を用いてマークを形
成した領域内を測定することにより欠陥２の位置を割り
出してから、本発明による手順に従い、欠陥観察試料を
加工すればよい。The processing of a defect observation sample on the surface of a silicon single crystal wafer using FIB in the case where the desired defect position on the surface of the Si single crystal wafer 1 is known has been described above. 2 is unknown, first, a film thickness of 100 nm is formed on the Si single crystal wafer 1.
After the above-mentioned SOG film 3 is applied, a crystal defect alignment mark 4b as shown in FIG. 1B is formed at an arbitrary position on the Si single crystal wafer 1 using FIB. The size of the area where the mark is formed is set so that several defects 2 are included in a predetermined area in consideration of the density of a desired crystal defect. Next, after the SOG film 3 is removed with HF or the like, the position of the defect 2 is determined by measuring the inside of the area where the mark is formed using a surface shape analyzer such as an AFM. What is necessary is just to process a defect observation sample.
【００１９】[0019]
【実施例】本発明の欠陥観察試料加工方法を用いて、Ｓ
ＩＭＯＸ（Separation by Implanted Oxygen）ウェハに
おける貫通転位の断面ＴＥＭ観察を行った。観察試料に
は、表面シリコン層が６０nm、埋め込み酸化膜層が１２
０nmで表面シリコン層に含まれる貫通転位密度が１Ｅ５
cm-2であるＳＩＭＯＸウェハを用いた。まず、試料を約
７mm×５mmの大きさのチップに切り出した後、膜厚２０
０nmのＳＯＧ膜を塗布し、温度１００℃、時間１分の熱
処理を行った。次に、ＦＩＢでＳＩＭＯＸウェハ表面を
エッチングすることにより、５０μｍ×５０μｍの領域
の端に５μｍ×５μｍの結晶欠陥位置合わせ用のマーク
を加工した。貫通転位密度を考慮すると、前記領域中
に、２３個の貫通転位が含まれることになる。次に、前
記ＳＩＭＯＸウェハを５０％ＨＦに１分間浸すことによ
り、ＳＯＧ膜を除去した。次に、ＡＦＭを用いて前記領
域内を走査し、所望の欠陥位置を割り出した。次に、再
度、試料表面に膜厚２００nmのＳＯＧ膜を塗布した後、
欠陥位置が中心となるように、ＦＩＢを用いて、図１
（ｂ）に示すような断面ＴＥＭ試料加工位置マークを加
工した。次に、前記ＳＯＧ膜を除去し、ＡＦＭを用いて
欠陥位置近傍を走査することにより、所望の欠陥の三次
元的な表面形状を詳細観察した。次にダイシングソーを
用いて、マーク位置が中心となるように、試料を図１
（ｄ）に示すような凸型形状に精密加工した。次に、予
備薄片上に、断面ＴＥＭ観察領域加工による試料表層の
損傷を防止するために、１００nmのＰｔ−Ｐｄ膜を蒸着
した後、ＦＩＢを用いて、前記マークを中心として、試
料両側からエッチングを行い、０．１μｍ程度の膜厚ま
で薄片化した。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Using the defect observation sample processing method of the present invention,
A cross-sectional TEM observation of threading dislocations in an IMOX (Separation by Implanted Oxygen) wafer was performed. The observation sample had a surface silicon layer of 60 nm and a buried oxide film layer of 12 nm.
At 0 nm, the density of threading dislocations contained in the surface silicon layer is 1E5
A cmox- 2 SIMOX wafer was used. First, the sample was cut into chips of about 7 mm × 5 mm, and then the film thickness was 20 mm.
A 0 nm SOG film was applied, and heat treatment was performed at a temperature of 100 ° C. for 1 minute. Next, by etching the surface of the SIMOX wafer with the FIB, a 5 μm × 5 μm mark for alignment of crystal defects was formed at the end of the 50 μm × 50 μm region. In consideration of the threading dislocation density, 23 threading dislocations are included in the region. Next, the SIMOX wafer was immersed in 50% HF for 1 minute to remove the SOG film. Next, the inside of the area was scanned using the AFM, and a desired defect position was determined. Next, a 200 nm-thick SOG film is applied again on the sample surface,
The FIB is used in FIG. 1 so that the defect position becomes the center.
A cross-sectional TEM sample processing position mark as shown in FIG. Next, the SOG film was removed, and the vicinity of the defect position was scanned using an AFM, whereby the three-dimensional surface shape of the desired defect was observed in detail. Next, using a dicing saw, the sample was placed in the position shown in FIG.
It was precision-processed into a convex shape as shown in (d). Next, a 100 nm Pt-Pd film was deposited on the preliminary thin section in order to prevent damage to the sample surface layer due to processing of the cross-sectional TEM observation area, and then etched using FIB from both sides of the sample with the mark at the center. And thinned to a thickness of about 0.1 μm.
【００２０】図５（ａ）は本発明の実施例により、加工
した試料を断面ＴＥＭ観察した結果である。図５（ｂ）
はＳＯＧ膜塗布なしの場合の比較実施例を示す。図５
（ｂ）では、ＦＩＢ加工損傷によって、表面シリコン層
が非晶質化し、表面シリコン層における欠陥箇所の正常
な解析が困難になっているが、本発明の実施例により、
断面ＴＥＭ察試料を加工すると、図５（ａ）に示すよう
に、表面シリコン層にＦＩＢによる損傷層が形成される
ことなく、貫通転位の実体が観察できることが確認でき
た。FIG. 5 (a) shows the result of cross-sectional TEM observation of a sample processed according to the embodiment of the present invention. FIG. 5 (b)
Shows a comparative example in which no SOG film is applied. FIG.
In (b), the surface silicon layer becomes amorphous due to the FIB processing damage, and normal analysis of a defective portion in the surface silicon layer becomes difficult. However, according to the embodiment of the present invention,
When the cross-sectional TEM observation sample was processed, it was confirmed that the actual threading dislocation could be observed without forming a damage layer due to FIB on the surface silicon layer as shown in FIG.
【００２１】[0021]
【発明の効果】以上説明したように本発明によれば、Ｆ
ＩＢを用いてＳｉ単結晶ウェハ表層部における欠陥箇所
を形状観察、および組成分析等により解析する試料を加
工する際に、Ｓｉ単結晶ウェハ表面に保護膜としてＳＯ
Ｇ膜を予め塗布してから、所望の観察箇所のＳＩＭ像観
察、ＦＩＢ加工を行い、その後、前記ＳＯＧ膜をHF等で
除去することにより、ＦＩＢによる損傷層形成、Ｇａ混
入等のＳｉ単結晶ウェハ表面状態の変動を防止でき、Ｓ
ｉ単結晶ウェハ表層部の欠陥箇所を正常に解析すること
が可能になる。As described above, according to the present invention, F
When processing a sample for analyzing the shape of a defect portion in the surface layer portion of a Si single crystal wafer using IB and analyzing the defect portion by composition analysis or the like, a SO
After applying a G film in advance, SIM image observation and FIB processing of a desired observation point are performed, and then the SOG film is removed by HF or the like, thereby forming a damaged layer by FIB, Si single crystal such as Ga mixing, etc. Variations in wafer surface conditions can be prevented, and S
Defects on the surface layer of the i-single-crystal wafer can be analyzed normally.
【図１】（ａ）〜（ｅ）は本発明のＳｉ単結晶ウェハ表
層部における欠陥箇所を解析する試料をＦＩＢを用いて
加工する手順を示す図である。FIGS. 1A to 1E are diagrams showing a procedure for processing a sample for analyzing a defect portion in a surface layer portion of a Si single crystal wafer according to the present invention using FIB.
【図２】シリコン単結晶の表面に、３０keV のＧａイオ
ンビームを照射した場合の、Ｇａイオンの分布を示す図
である。FIG. 2 is a view showing a distribution of Ga ions when a surface of a silicon single crystal is irradiated with a Ga ion beam of 30 keV.
【図３】シリコン単結晶上に形成されたシリコン酸化膜
（ＳｉＯx ）の表面に、３０keV のＧａイオンビームを
照射した場合の、Ｇａイオンの分布を示す図である。FIG. 3 is a diagram showing a distribution of Ga ions when a surface of a silicon oxide film (SiO x ) formed on a silicon single crystal is irradiated with a Ga ion beam of 30 keV.
【図４】（ａ）（ｂ）は従来のＳｉ単結晶ウェハ表層部
における欠陥箇所を解析する試料を、ＦＩＢを用いて加
工する方法を、欠陥位置判別用マークの加工、断面観察
試料の加工の場合について示す図である。4 (a) and 4 (b) show a conventional method of processing a sample for analyzing a defect portion in a surface layer portion of a Si single crystal wafer using FIB by processing a defect position determination mark and processing a cross-section observation sample. It is a figure shown about the case of.
【図５】（ａ）（ｂ）は本発明の実施例において、ＦＩ
Ｂを用いて加工した試料の断面ＴＥＭ観察を行った結果
である。FIGS. 5A and 5B show FI in an embodiment of the present invention.
9 shows the results of TEM observation of a cross section of a sample processed using B.
１ Ｓｉ単結晶ウェハ ２ 欠陥部 ３ ＳＯＧ膜 ４ 欠陥位置判別用マーク ５ 予備薄片 ６ 断面ＴＥＭ観察領域 ７ ＦＩＢ加工領域 DESCRIPTION OF SYMBOLS 1 Single crystal silicon wafer 2 Defect part 3 SOG film 4 Defect position discriminating mark 5 Preliminary slice 6 Cross-sectional TEM observation area 7 FIB processing area
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ テーマコート゛(参考） Ｈ０１Ｊ 37/317 Ｇ０１Ｎ 1/28 Ｇ Ｎ ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) H01J 37/317 G01N 1/28 GN
Claims (3)
を解析するための試料を集束イオンビームを用いて加工
する方法であって、集束イオンビームによる加工を行う
際に、試料表面の走査イオン顕微鏡像の観察を行う前
に、Ｇａイオンビームによる試料損傷に対して遮蔽効果
を有し、かつシリコン単結晶ウェハ表面に損傷を与える
ことなく除去することが可能な保護膜を、固体材料の表
面状態に影響を及ぼさない成膜方法で予め形成する工程
と、集束イオンビームによる加工を行った後、前記保護
膜を除去する工程を含むことを特徴とする集束イオンビ
ームによる試料の加工方法。1. A method for processing a sample using a focused ion beam for analyzing a defect portion of a surface layer portion of a silicon single crystal wafer, wherein a scanning ion microscope is used for processing the sample surface using the focused ion beam. Before observing the image, a protective film that has a shielding effect against sample damage caused by the Ga ion beam and that can be removed without damaging the surface of the silicon single crystal wafer is formed on the surface of the solid material. A method for processing a sample using a focused ion beam, comprising: a step of forming the film in advance by a film forming method which does not affect the process; and a step of removing the protective film after processing by the focused ion beam.
ン単結晶ウェハ表面に塗布することにより形成したシリ
コン酸化膜であることを特徴とする請求項１記載の集束
イオンビームによる試料の加工方法。2. The method according to claim 1, wherein the protective film is a silicon oxide film formed by applying a silica-based coating solution to the surface of a silicon single crystal wafer. .
以上であることを特徴とする請求項２記載の集束イオン
ビームによる試料の加工方法。3. The silicon oxide film has a thickness of 100 nm.
3. The method for processing a sample using a focused ion beam according to claim 2, wherein:
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|---|---|---|---|
| JP2000134988A JP2001319954A (en) | 2000-05-08 | 2000-05-08 | Sample processing method with focused ion beam |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000134988A JP2001319954A (en) | 2000-05-08 | 2000-05-08 | Sample processing method with focused ion beam |
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| Publication Number | Publication Date |
|---|---|
| JP2001319954A true JP2001319954A (en) | 2001-11-16 |
Family
ID=18643159
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|---|---|---|---|
| JP2000134988A Withdrawn JP2001319954A (en) | 2000-05-08 | 2000-05-08 | Sample processing method with focused ion beam |
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| Country | Link |
|---|---|
| JP (1) | JP2001319954A (en) |
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