JP2001308546A - Multilayer wiring board for electronic component and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer wiring board for an electronic component, which does not leave bubbles between the surfaces of photosensitive insulating resin layers and a resin film, does not hinder to an ultraviolet transmission at the time of an exposure of the wiring board, can open normal vias, can eliminate recesses in the surfaces of the photosensitive insulating resin layers subsequent to the formation of the vias and can prevent a short-circuit between wiring patterns due to a plating, and to provide the manufacturing method of the wiring board. SOLUTION: A multilayer wiring board 11 for an electronic component has a core board material 12, and a multilayer wiring 3 provided on the core board material 12 is formed with two-layer or more-layer wiring patterns 14, 19 and 22 via insulating resin layers 17 and 21. Moreover, the wiring 3 has the upper and lower wiring patterns 14, 19 and 22 made to have continuity with each other through vias 20 and 20a. In this multilayer wiring board 11, a degassing part for pushing out gas being included in the interior of the wiring board 11 is provided in a space part 32 partioning each lead of each of the patterns 14, 19 and 22 in a planar manner.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer for an electronic component having a plurality of insulating resin layers provided with a wiring pattern and a via, and for extruding a gas in a specific direction in order to prevent entrainment of gas (air). The present invention relates to a wiring board and a method for manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, a circuit board on which electronic components such as semiconductor elements are mounted has a high density of wirings. For example, there is a multilayer wiring board by a build-up method. A typical manufacturing method of this build-up multilayer wiring board is as follows. A hole for a through hole is formed in a glass epoxy substrate serving as a core substrate material with copper foil on both sides, a catalyst such as Pd is applied, and electroless copper plating and electrolytic copper plating are formed on the entire surface. Then, a photosensitive insulating resin layer such as an epoxy-based dry film resist is formed on the copper plating,
An opening is formed in the photosensitive insulating resin layer by a photolithography method, and then the opening is etched to remove the photosensitive insulating resin layer, and is made of copper foil, electroless copper plating, and electrolytic copper plating. A wiring pattern and a through-hole conductor made of electroless copper plating and electrolytic copper plating are formed. After applying a photosensitive insulating resin on the wiring pattern by screen printing or a roll coater, etc., and drying it, a pattern mask for via formation is brought into close contact with the photosensitive insulating resin, exposed to ultraviolet light, and developed. Form vias. Next, the photosensitive insulating resin is cured to form an insulating resin layer. The surface of the insulating resin layer with the vias is roughened with chromic acid, permanganic acid or the like, and a catalyst such as Pd is applied. Perform electrolytic copper plating. After that, a dry film is attached, a pattern mask is brought into close contact, and exposed to ultraviolet light,
By performing development, an opening to be a wiring pattern conductor or a via conductor is formed. Next, electrolytic copper plating is performed on this opening, and after the dry film is peeled off, the copper plated surface is etched to remove the thin electroless copper plated portion of the copper plated layer, and the copper plated layer is thickened by electrolytic copper plating. The conductor is formed by leaving the wiring pattern conductor and the via conductor in the portion where the wiring pattern is formed.
Thereafter, the same steps are sequentially repeated to form a multilayer. Here, when exposing the photosensitive insulating resin layer, it is common that the photosensitive insulating resin surface is not sufficiently dried. Adheres and hinders exposure. Furthermore, it is difficult to remove dust and the like adhering to the surface of the photosensitive insulating resin, which causes a problem that the opening property of the via is deteriorated. For this purpose, a method in which a resin film made of polyethylene terephthalate or the like is attached to a dried photosensitive insulating resin surface by a laminator or the like, and after exposure, the resin film made of polyethylene terephthalate is peeled off and developed before development. Have been.

[0003]

However, when an insulating resin is formed on a conventional wiring pattern layer as described above, there are the following problems. (1) Since the photosensitive insulating resin is applied onto the irregularities on the surface of the wiring pattern, irregularities along the irregularities on the surface of the wiring pattern remain on the photosensitive insulating resin surface. Due to this unevenness, when the resin film is laminated, air bubbles remain between the photosensitive insulating resin surface and the resin film (see FIG. 4), which impedes the transmission of ultraviolet light during exposure and impairs the opening of the via. (2) These bubbles become dents on the surface of the insulating resin layer after the formation of the vias, and when forming the openings of the photosensitive insulating resin layer on the electroless copper plating film at the time of forming the next wiring pattern. However, the photosensitive insulating resin layer does not follow the dents on the surface of the insulating resin layer, and the electrolytic copper plating sneaks into that location, causing plating overcoating and short circuit of the wiring pattern. (3) As a countermeasure, if the thickness of the wiring pattern layer is reduced and unevenness is suppressed, the conductor resistance of the wiring pattern increases, and the function of the semiconductor element decreases. (4) Further, if the thickness of the photosensitive insulating resin layer is increased to absorb the unevenness of the wiring pattern, the exposing and developing formability is impaired, and a fine via cannot be obtained. The present invention has been made in view of the above circumstances, and has been made in consideration of the above circumstances, and has a multilayer wiring for electronic components in which bubbles (gas) are prevented from being caught in irregularities on the surface of a photosensitive insulating resin layer along irregularities on the surface of a wiring pattern. It is an object to provide a substrate and a method for manufacturing the same.

[0004]

According to the present invention, there is provided a multilayer wiring board for an electronic component according to the present invention, wherein a core substrate is provided, and two or more wiring patterns are formed on an insulating resin layer. In addition, the upper and lower wiring patterns are multilayer wiring boards for electronic components having upper and lower wiring patterns that are electrically connected by vias. A gas venting section is provided for pushing out gas contained in a specific direction. Thus, when the resin film is laminated, no air bubbles remain between the photosensitive insulating resin surface and the resin film, and there is no obstacle to the transmission of ultraviolet light during exposure, and a normal via opening can be made. Further, since no bubbles are generated, there is no dent on the surface of the photosensitive insulating resin layer after the formation of the via, normal plating can be performed, and short circuit of the wiring pattern does not occur. Furthermore, it is not necessary to reduce the thickness of the wiring pattern, the conductor resistance of the wiring pattern is kept normal, and the semiconductor element functions normally. Then, it is not necessary to increase the thickness of the photosensitive insulating resin layer, and a normal via shape can be secured. In the multilayer wiring board for electronic components according to the present invention,
The gas vent may have a protrusion formed by extending a part of the space in a specific direction. Thus, when the resin film is laminated, gas (air) between the photosensitive insulating resin surface and the resin film is easily released, and no bubbles are generated. Furthermore, in the multilayer wiring board for electronic components according to the present invention, the gas venting part may have a converging part that connects adjacent space parts and that gathers in a specific direction. Thereby, the gas on the converging portion is easily released, and no bubbles are generated. Note that the specific direction refers to a direction in which gas is extracted.

In accordance with the first aspect of the present invention, there is provided a method of manufacturing a multilayer wiring board for electronic parts, comprising the steps of forming two or more wiring patterns, each of which is separated by a space portion, on a core substrate material by using an insulating resin layer. In addition, a method for manufacturing a multilayer wiring board for electronic components in which the upper and lower wiring patterns are electrically connected by vias, wherein a gas vent portion for extruding gas contained in the space in a specific direction is previously formed in a space portion. Then, a wiring pattern forming step of forming a wiring pattern, a resin coating step of forming a photosensitive insulating resin layer on the wiring pattern, a resin film on the insulating resin layer, the insulating resin layer and the resin film A film laminating step of laminating while extruding gas in a specific direction, exposing the insulating resin layer from above the resin film, and then removing the resin film, And a exposure and development step of developing the layer of insulating resin. Thus, when the resin film is laminated, no bubbles remain between the photosensitive insulating resin surface and the resin film, and there is no hindrance to ultraviolet transmission at the time of exposure, and a normal via forming method can be provided. In addition, since no bubbles are generated, dents are not generated on the surface of the photosensitive insulating resin layer after the via is formed, normal plating can be performed, and short circuit of the wiring pattern does not occur. Furthermore, it is not necessary to reduce the thickness of the wiring pattern, the conductor resistance of the wiring pattern is kept normal, and the semiconductor element functions normally. In addition, it is not necessary to increase the thickness of the photosensitive insulating resin layer, and a method for securing a normal via can be provided.

According to a second aspect of the present invention, there is provided a method for manufacturing a multilayer wiring board for electronic parts, wherein each lead is partitioned by a space on a core substrate material, and a dead-path space is formed in the space. A method for manufacturing a multilayer wiring board for electronic components, wherein two or more wiring patterns are formed via an insulating resin layer, and the upper and lower wiring patterns are electrically connected by vias. A resin coating step of forming a photosensitive insulating resin layer on the wiring pattern, and on the insulating resin layer, the dead end space portion is joined to the resin film earlier than other spaces connected to the dead end space portion. A film laminating step of laminating a resin film while extruding a gas between the insulating resin layer and the resin film in a specific direction; Exposing the, then, after removal of the resin film, and a exposure and development step of developing the photosensitive insulating resin layer. Accordingly, no bubbles remain between the photosensitive insulating resin surface and the resin film, and there is no obstacle to ultraviolet transmission at the time of exposure, and a normal via forming method can be provided.
In addition, since no bubbles are generated, dents on the surface of the insulating resin layer after via formation are not generated, normal plating is performed, and a short circuit of the wiring pattern is not generated. Furthermore, it is not necessary to reduce the thickness of the wiring pattern, the conductor resistance of the wiring pattern is kept normal, and the semiconductor element functions normally. Further, there is provided a method for securing a normal via without necessity of increasing the thickness of the photosensitive insulating resin layer.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the accompanying drawings to provide an understanding of the present invention. Here, FIG. 1 is a partially enlarged cross-sectional view showing the structure of a multilayer wiring board for electronic components according to an embodiment of the present invention, and FIG. 2 is a view for explaining a resin film bonding state of the multilayer wiring board for electronic components. Partial enlarged sectional view, FIG.
(A), (B) is an enlarged plan view showing a gas vent portion in a space portion of the electronic component multilayer wiring board.

First, the structure of a multilayer wiring board for electronic components 11 according to an embodiment of the present invention will be described with reference to FIG. The electronic component multilayer wiring board 11 has a core substrate material 12 and a multilayer wiring part 33. The core substrate material 12 is formed of, for example, an insulating resin substrate of polyimide, glass epoxy, or the like, and has upper and lower surfaces thereof. Is formed with a Cu foil, and a through hole 13 is formed at a predetermined position. A first wiring pattern 14 is formed on both upper and lower surfaces of the core substrate material 12 by Cu foil, electroless copper plating, and electrolytic copper plating, and an electroless copper Through-hole conductors 15 are formed by plating and electrolytic copper plating, and upper and lower first wiring patterns 14 are electrically connected. The hollow portion of the through-hole conductor 15 is filled with a hole filling resin 16 such as epoxy.
Is filled.

A first insulating resin layer 17 is formed on the first wiring patterns 14 on both surfaces of the core substrate material 12, and via holes 18 are formed at predetermined positions of the first insulating resin layer 17 by photolithography or the like. Are formed. A second wiring pattern 19 is formed on the surface of the first insulating resin layer 17 and the via hole 18 by electroless copper plating and electrolytic copper plating.
And a via conductor (via) 20 are formed, and the first wiring pattern 14 on the core substrate material 12 and the second wiring pattern 19 on the first insulating resin layer 17 are electrically connected via the via conductor 20. It is connected. Further, a second insulating resin layer 21 is formed on the second wiring pattern 19, and a via hole 18a is formed at a predetermined position of the second insulating resin layer 21 by a photolithography method or the like. A third wiring pattern 22 and a via conductor (via) 20a are formed on the surfaces of the layer 21 and the via hole 18a.

Here, the insulating resin layer having vias is formed by bringing a pattern mask into close contact with the photosensitive insulating resin layer, exposing it to ultraviolet rays, and developing it. Affixed to the insulating resin surface. For example, as shown in FIG.
In the case where the second insulating resin layer 21 is formed on the second wiring pattern 19 formed on the
The resin film 31 is stuck on a with a laminator or the like. In this case, the space portion 32 that partitions each lead of the second wiring pattern 19 in a plane is provided with a gas vent portion for pushing out gas (air) contained therein in a specific direction as described below. In FIG. 3 (A), the gas venting part connects adjacent space parts 32 and has a converging part 34 which gathers in a specific direction. FIG. 3B shows a case where the gas venting portion has projecting portions 35 a to 35 e formed by extending a part of the space portion 32 in a specific direction. By forming the converging portion 34 and the protruding portions 35a to 35e, when laminating the resin film on the insulating resin layer, an allowance for air escape is formed in the traveling direction of the laminator, and the gap between the insulating resin layer and the resin film is formed. Gas can be pushed out in a specific direction without stagnation. Although FIG. 1 shows two insulating resin layers, the number of laminated insulating resin layers may be one or three or more, and only one surface of the core substrate 12 is insulated. A resin layer may be formed. In FIG. 1, the core substrate 12 and the first insulating resin layer 17 and the second insulating resin layer 21 and the first wiring pattern 14 and the second wiring pattern 19 and the third wiring pattern 22 are separated. As described above, the respective layers are merely in a vertical relationship, and the present invention is not limited to this.

Next, a method for manufacturing a multilayer wiring board for electronic components according to the first embodiment of the present invention will be described. First, a through hole 13 is formed in the core substrate material 12, and both upper and lower surfaces of the core substrate material 12 and an inner peripheral surface of the through hole 13 are formed.
Electroless copper plating and electrolytic copper plating are performed, and a photosensitive insulating resin layer such as a dry film resist made of, for example, an epoxy-based photosensitive resin containing an organic filler is formed on the electrolytic copper plating. An opening is formed by a photolithography method in which a pattern mask is brought into close contact with the resin layer, exposed to ultraviolet light, and developed, and then the opening is etched to form a Cu foil, an electroless copper plating, and an electrolytic copper plating. The first wiring pattern 14 and the through-hole conductor 15 made of electroless copper plating or electrolytic copper plating are formed. Note that the first wiring pattern 14 is formed by laminating a gas contained in a specific direction (a direction in which gas is removed), that is, a resin film, in a space portion that separates each lead of the first wiring pattern 14 in a plane. A degassing part that extrudes in the direction in which the laminator to be moved, for example, a protrusion formed by extending a part of the space in a specific direction,
A converging portion that connects adjacent space portions and gathers in a specific direction is formed in advance. Thereafter, the photosensitive insulating resin layer is removed, and the cavity of the through-hole conductor 15 is filled with a filling resin 16 such as epoxy.

Thereafter, a photosensitive insulating resin layer for forming a via hole 18 for connecting the first wiring pattern 14 and the second wiring pattern 19 is formed. In the method of forming the via hole 18, a photosensitive insulating resin is applied on the first wiring pattern 14 layer by screen printing or a roll coater or the like, and is dried, for example, at 55 ° C. for 15 minutes. The application and drying of the photosensitive insulating resin were repeatedly performed three times in the present embodiment in order to obtain a sufficient resin thickness between the layers, for example, 30 μm. Further, the surface of the first wiring pattern 14 may be roughened for the purpose of improving the adhesion between the first wiring pattern 14 and the insulating resin layer. Next, a pattern mask for forming the via hole 18 is adhered to the photosensitive edge resin layer, but if the photosensitive insulating resin is not sufficiently dried when the pattern mask is directly placed on the photosensitive insulating resin layer, Since the pattern mask may be contaminated, a polyethylene terephthalate resin film is laminated on the photosensitive insulating resin layer while extruding the gas between the insulating resin layer and the resin film in a specific direction. Place the mask. Then, for example, 600m
Exposure with ultraviolet light of j / cm ² , peeling off the resin film made of polyethylene terephthalate, developing it to open the via hole 18, then performing ultraviolet curing and heat curing and curing to cure the first insulating resin layer 17 is formed.

Next, the surface of the first insulating resin layer 17 is roughened with chromic acid, permanganic acid or the like, and a catalyst such as Pd is applied, and then electroless copper plating is performed. Next, a photosensitive insulating resin layer, for example, a photosensitive dry film resist (NIT-240 manufactured by Nippon Synthetic Chemical Co., Ltd.) is laminated on the electroless copper plating, a pattern mask is brought into close contact with the substrate, exposed, and developed.
An opening is formed by a dry film resist. Thereafter, a current is passed through the electroless copper plating layer to form an electrolytic copper plating layer in the opening. After that, by removing the photosensitive dry film resist and etching, the copper thin portion of only the electroless copper plating layer is etched away,
A second wiring pattern 19 made of electroless copper plating and electrolytic copper plating is formed. Similarly to the first wiring pattern 14, also in the second wiring pattern 19, a gas vent portion for extruding the gas contained therein in a specific direction is formed in the space portion in advance.

Next, in order to further increase the number of layers, a photosensitive insulating resin layer for forming a via hole 18a for connecting the second wiring pattern 19 and the third wiring pattern 22 is formed in the same manner as described above. To form This via hole 18a
Is formed by applying a photosensitive insulating resin on the second wiring pattern 19 layer by screen printing or a roll coater, and then forming a polyethylene terephthalate resin film on the photosensitive insulating resin layer. Laminating is performed while extruding a gas between the layer and the resin film in a specific direction, and a pattern mask is placed thereon. After that, the resin film made of polyethylene terephthalate is exposed to ultraviolet rays, peeled off, and developed to open the via hole 18a. Then, ultraviolet curing and heat curing are performed and the resin is cured to form the second insulating resin layer 21. I do.

Then, the surface of the second insulating resin layer 21 is subjected to electroless copper plating, and then a photosensitive insulating resin layer is formed on the electroless copper plating with a dry film or the like, and a pattern mask is brought into close contact with the substrate to expose. And developing to form an opening with a dry film resist. Thereafter, an electric current is caused to flow through the electroless copper plating layer to form an electrolytic copper plating layer in the opening including the above-described pattern for degassing. Thereafter, by removing and etching the photosensitive dry film resist, the thin copper portion of only the electroless copper plating layer is removed by etching, and the third wiring pattern 22 composed of electroless copper plating and electrolytic copper plating is formed. Form.

Next, a method for manufacturing a multilayer wiring board for electronic components according to a second embodiment of the present invention will be described.
The difference from the method for manufacturing a multilayer wiring board for electronic components according to the first embodiment is that a dead end space portion is formed in a space portion separating each lead of a wiring pattern in a plane, and an insulating resin layer is formed. When laminating the resin film thereon, the dead end space portion is bonded to the resin film made of polyethylene terephthalate before the other space portion connected to the dead end space portion. That is, the opening is formed such that the open side of the space portion comes in the direction in which the laminator or the like moves. In addition, the steps before and after the steps of the above method,
This is substantially the same as the method of manufacturing the multilayer wiring board for electronic components according to the first embodiment.

The inventor of the present invention has proposed a method of manufacturing a multilayer wiring board for electronic parts according to the first embodiment described above, in which a resin film is bonded to a substrate, and a method of bonding a resin film on the conventional space portion described above. A test was conducted to compare and evaluate the number of dents generated on the insulating resin layer.
As a result, the number of dents generated in the space portion shape of the present embodiment was 0.04 / sheet when 100 multilayer substrates having a size of 60 × 54 mm were examined. On the other hand, the number of dents generated in the conventional space portion shape is 6.8.
The number of pieces / sheet was generated. From this test result, it was confirmed that when the resin film was bonded to the space portion shape in the gas vent wiring pattern of the present embodiment, the rate of occurrence of dents generated on the insulating resin layer was extremely small.

[0018]

According to the multi-layer wiring board for electronic parts according to the first to third aspects, the space portion for separating the leads of each wiring pattern in a plane is provided with a gas venting portion for pushing out gas contained therein in a specific direction. Since the photosensitive insulating resin is applied on the unevenness of the wiring pattern layer surface, even if the unevenness along the unevenness of the wiring pattern layer surface remains on the photosensitive insulating resin surface, the resin film is At the time of lamination, air bubbles are eliminated between the photosensitive insulating resin surface and the resin film, and there is no hindrance to ultraviolet transmission at the time of exposure, and a fine via opening can be obtained. Also, there is no dent on the surface of the insulating resin layer,
There is no dipping into the plating solution during the plating operation, and there is no short circuit in the wiring pattern. Therefore, it is not necessary to reduce the thickness of the wiring pattern and suppress unevenness, and there is no problem that the conductor resistance generated by reducing the thickness of the conductor is increased, and the problem that the function of the semiconductor element is deteriorated does not occur. In addition, it is not necessary to increase the thickness of the photosensitive insulating resin layer to absorb the unevenness of the lower wiring pattern layer, and the formability of exposure and development is not impaired, so that a fine via can be obtained. In particular, in the electronic component multilayer wiring board according to the second aspect, since the gas venting portion has a projecting portion formed by extending a part of the space portion in a specific direction,
When a resin film is laminated, gas (air) between the photosensitive insulating resin surface and the resin film is easily released,
No bubbles are generated. Furthermore, in the multilayer wiring board for an electronic component according to the third aspect, since the gas venting portion has a converging portion that connects adjacent space portions and gathers in a specific direction, the gas on the converging portion is formed. Is easy to come off and no bubbles are generated.

According to a fourth aspect of the present invention, in the method of manufacturing a multilayer wiring board for an electronic component, a gas vent portion for extruding a gas contained in the space in a specific direction is formed in advance in the space portion to form a wiring pattern. Forming step, resin coating step of forming a photosensitive insulating resin layer on the wiring pattern, and laminating a resin film on the insulating resin layer while extruding gas between the insulating resin layer and the resin film in a specific direction A film laminating step of exposing the insulating resin layer from above the resin film, and then exposing and developing the photosensitive insulating resin layer after removing the resin film. When a resin film is laminated on the surface of the insulating resin, no air bubbles are generated between the photosensitive insulating resin surface and the resin film, and the ultraviolet rays at the time of exposure are surely transmitted. The can opening. Also, due to air bubbles,
There is no occurrence of dents on the surface of the insulating resin layer, the photosensitive insulating resin layer reliably follows the surface of the insulating resin layer, there is no immersion of electrolytic copper plating, and the problem of short-circuiting of the wiring pattern due to plating cover can be solved. Therefore, it is not necessary to reduce the thickness of the wiring pattern and suppress unevenness, and the problem that the conductor resistance of the wiring pattern does not increase and the function of the semiconductor element is reduced can be solved. Furthermore, it is not necessary to absorb the unevenness of the wiring pattern by increasing the thickness of the photosensitive insulating resin layer, and it is possible to solve the problem that the formability of exposure and development is impaired and a precise via cannot be obtained. .

According to a fifth aspect of the present invention, there is provided a method for manufacturing a multilayer wiring board for an electronic component, comprising: a resin coating step of forming a photosensitive insulating resin layer on a wiring pattern formed in advance; The resin film is laminated while extruding the gas between the insulating resin layer and the resin film in a specific direction such that the space of the blind lane is joined to the resin film before the other space connected to the space of the blind lane. Since it has a film laminating step and an exposure and development step of exposing the insulating resin layer from above the resin film and then removing the resin film and then developing the photosensitive insulating resin layer, Bubbles between the insulating resin surface and the resin film are reliably removed, and there is no hindrance to ultraviolet light transmission during exposure, and a predetermined via can be opened. In addition, there is no generation of dents on the surface of the insulating resin layer due to bubbles, no penetration of electrolytic copper plating, and no problem of short-circuiting of the wiring pattern due to plating coverage. Therefore, there is no need to take measures against bubbles by other means, and there is no side effect due to measures against bubbles. A method for manufacturing a multilayer wiring board can be provided.

[Brief description of the drawings]

FIG. 1 is a partially enlarged cross-sectional view illustrating a structure of a multilayer wiring board for electronic components according to an embodiment of the present invention.

FIG. 2 is a partially enlarged cross-sectional view for explaining a resin film bonding state of the multilayer wiring board for electronic components according to one embodiment of the present invention.

FIGS. 3A and 3B are enlarged plan views each showing a gas vent portion of the multilayer wiring board for electronic components according to one embodiment of the present invention.

FIG. 4 is a partially enlarged cross-sectional view showing a resin film bonded state of a conventional multilayer wiring board for electronic components.

[Explanation of symbols]

11: multilayer wiring board for electronic components, 12: core board material, 1
3: Through-hole, 14: First wiring pattern, 15:
Through-hole conductor, 16: hole filling resin, 17: first insulating resin layer, 18, 18a: via hole, 19: second wiring pattern, 20, 20a: via conductor, 21: second insulating resin layer, 21a : Photosensitive insulating resin layer, 22: third wiring pattern, 31: resin film, 32: space portion, 33: multilayer wiring portion, 34: converging portion, 35a, 35
b, 35c, 35d, 35e: Projection

Claims (5)

[Claims] 1. A core substrate material, and two or more wiring patterns provided on the core substrate material are formed via an insulating resin layer, and the upper and lower wiring patterns are electrically connected by vias. A multi-layer wiring board for an electronic component having a multi-layer wiring portion, wherein a space portion for separating each lead of each of the wiring patterns in a plane is provided with a gas vent portion for extruding gas contained therein in a specific direction. A multilayer wiring board for electronic components, characterized in that: 2. The electronic component multi-layer wiring board according to claim 1, wherein said gas venting portion has a projecting portion formed by extending a part of said space portion in a specific direction. Multilayer wiring board for components. 3. The multilayer wiring board for an electronic component according to claim 1, wherein the gas venting portion has a converging portion connecting the adjacent space portions and gathering in a specific direction. Multi-layer wiring board for electronic components. 4. On a core substrate material, two or more wiring patterns in which each lead is separated by a space portion are formed via an insulating resin layer, and the upper and lower wiring patterns are electrically connected by vias. A method for manufacturing a multilayer wiring board for a component, wherein the space portion is formed in advance with a gas vent portion for extruding a gas contained therein in a specific direction,
A wiring pattern forming step of forming the wiring pattern,
A resin coating step of forming a photosensitive insulating resin layer on the wiring pattern, a resin film on the insulating resin layer,
A film laminating step of laminating while extruding a gas between the insulating resin layer and the resin film in a specific direction,
Exposing the insulating resin layer from above the resin film, and then removing the resin film and then developing the photosensitive insulating resin layer. Manufacturing method of wiring board. 5. A two- or more-layered wiring pattern, in which each lead is partitioned by a space portion on a core substrate material and a dead end space portion is formed in the space portion, via an insulating resin layer. A method of manufacturing a multilayer wiring board for an electronic component, wherein the upper and lower wiring patterns are electrically connected by vias, wherein a resin coating for forming a photosensitive insulating resin layer on the previously formed wiring pattern is provided. Process, on the insulating resin layer, the bag lane space portion is joined to the resin film before the other space portion connected to the bag lane space portion, the resin film, the insulating resin layer and the resin A film laminating step of laminating while extruding gas between the film and a specific direction; exposing the insulating resin layer from above the resin film; Exposing and developing the photosensitive insulating resin layer after removing the film. A method for manufacturing a multilayer wiring board for electronic components, comprising: