JP2001307434A - Method and device for digital signal reproduction and semiconductor device used for the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To surely improve an error rate when data are reproduced again and rewritten to an area where an uncorrectable error occurs. SOLUTION: Part of a recording medium is reproduced faster than a standard speed to obtain reproduced data, which have errors corrected by using at least two kinds of error correction codes, and information showing the error correction is successful is stored. If some reproduced data can not have their error corrected, the part of the recording medium is reproduced fast to obtain reproduced data, which are rewritten based on the stored information showing that the error correction is successful.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital signal reproducing method and apparatus for reproducing a digital signal recorded on a recording medium, and more particularly to a digital signal reproducing method and apparatus in which error correction is performed on rows and columns of a data block. About. Further, the present invention relates to a semiconductor device used for the same.

[0002]

2. Description of the Related Art Generally, in a CD player or a DVD player, error correction is performed on rows and columns of a data block. As an example, FIG. 8 shows a configuration of a reproduction system circuit of a conventional DVD player system.

In FIG. 8, an optical pickup 2 irradiates a laser beam to an optical disk 1 to obtain a reproduction signal from reflected light. The digital demodulation / disk discrimination circuit 3 connected to the optical pickup 2 detects binary data from the reproduced signal and performs digital demodulation.

[0004] Digitally demodulated reproduced data is input to an error correction section 20. The PI error correction unit 21 of the error correction unit performs error correction using inner parity (inner code), and the PO error correction unit 22 performs error correction using outer parity (outer code). For these error corrections, a large-capacity correction memory 31 is used. The memory block 30 includes a large-capacity track buffer memory 32 in addition to the correction memory 31. The reason why the large-capacity track buffer memory 32 is required is as follows.
This is to ensure a constant data output rate even when a correction process, data retransmission process, or the like is performed.

The error-corrected data stored in the track buffer memory 32 is sent to the MPE via the AV output unit 12.
The video data (V) and the audio data (A) are obtained by decoding by the G decoder 7. Video data is
The video signal is input to a video signal DA converter 9 via a video encoder 8. The audio data is input to the audio signal DA converter 10.

Even if the above error correction is performed,
In some cases, data errors cannot be completely repaired. For example, when reproducing a bad disk or a disk with scratches, the error rate of the reproduced data exceeds the error correction capability. In such a case, it is conceivable that the same location on the disc is reproduced several times and the reproduced data is taken in again.

Japanese Patent Application Publication (JP-A) Hei 11-
The digital signal reproducing apparatus disclosed in 205157 performs a retry when the result of the error correction processing cannot be corrected. In the retry, access is performed by designating a sector including uncorrectable data of the same block on the disk, rewriting data only in the uncorrectable sector, and performing the correction process again. In this case, a sector for which rewriting is not specified clears the write flags of all columns, and a sector for which rewriting is specified clears the write flags after writing data for each column.

[0008]

However, if all data contained in each column is rewritten in a sector for which rewriting is specified, correct data is also rewritten.
There is a problem that a new error occurs.

In view of the above, the present invention provides a digital signal reproducing method and a digital signal reproducing method capable of reliably improving an error rate when reproducing and rewriting data in an area where an uncorrectable error has occurred. It is intended to provide a device. Still another object of the present invention is to provide a semiconductor device used for the same.

[0010]

In order to solve the above-mentioned problems, a digital signal reproducing method according to the present invention is a method for reproducing a digital signal recorded on a recording medium using at least two types of error correction codes. (A) reproducing a portion of the recording medium at a speed higher than the standard speed to obtain reproduction data; and (b) reproducing the data obtained in the step (a) using at least two types of error correction codes. Error correcting the data; (c) step (b)
Information on the success or failure of error correction in
(D) storing the type of error correction code for each predetermined data unit; and (d) when there is reproduction data whose error could not be corrected in step (b), reproducing the above portion of the recording medium again at high speed. Obtaining reproduction data; (e) performing error correction on the reproduction data obtained in step (d) using at least two types of error correction codes; and (f) storing the error correction code stored in step (c). Rewriting the error-corrected reproduced data in step (b) to the error-corrected reproduced data in step (e) based on information on the success or failure of error correction.

Here, the step (f) is a step in which, in step (b), the reproduced data whose error could not be corrected using any of at least two types of error correcting codes is reproduced in step (e). It is desirable to rewrite the data.

A digital signal reproducing device according to the present invention is a device for reproducing a digital signal recorded on a recording medium by using at least two types of error correction codes. Reproducing means for reproducing and obtaining reproduced data; error correcting means for performing error correction on reproduced data obtained by the reproducing means using at least two types of error correction codes; and error-corrected reproduced data And memory means for storing information on the success or failure of error correction in the error correction means for at least two types of error correction codes for each predetermined data unit. Controlling the reproducing means so as to obtain the error, and controlling the error correcting means so as to correct the error of the reproduced data. Control means for controlling the reproducing means so as to obtain reproduction data by reproducing the above portion of the recording medium again at a high speed when the data exists, and controlling the error correction means so as to correct an error of the reproduction data; The information on the success or failure of the error correction is stored in the memory means together with the reproduced data corrected by the error correction means, and when the reproduced data is obtained again, based on the information on the success or failure of the error correction stored in the memory means, Data rewriting control means for rewriting the reproduced data once obtained to the reproduced data obtained again.

Further, a semiconductor device according to the present invention is a semiconductor device used in a device capable of reproducing a digital signal recorded on a recording medium at a speed higher than a standard speed using at least two types of error correction codes. An error correction means for performing error correction of the reproduced data using at least two types of error correction codes; and storing the error-corrected reproduced data and storing information on the success or failure of the error correction in the error correction means. A memory means for storing a predetermined data unit for each type of error correction code, and an error correction means for performing error correction on reproduced data obtained by reproducing a part of the recording medium at high speed, and If there is reproduction data that could not be corrected, error correction is performed on reproduction data obtained by reproducing the above portion of the recording medium again at high speed. Control means for controlling the error correction means, and information relating to the success or failure of the error correction together with the reproduced data corrected by the error correction means in the memory means. Data rewriting control means for rewriting the reproduced data once obtained with the reproduced data again based on the information on the success or failure of the error correction.

In the above, it is desirable that the data rewriting control means rewrite the reproduced data whose error could not be corrected by using any of at least two types of error correcting codes, to the reproduced data obtained again. Also, at least 2
The type of error correction code may include a column correction code and a row correction code in a two-dimensional error correction block.

According to the present invention constructed as described above, when data is reproduced and rewritten in an area where an uncorrectable error has occurred, the data which is determined to be correct among previously reproduced data is Since rewriting is not performed, the error rate can be reliably improved.

[0016]

Embodiments of the present invention will be described below with reference to the drawings. Note that the same elements are denoted by the same reference numerals and description thereof is omitted.

FIG. 1 is a block diagram showing a digital signal reproducing apparatus according to one embodiment of the present invention. In the present embodiment, the present invention is applied to a DVD player system.

In FIG. 1, the digital signal reproducing apparatus has an optical pickup 2 for reading a signal recorded on an optical disk 1. The optical disk 1 and the optical pickup 2 are driven by a drive mechanism 6. The rotation speed of the optical disk 1 and the optical disk 1 and the optical pickup 2
The drive control unit 5 controls the drive mechanism 6 in order to define the relative position with respect to.

The optical pickup 2 irradiates the optical disc 1 with laser light and obtains a reproduction signal from the reflected light. The reproduction signal obtained from the optical pickup 2 is binarized and digitally demodulated in a digital demodulation / disc discriminating circuit 3 and input to the signal processing IC 100 as reproduction data.

A large capacity buffer memory 11 is connected to the signal processing IC. Using this buffer memory 11, the error correction unit 101 performs error correction of the reproduced data. The error correction access control unit 106 controls an access operation of the error correction unit 101 by generating an address for error correction. Further, the output access control unit 108 generates an address for outputting data from the buffer memory 11. Furthermore, upper address generation /
The access control unit 110 controls access to the buffer memory 11 by generating an upper address based on the addresses generated by these access control units.
Further, the sector pointer storage unit 109 stores a sector pointer for designating a sector in the buffer memory 11.

The data after the error correction is output from the AV output unit 111 of the signal processing IC, and is output to the MPEG decoder 7. In the MPEG decoder 7, the data encoded by the high-efficiency encoding is decoded,
Normal video data (V) and audio data (A)
Get. The video data is encoded in a video encoder 8 according to a system such as NTSC or PAL, and is converted into an analog video signal in a video signal DA converter 9. On the other hand, the audio data is supplied to the DA converter 10 for audio signals.
It is converted to an analog audio signal. The overall control of the main components is performed by the overall control unit 4.

In the DVD format, error correction using an inner parity (inner code) PI and error correction using an outer parity (outer code) PO are performed. Here, the data structure in the DVD format will be described with reference to FIGS. As shown in FIG. 2, one correction (ECC) block includes 16 sectors. As shown in FIG. 3, one sector is 1
It includes 72 columns and 12 rows of data bytes, and 172 columns of data bytes for 10 columns of row parity bytes PI
Is added. One correction block is 172
192 rows of data bytes, 172 rows of data bytes are added with 10 rows of parity bytes PI, and 192 rows of data bytes (16 sectors) are 16 rows of column parity. A byte PO is added.

Even if error correction is performed using such a parity byte, a data error may not be completely repaired. For example, when reproducing a bad disk or a disk with scratches, the error rate of the reproduced data exceeds the error correction capability. In this embodiment, since a large-capacity buffer memory is provided,
To reproduce the data at high speed and store the data in the buffer memory.If the tracking becomes bad or an error occurs, reread the same part on the disk and retransmit the data, and overwrite the buffer memory with the correct data. It is possible. Even when rereading is performed, a predetermined data transfer rate can be ensured unless the buffer memory becomes empty.

When the above rereading is performed in units of correction blocks and the buffer memory is refilled with new data,
Even data that was correctly read during the previous reading is re-filled with new data. However, rereading does not always improve data quality. If the error is caused by shock or temporary noise, the data quality is improved by re-reading, but if the error is caused by a bad data source, the data quality is considered to be relatively unchanged. That is, at the same time that there is data to be recovered by re-reading, there is a possibility that the data correctly read at the time of the previous reading may cause an error.

Therefore, in this embodiment, the data rewriting control unit 107 as shown in FIG. 1 is provided, and the success or failure of the data read is checked for each row and each column.
As a result, for the row and column for which no error was found in the previous reading, the data in the buffer memory is not overwritten, so that the data quality can be reliably improved.

FIG. 4 shows a memory configuration for one block in the digital signal reproducing apparatus according to the present embodiment. In the buffer memory 11, in addition to the data area 41, the row parity area 42, and the column parity area 43, a PI flag area 44 for storing a flag (PI flag) indicating a row correction result, and a flag indicating a column correction result And a PO flag area 45 for storing (PO flag). Then, a flag (black mark) is placed on the row and column where the error correction failed.
When the disk is read again, the data is overwritten while referring to these flags. Therefore, it is possible to protect data that could be corrected at the time of the previous reading, and rewrite only data that could not be corrected at the time of the previous reading.

Next, the configuration of the data rewrite control unit 107 for protecting data in rereading data will be described with reference to FIG. In FIG. 5, an error correction unit 101 performs error correction on a row and a column of a correction block. The error correction unit 101 outputs, to the flag write control unit 102, error correction result information indicating whether error correction was possible for each of the row error correction and the column error correction. The flag writing control unit 102
Based on this information, a PI flag is written in the PI flag area 44 shown in FIG.

If error correction cannot be performed on the buffered data, the error correction unit 101
This is reported to the overall control unit 4 and the overall control unit 4 is notified.
Controls the drive control unit 5 so that the data is read again (see FIG. 1). When the reproduction data is obtained, the error correction unit 101 performs error correction on the rows and columns of the correction block again. At this time, the flag read / data protection determination unit 103 determines whether the buffer memory write address information input from the error correction unit 101 is
Based on the PI flag and the PO flag stored in No. 1, it is determined whether each data should be rewritten or protected. For the data to be rewritten in the correction block, the flag read / data protection judgment unit 103 sets the error correction access control unit 1
In step 06, a write enable signal is output.

Next, the outline of the PI correction processing in this embodiment will be described with reference to FIG. The PI correction process is performed based on the reproduction data from the disc and the data stored in the buffer memory.

First, in step S1, it is confirmed whether or not the current process is a re-read process. If the current process is a re-read process, in step S2,
The PI and PO flags of the block to be reread are read. On the other hand, if the current processing is not the re-reading processing, in step S3, these flags are ignored, and a mode is set in which all data is read from the disk.

If one correction block has K rows and M columns, the PI flag has K bits and the PO flag has M bits.
It has bit information. In each bit of the PI and PO flags, for example, “1” indicates a successful correction (data to be protected), and “0” indicates a failed correction.

Next, in step S4, an address used for writing the reproduction data from the disk to the buffer memory is generated. Further, in step S5, it is determined based on the PI and PO flags whether or not the address indicates a write-protected memory cell. If the address indicates a memory cell that is not a write protection target, in step S6, the reproduction data from the disc is selected and output to the syndrome circuit in the error correction unit 101 (FIG. 5). On the other hand, if the address indicates a memory cell to be write-protected, data of the address is read from the buffer memory and output to the syndrome circuit in step S7. When data is read from the buffer memory, the time is shorter than when data is read from the disk, so that there is no problem that time is over.

Next, in step S8, syndrome calculation is performed while reading one row of data. When the syndrome calculation for one row is completed, the error position in the row, the number of errors, and the error state are determined. If correction is possible, the error data in that row is rewritten with correct data. In step S9, the data is 1
It is monitored whether it is the last data in the row, and if it is not the last data, the process returns to step S4.

Next, in step S10, a correction address is calculated. Further, in step S11,
It is checked whether the data to be corrected is stored in the write-protected memory cell. When the data to be corrected is stored in the write-protected memory cell, the result of the current correction is inconsistent with the result of the previous correction.
In such a case, there is a possibility that an address error has occurred at the time of reading data from the disk. Therefore, the process proceeds to step S15 while prioritizing the previous correction result and ignoring the current correction result.

If the data to be corrected is not stored in the write-protected memory cell, the result of the PI correction is determined in step S13. If the correction is successful, the flow advances to step S14 to set the PI flag of the row to "1". If the correction has failed, the process proceeds to step S15, where the PI
The flag is set to “0”.

When the above processing is repeated for K rows, the PI correction of one correction block is completed. Since the data reproduced from the disc is continuously input to the correction block, the syndrome calculation and the execution of the correction processing may be performed simultaneously. In that case, during the correction process,
The syndrome calculation for the next line has already started. In step S16, it is monitored whether or not the row is the last row of one correction block. If it is not the last row, the process returns to step S4. If it is the last row, step S1 is performed.
In step 7, a process of writing the PI flags of the first to Kth rows to the buffer memory is performed.

Next, the outline of the PO correction processing in the present embodiment will be described with reference to FIG. The PO correction process is performed based only on the data stored in the buffer memory. First, in step S21, it is confirmed whether or not the current process is a re-read process. If the current process is a re-read process, step S22
, The PI and PO flags of the PO correction processing target block are read. On the other hand, if the current processing is not the re-reading processing, in step S23, the mode is set to a mode in which the PO correction processing of all the columns is performed ignoring these flags.

Next, in step S24, a column address to be corrected is generated. Further, step S2
At 5, based on the PO flag, it is determined whether the previous correction of the column to be corrected was successful or failed. If the previous correction was successful, in step S26, the process is skipped and step S2
Returning to step 4, the process proceeds to the next column to be corrected.

If the previous correction has failed, in step S27, the data at the address is read from the buffer memory and output to the syndrome circuit. Next, in step S28, syndrome calculation is performed while reading data for one column. When the syndrome calculation for one column is completed, an error position in the column,
The number of errors and the error state are determined. If correction is possible, the error data in that column is rewritten with correct data.
In step S29, it is monitored whether the data is the last data in one column, and if not, the process returns to step S27.

Next, in step S30, a correction address is calculated. Further, in step S31,
The PO correction result is determined, and if the correction is successful, step S
The process proceeds to step S32, where the PO flag of the line is set to "1". If the correction has failed, the process proceeds to step S33 to set the PO flag of the line to "0".

When the above processing is repeated for M columns, the PO correction of one correction block is completed. In step S34, it is monitored whether or not this column is the last column of one correction block.
7, and if it is the last column, in step S35,
A process for writing the PO flags in the first to M columns into the buffer memory is performed.

Here, the details of data protection in rereading data will be described. Focusing on one-line processing, data is input one byte at a time from the disk, and data for a total of M bytes is input. When the data currently being processed is the i-th row and the j-th column, the bits PIFLG (i) and P of the PI flag corresponding to the row and the column are set.
Read the O flag bit POFLG (j). According to these values, cases can be classified as follows. (1) If PIFLG (i) = 0 and POFLG (j) = 0, the data is to be read again. (2) When PIFLG (i) = 1 and POFLG (j) = 1, the data is protected. (3) In the case where PIFLG (i) = 0 and POFLG (j) = 1, it is highly likely that even NG has been corrected by PO correction at the time of PI correction, it is a protection target. (4) In the case of PIFLG (i) = 1 and POFLG (j) = 0, it is OK at the time of PI correction and NG at the time of PO correction, but NG of PO correction occurs in another row. Therefore, in the present embodiment, they are protected.

Further, the fact that all the PIFLGs for a certain column are "1" means that the entire data contained in that column is OK.
You do not need to use. Generally, the syndrome calculation and the correction processing may be performed on the column in which the POFLG is “0”. It should be noted that a PO correction calculation result that corrects data in a row where PIFLG is “1” should not occur, but when reading data from a disk, the row data may be lost due to a head jump or the like. Since it is not possible to deny the possibility that the data is entirely written to another row address, it is preferable to give priority to the PO correction calculation result.

[0044]

As described above, according to the present invention, when data is reproduced and rewritten in an area where an uncorrectable error has occurred, it is determined that the data is correct among previously reproduced data. Is not rewritten, so that the error rate can be reliably improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a digital signal reproducing apparatus according to one embodiment of the present invention.

FIG. 2 shows a correction block in a DVD format,
It is a figure showing the sector contained in it.

FIG. 3 is a diagram showing a structure of one correction block in a DVD format.

FIG. 4 is a diagram showing a memory configuration for one block according to an embodiment of the present invention.

FIG. 5 is a diagram illustrating a configuration of a data rewrite control unit according to an embodiment of the present invention.

FIG. 6 is a diagram illustrating a PI correction process according to an embodiment of the present invention.

FIG. 7 is a diagram illustrating a PO correction process according to an embodiment of the present invention.

FIG. 8 is a block diagram showing a configuration of a reproduction system circuit of a conventional DVD player system.

[Explanation of symbols]

 Reference Signs List 1 optical disk 2 optical pickup 3 digital demodulation circuit 4 overall control unit 5 drive control unit 6 drive mechanism 7 MPEG decoder 8 video encoder 9 DA converter for video signal 10 DA converter for audio signal 11 buffer memory 41 data area 42 row parity area 43 column parity area 44 PI flag area 45 PO flag area 100 signal processing IC 101 error correction unit 102 flag write control unit 103 flag read / data protection determination unit 106 error correction access control unit 107 data rewrite control unit 108 output access control Unit 109 sector pointer storage unit 110 upper address generation / access control unit 111 AV output unit

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) G11B 20/18 572 G11B 20/18 572C 572F G06F 11/10 330 G06F 11/10 330L H03M 13/29 H03M 13/29

Claims (9)

[Claims] 1. A method of reproducing a digital signal recorded on a recording medium using at least two types of error correction codes, comprising: (a) reproducing a part of the recording medium at a higher speed than a standard speed; Obtaining data; and (b) using the at least two types of error correcting codes,
(C) storing information on the success or failure of the error correction in step (b) for each of the at least two types of error correction codes for each predetermined data unit; (D) when there is reproduction data whose error could not be corrected in step (b), reproducing the portion of the recording medium again at high speed to obtain reproduction data; Using two types of error correction codes,
(F) performing error correction of the reproduced data obtained in step (d); and (f) reproducing the error-corrected reproduced data in step (b) based on the information on the success or failure of the error correction stored in step (c). Rewriting the reproduced data with the error-corrected reproduction data in step (e). 2. A method according to claim 1, wherein in step (f), the reproduction data whose error has not been corrected using any of the at least two types of error correction codes in step (b) is reproduced in error correction in step (e). The method of claim 1, comprising rewriting to data. 3. The method according to claim 1, wherein the at least two types of error correction codes include a column correction code and a row correction code in a two-dimensional error correction block. 4. An apparatus for reproducing a digital signal recorded on a recording medium using at least two kinds of error correction codes, wherein reproduction data is obtained by reproducing the recording medium at a speed higher than a standard speed. Possible reproducing means, error correcting means for performing error correction on the reproduced data obtained by the reproducing means using the at least two types of error correcting codes, and storing the error-corrected reproduced data, Memory means for storing information on the success or failure of error correction in the correction means for each of the at least two types of error correction codes in a predetermined data unit; The error correcting means is controlled so as to perform the error correction of the reproduced data while controlling the reproducing means. Control means for controlling the reproducing means so as to obtain reproduced data by reproducing the portion of the recording medium again at a high speed, and controlling the error correcting means to correct an error in the reproduced data, The information on the success or failure of the error correction is stored in the memory means together with the reproduced data error-corrected by the error correction means, and when the reproduced data is obtained again, the information on the success or failure of the error correction stored in the memory means is stored in the memory means. Data rewriting control means for rewriting the once obtained reproduction data to the once again obtained reproduction data based on the reproduction data. 5. The data rewriting control means rewrites reproduced data whose error could not be corrected by using any of the at least two types of error correcting codes to reproduced data obtained again. Item 5. The apparatus according to Item 4. 6. The apparatus according to claim 4, wherein the at least two types of error correction codes include a column correction code and a row correction code in a two-dimensional error correction block. 7. A semiconductor device used in a device capable of reproducing a digital signal recorded on a recording medium at a speed higher than a standard speed using at least two types of error correction codes, wherein Error correction means for performing error correction of reproduced data using an error correction code, and storing the error-corrected reproduced data, and information on the success or failure of the error correction by the error correction means. And a memory means for storing for each predetermined data unit, and controlling the error correction means to perform error correction of reproduction data obtained by high-speed reproduction of a part of the recording medium,
If there is playback data that could not be corrected,
Control means for controlling the error correction means so as to perform error correction on reproduced data obtained by reproducing the portion of the recording medium again at a high speed; and Information on success or failure is stored in the memory means, and when reproduction data is obtained again, the reproduction data once obtained is reproduced based on the information on the success or failure of error correction stored in the memory means. The semiconductor device, comprising: data rewrite control means for rewriting data. 8. The data rewriting control means rewrites reproduced data whose error could not be corrected by using any of the at least two types of error correcting codes, to reproduced data obtained again. Item 8. The semiconductor device according to item 7. 9. The semiconductor device according to claim 7, wherein the at least two types of error correction codes include a column correction code and a row correction code in a two-dimensional error correction block.