JP2001291484A - Arithmetic image processing unit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an image processing unit, which has a function to continue an image processing even during a modification time, when performing a reconfiguration. SOLUTION: The means to process an image data of a sample image, which is based on a charged particle beam is radiation, is comprised of: plural programmable logic devices of reconfigurable type, where digitized image data are supplied; a means to selectively supply the configuration data to each programmable logic device; and a means to extract the outputs that are not in the process of configuration in plural programmable logic devices.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus, and more particularly, to an image processing apparatus such as a scanning electron microscope or a transmission electron microscope which performs image calculation processing such as filtering on an image of a sample obtained by scanning a charged particle beam. The present invention relates to an image processing device.

[0002]

2. Description of the Related Art In recent years, various programmable logic devices (hereinafter referred to as PLDs) have been
) Has been commercialized, and is widely used in, for example, an image processing unit of an image processing apparatus. A PLD is basically an aggregate of logic elements such as a look-up table, an AND gate, an OR gate, and a flip-flop element. The PLD has various functions by allowing a user to select an element and provide data on wiring information between the elements. It is a device that can create a circuit. The operation of selecting elements and loading data of wiring information between elements to create various functional circuits inside the device is called configuration. Various types of image processing such as spatial filtering, recursive averaging image addition, and two-image addition / subtraction image calculation are available as image calculation processing by the image processing device. Configuration data for performing each calculation is prepared. Have been. Then, by selecting desired data from among them and performing configuration, a plurality of types of image arithmetic processing can be performed by one PLD.

FIG. 3 shows an example of a basic configuration of an image processing unit of an image processing apparatus using a PLD. The image processing unit 1 includes a PLD 2, ROMs (read only memories) 3 and 4 storing configuration data, and a configuration controller 5. The processing target image data input to the input terminal of PLD2 is PLD2
After performing the desired image calculation processing set in, the digital image signal is output from the output terminal of the PLD 2 as a digital output signal.

The ROM 3 previously stores configuration data for creating an arithmetic processing circuit for performing the image processing A, that is, data Da of element selection and wiring information between the elements. Configuration data Db to be executed is stored.
When an external computer requests a configuration specifying one of the data, for example, Da, the configuration controller 5 outputs the specified configuration data Da from the ROM 3 to execute the configuration. When the data Da is loaded by the configuration, the PLD 2 has a circuit configuration for performing the image processing A, and thereafter performs the image calculation processing A on the input image data and outputs the data. Next, when an external computer requests a configuration specifying the other data Db, the configuration controller 5 causes the specified configuration data Db to be output from the ROM 4 to execute the configuration. When data Da is loaded by the configuration, P
LD2 has a circuit configuration for performing image processing B, and thereafter,
It performs image processing B on the input image data and outputs it.

[0005]

As described above, P
The configuration of the LD 2 requires a certain amount of change time (for example, about several tens to hundreds of ms) from the stop of the processing that has been executed until that time, the loading of new configuration data, and the start of image calculation processing. There is an unavoidable stop of the image processing during the configuration change time. Data rate of image processing is 1 pixel 1
In about 00 ns, the amount of pixel data for which image processing cannot be performed during the configuration change time described above is a considerable amount of several hundred thousand pixels. Further, depending on the content of the image processing, when the reconfiguration request is frequently made, the ratio of time during which the image processing cannot be performed is further increased.
For example, in image processing at a video rate for handling moving images, the reconfiguration time exceeds the blanking time between frames, and data is lost in a part of one or more continuous frames or one or more frames.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problem, and provides an image processing apparatus having a function of continuing image processing even during a change time when performing reconfiguration. It is intended to be.

[0007]

To achieve this object, the present invention provides a means for obtaining and digitizing an image signal of a sample image based on charged particle beam irradiation, and a means for arithmetically processing digitized image data. And an image processing apparatus having an image memory for storing calculated image data, wherein the image data calculation processing means includes a plurality of reconfigurable programmable logic devices to which digitized image data is supplied together. And means for selectively supplying configuration data to each programmable logic device, and means for extracting an output of a non-configured one of the plurality of programmable logic devices.

[0008]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 shows a PL according to the present invention.
5 shows an example of an image calculation processing unit of an image processing apparatus using D. In FIG. 1, two P
LD 11, 12, three ROMs storing configuration data, ROM (A), ROM (B), ROM (C) and a selector for selectively transmitting any of the data of the three ROMs to the PLD 11 or 12. 13, a configuration controller 17. Image data is PL
The signals are input in parallel to D11 and D12, and the PLDs 11 and 12 respectively perform image calculation processing. The configuration controller 17 outputs the output signals 18a and 1 of each PLD.
8b is selected and taken out, and sent to, for example, an image memory (not shown) for storing processed image data, an image processing unit at the next stage, or the like.

The operation in such a configuration will be described with reference to the flowchart of FIG. First, it is assumed that the configuration data Da of the ROM (A) is loaded in the PLD 11 at the time to as an initial state, and the image calculation processing A is being executed in the PLD 11 (FIG. 2A). , (B)). The configuration controller 17 selects the output signal 18a from the PLD 11, extracts the image data that has undergone the image operation processing A, and sends it to, for example, an image memory (not shown), as shown in FIG. I have.

At time t1, when an external computer receives a configuration request specifying new image processing B, the configuration controller 17
P that had not been configured before
The data Db for image processing B is loaded into the LD 12. That is, the configuration controller 17 causes the data Db for image processing B to be read from the ROM (B), and the data to be read from the PLD 12 via the selector 13.
And configure it (see Figure 2)
(C)).

When the loading of the data Db is completed, the PLD 12 generates a configuration completion signal 19b and sends it to the configuration controller 17, as shown in FIG. Upon receiving the completion signal 19b, the configuration controller 17 extracts the image data to be extracted from the output signal 18a from the PLD 11 based on the output signal 18b from the PLD 12 at the time t2 when the image processing A continued in the PLD 11 is delimited. Switch to. For this reason, after time t2, the image data subjected to the image processing B is extracted from the configuration controller 17 and sent to an image memory (not shown) as shown in FIG.

Next, at time t3, when a configuration request specifying new image processing C is received from an external computer, the configuration controller 17
The data Dc for image processing C is loaded into the PLD 11. That is, the configuration controller 17 causes the data Dc for image processing C to be read from the ROM (C), and reads the data Dc via the selector 13 into the PLD 11.
And configure it.

When the loading of the data Dc is completed, the PLD 11 generates a configuration completion signal 19a and sends it to the configuration controller 17, as shown in FIG. Upon receiving the completion signal 19a, the configuration controller 17 extracts the image data to be taken out at time t4 at which the image processing B continued in the PLD 12 is separated from the output signal 18b from the PLD 12 based on the output signal of the PLD 11. Switch to 18a. Therefore, after time t4, the configuration controller 17
As shown in FIG. 2 (d), the image data subjected to the image processing C is taken out and sent to, for example, an image memory (not shown).

According to the present invention, since the output signal of the current image processing is output until the new configuration is completed, the image processing does not stop every time a configuration request is made. The process can smoothly proceed to the next image calculation process without interruption. Needless to say, it is necessary to issue a new configuration in advance in consideration of the configuration change time.

The embodiment of FIG. 1 has been described with reference to FIG. 2. However, the present invention is not limited to the above embodiment, and various modifications are possible. For example, in the above embodiment, two PLDs are used, but three or more PLDs may be used. Also, one configuration data is stored in one ROM, but a plurality of data may be obtained in one ROM, or the configuration data may be obtained from an external computer instead of the ROM. Data may be supplied.

[0016]

As is clear from the above description, in the present invention, a plurality of PLDs are used to selectively extract output signals, so that even when a new configuration request is made, image calculation processing is performed. This eliminates the period during which the image calculation processing is stopped due to the switching, and allows a smooth transition to the next image calculation processing without interruption.

[0017]

[Brief description of the drawings]

FIG. 1 is a configuration diagram illustrating an embodiment of an image calculation processing unit of an image processing apparatus according to the present invention.

FIG. 2 is a timing chart for explaining the operation of the present invention.

FIG. 3 is a configuration diagram of an image calculation processing unit of a conventional image processing apparatus.

[Description of Signs] 10: Image calculation processing unit, 11, 12: Programmable logic device (PLD), 17: Configuration controller, 13: Selector, ROM (A), ROM (B), RO
M (C): Read only memory (ROM)

Claims (1)

[Claims] 1. An image comprising means for obtaining and digitizing an image signal of a sample image based on charged particle beam irradiation, means for arithmetically processing digitized image data, and an image memory for storing the computed image data In the processing apparatus, the image data arithmetic processing means includes a plurality of reconfigurable types of programmable logic devices to which digitized image data is supplied together, and selectively supplies configuration data to each programmable logic device An image processing apparatus comprising: means for extracting output of a configuration not being configured in a plurality of programmable logic devices;