JP2001267518A - Ferroelectric memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high reliablility terroelectric memory which enables high integration. SOLUTION: A ferroelectric memory has a ferroelectric capacitor having a non-Pb system ferroelectric film and a perovskite type oxide electrode. At least one layer of the oxide electrode is an oxide expressed by ABxOy (0.5<x<1.0, 1.5<y<3.3). The ferroelectric capacitor is a ferroelectric capcitor having an MFM structure or an electrolytic effect type ferroelectric capacitor with an MFS structure, an MFMIS structure and an MFIS structure. At least one layer of the oxide electrode is formed of SrRu0.95 O3.1, for example.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a nonvolatile memory device using a ferroelectric thin film.

[0002]

2. Description of the Related Art A non-volatile memory utilizing the ferroelectricity of a dielectric thin film is expected to be applied to non-contact cards (RF-ID, TAG) and the like in addition to general-purpose non-volatile memories with low power consumption. . As this nonvolatile memory, a type in which an MFM (metal-ferroelectric-metal) structure is formed on a MOS transistor has been put to practical use. The field effect element which becomes the ultimate non-destructive memory includes an MFS (metal-ferroelectric-silicon) structure, an MFMIS (metal-ferroelectric-metal-insulator-silicon) structure, or MFIS.
A field effect type ferroelectric element having a (metal-ferroelectric-insulator-silicon) structure has been proposed. In these structures, a conductive oxide may be used instead of the metal electrode (M).

[0003] Ferroelectric memories having an MFM structure are most commonly proposed because they are relatively easy to form.
Since the read operation and the write operation consist of the same operation of reversing the polarization, recording is lost in the read operation, and a rewrite operation is necessarily required. In contrast, M
In the FS structure, the formation of the interface becomes more severe because the interface control becomes more severe. However, since the reading of the charge between the source and the drain does not involve polarization reversal, the writing operation is not required, and the advantage that the recording can be read any number of times is obtained. is there. Also, MF
Even in the MIS structure and the MFIS structure, the charge between the source and the drain is read out through the amount of charge accumulated in the gate insulating film (I), so that the write operation is not necessary.

In the devices having these structures, the ferroelectric material is PZT (Pb (Zr, Ti) O ₃ ), PLZT
((Pb, La) (Zr, Ti) O ₃ ), PLT ((P
b, La) a ferroelectric containing Pb (lead) such as TiO ₃ ) or a layered compound containing Bi (bismuth) SrBi ₂ (Ta, Nb) ₂ O ₉ , a layered compound not containing Bi Sr ₂ (Ta, Nb) ₂ O _{7 and the} like are known. Of these, ferroelectrics containing Pb have environmental problems in the process and require recovery of device products. Therefore, it is desirable to use non-Pb-based ferroelectrics in the future. Further, in a device using a ferroelectric film of a layered compound, no change in ferroelectricity is observed even when the number of times of rewriting is increased.

On the other hand, regarding the electrode material, conventionally, Pt
(Platinum) has been mainly used. This is because the reactivity between Pt and the oxide is low and a ferroelectric can be formed stably. However, as memory elements using ferroelectrics have become more highly integrated, a process for forming interlayer films and wirings with higher reducibility has been introduced, and a sintering process (stabilization in hydrogen) for stabilizing transistor characteristics has been introduced. (Heat treatment). In such a process, when Pt is used as an electrode material, the catalytic action of Pt accelerates the damage caused by hydrogen, which causes a problem that the ferroelectric characteristics are remarkably deteriorated. Another problem is that noble metals are expensive and hinder cost reduction. For this reason, it has been proposed to use an oxide conductor as an electrode material. This is because the oxide conductor has no catalytic action, and hydrogen damage to the ferroelectric is reduced.

[0006]

Heretofore, a simple perovskite-type oxide ferroelectric film such as PZT has been formed above and below a ferroelectric film.
Similarly, as an oxide conductor laminated as an electrode, SrRu having a simple perovskite structure (ABO ₃ )
O ₃ , LaSrCoO _{3 and the} like have been considered desirable.
However, in the case of lamination with a ferroelectric film formed of a layered compound, distortion of crystal lattice matching at the interface between the ferroelectric and the electrode is small, so that SrRuO ₃ , LaS
An electrode material such as rCoO ₃ cannot be said to be effective.

[0007] Since the crystal structure does not match at the lamination interface with the layered compound, there is no advantage due to lattice matching.
Conversely, SrRuO ₃ and LaSrCoO ₃ constituting the electrodes
There is a problem that excessive Ru (ruthenium) or Co (cobalt) diffused from the silicon deteriorates the dielectric characteristics of the ferroelectric film. For example, if excess Ru is volatilized, separation occurs because a cavity is formed at the interface. Also, the diffused R
u generates an oxide crystal such as RuO _{2 during} the heat treatment during the integration, which hinders the lamination.

Further, when these electrode materials are used,
It was noted that the reliability of the device was reduced. The cause is that the resistance value of the conductor increases, and it becomes impossible to follow high-speed switching operation as the wiring capacitance increases,
It is alleged that the limitation on the sense timing has been reduced.

In view of the above problems, the present invention provides a nonvolatile memory which is highly reliable and can be highly integrated by forming an electrode from a perovskite oxide having an optimum composition ratio. The purpose is to:

[0010]

A ferroelectric memory according to the present invention includes a ferroelectric capacitor having a non-Pb-based ferroelectric film and a perovskite oxide electrode. At least one layer of the oxide electrode of the ferroelectric capacitor is ABxOy
(0.5 <x <1.0, 1.5 <y <3.3). The ferroelectric capacitor is, for example, M
This is a ferroelectric capacitor having an FM structure. Alternatively, it may be a field effect type ferroelectric capacitor having an MFS structure, an MFMIS structure, or an MFIS structure.

The ferroelectric film of the capacitor is preferably a compound having a layered structure. By using a ferroelectric film of a layered compound, a ferroelectric memory with a large number of rewrites can be formed. When the layered compound contains bismuth (Bi), the driving voltage can be reduced. In addition, a ferroelectric film can be formed on various electrode materials even at a relatively low film formation temperature of 600 to 800 ° C.

When the ferroelectric film and the electrode material contain the same element, the effect of the interdiffusion of the elements can be almost ignored, so that no problem occurs even in the heat treatment at a high temperature. In particular,
When at least one of Sr and Ba is contained as the A-site ion, it is advantageous that defects in the ferroelectric crystal lattice hardly occur. The diffusion from the electrode material to the ferroelectric film is
This is preferable because it compensates for the A-site defect of the ferroelectric substance. However, if the amount of diffusion increases, the characteristics of the ferroelectric substance may deviate from the design. Therefore, the composition x of the ABxOy-type oxide which is the electrode material of the present invention is 0.9 <x
More preferably, it is in the range of 0.99.

The B-site ion of the electrode material contains at least one of Ru, Ir and Rh. In this case, the resistance value of the oxide electrode decreases, and the ferroelectric inversion operation can be followed even if the speed of the switching pulse is increased. Examples of a method for forming these oxide films include DC (direct current excitation ion) sputtering or RF (high frequency ion) sputtering using an oxide target or a constituent metal target, spin coating using an organic material as a coating source, and LSMCD.
(Liquid Source Misted Chemical Deposition), CV
D method and the like. Further, when the film is deposited, it is in an amorphous state, and a desired crystal structure can be obtained by heat treatment.

Although the ferroelectric capacitor can be formed in any device configuration, the integration density is increased and the chip size is reduced particularly in a capacitor cell disposed on a plug made of silicon or tungsten. be able to. In this case, it is preferable to have an oxide or nitride barrier film between the plug and the ferroelectric capacitor. In particular, when an ABxOy-type oxide electrode and a ferroelectric film are stacked, diffusion of the ABxOy-type oxide electrode component into the plug metal is prevented by the barrier film. By preventing the diffusion, the resistance value of the plug can be reduced, and the shift of the sense timing can be suppressed.

As the oxide or nitride barrier film,
Conductive IrO ₂ , TiN, TaN, TaSiN and the like are desirable. In the case where the lower electrode is a plate line, a stacked structure in which a metal film is stacked on the barrier film and an oxide electrode is further provided to reduce the plate line capacity may be employed. In addition, depending on the driving method, the upper electrode may have a structure in which an oxide electrode and a metal are stacked.

The electrode material used in the present invention is an ABxOy type oxide. An oxide having this crystal structure and in which the B site is a noble metal such as Ru, Ir, and Rh exhibits a metallic behavior in the temperature characteristic of the resistance value, and has a low resistance value as a conductor. For this reason, a high-speed switching operation of the ferroelectric capacitor is possible despite being an oxide electrode.

Further, when the electrode component diffuses into the ferroelectric layer during the formation of the ferroelectric film or during the heat treatment in the subsequent process, it causes an increase in leak current and a deterioration in ferroelectric characteristics. Since the content of the noble metal element is smaller than that of the simple perovskite structure, the noble metal element does not become excessive. Therefore, it is unlikely to be a diffusion factor. In particular, even in the case of a Ru-containing oxide electrode in which stable film formation is difficult because of the easy volatilization element, the problem that film formation becomes difficult due to Ru deficiency does not occur. It is possible.

Since the content of the noble metal as a diffusion element in the electrode is small, hillocks and the like hardly occur. Therefore, it is possible to improve the yield while using the oxide electrode. Furthermore, the present invention has an advantage that the cost can be reduced because the content of the expensive noble metal component is small. ABx for capacitor lamination
When an Oy-type oxide is used for the upper electrode, the electrode film mainly functions as a hydrogen blocking layer, which contributes to improvement of the recording retention characteristics. On the other hand, in the structure of the MFM and the MFMIS, when used for the lower electrode, it mainly works as a diffusion barrier to a plug or an interlayer insulating film of a ferroelectric component, so that not only high-speed operation but also performance of a transistor portion can be maintained. It contributes to the improvement of device reliability.

Other features and advantages of the present invention will become more apparent in the following description with reference to the drawings.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A configuration example of a ferroelectric memory device embodying the present invention will be described below.

(First Embodiment) FIG. 1 is a sectional view of a ferroelectric memory having an MFM structure according to a first embodiment of the present invention. FIG. 1A shows an example in which the ferroelectric capacitor 30 of the ferroelectric memory 100A is provided below the bit line 10, and FIG. 1B shows the example in which the ferroelectric capacitor 30 is provided below the bit line 10. An example is provided.

The ferroelectric capacitor 30 of the present invention has a non-P
It has a b-based ferroelectric film 32 and perovskite oxide electrodes 31 and 33. Lower electrode 31 and upper electrode 33
At least one layer is composed of ABxOy (0.5 <x <
1.0, 1.5 <y <3.3). In particular, it is preferable to contain Sr or Ba as the A site ion.

In the first embodiment, the oxide constituting the lower electrode 31 is SrRu _0.95 O _{3. 1} and ferroelectric 3
The non-Pb-based ferroelectric film composing SrBi ₂ (Ta,
It was _Nb) 2 _{O 9.}

The ferroelectric memory 100 shown in FIG.
It has a transistor comprising a gate 22 and source / drain 23a, 23b. The tungsten (W) plug 13 is directly connected to one of the source and the drain (the drain 23b in FIG. 1) at the lower end, and is connected to the lower electrode 31 of the ferroelectric capacitor 30 at the upper end. The other of the source and the drain (the source 23a in FIG. 1)
Are connected to the bit line 10 via the contact plug 14. The bit line 10 and the ferroelectric capacitor 30 are connected outside the plane of FIG.

The manufacturing process of such a ferroelectric memory is as follows. First, an insulating film made of a silicon oxide film is formed on the silicon substrate 20, and diffusion processing, oxide film formation,
The doping process, the lamination of the conductive layer, and the formation of the interlayer insulating film 15 are performed respectively, and the gate 22 and the source / drain 2 are formed.
A transistor composed of 3a and 23b and a field oxide film 21 are obtained.

Next, a via hole reaching the drain 23b is formed by photolithography and etching, and tungsten (W) is filled to form a plug 13. After planarizing the plug surface by CMP, a TiN barrier layer 12 is formed by sputtering to a thickness of 500 °. At this time, heat treatment was performed in ammonia gas at 800 ° C. in order to enhance barrier properties. On the barrier film 12, a SrRu _0.95 O _3.1 film was formed as the lower electrode 31 by sputtering to a thickness of 500 °.

A spin coating method is applied on the lower electrode 31.
Using SrBi₂(Ta, Nb) ₂O₉Ferroelectric film
32 with a thickness of 1800１ and crystallized by heat treatment
Was performed. Further, on the ferroelectric film 32, a lower electrode and
The upper electrode 33 was formed in the same manner. After that, RIE
Dry etching by (reactive ion etching)
The shape of the capacitor 30 was formed by a process. And interlayer insulating film
After laminating No.16, a contact hole is opened and
Each connection wiring was performed.

When the lower electrode is formed, the ferroelectric film 32 and the upper electrode 33 may be stacked after the lower electrode 31 is buried in the groove of the interlayer insulating film 15 and flattened. The obtained memory element can be driven at 2 V or less,
^No defective bit was generated after ^ten or more operations. When the read pulse was 80 nsec and the write pulse was 120 nsec, sufficient record retention characteristics were obtained at a non-defective rate of 80% or more. After the device was formed, the wiring and the MFM structure were etched, the transistor was taken out, and the components were analyzed. As a result, no diffusion of the electrode component or the ferroelectric component into the transistor could be detected.

In the example shown in FIG. 1, the ferroelectric capacitor 3
0 and the ferroelectric film 32 are
However, the upper electrode 33 and the ferroelectric film 32 may be shared with an adjacent cell array. However, in this case, when a memory operation is performed by driving the upper electrode, the parasitic capacitance between the upper electrode and another wiring layer increases, making high-speed operation difficult. Therefore, a method in which the upper electrode is not driven is more advantageous. For that purpose, it is necessary that the ferroelectric film be polarized at a voltage half of the power supply voltage. In the present invention, since a ferroelectric film made of a layered compound having a low inversion voltage is used, the device can be operated at a power supply voltage of 3 V even when the upper electrode is driven.

FIG. 2 is an enlarged sectional view of the plug 13 and the ferroelectric capacitor 30 shown in FIG. Lower electrode 31
And the structure of the ferroelectric layer 32 are as described above. For the upper electrode 33, S
An rRuxOy film was prepared. At this time, in the raw material coating liquid, the value of the composition x was set to (A) 0.55, (B) 0.90, (C)
After application and heat treatment, the electrode characteristics were changed to 0.98 and (D) 1.01, and the electrode characteristics according to the respective compositions were examined. The results are shown in the table of FIG.

In (D) only, hillocks occurred on the surface of the upper electrode. The generation of hillocks (projections generated on the electrode surface) is caused by the diffusion of Ru atoms for relaxation of compressive stress during heat treatment. It can be seen that, for compositions other than (D), the content of noble metal atoms is in a range that does not cause diffusion.

Regarding the crystallization temperature of the electrode, in (A), the temperature at which the electrode can be crystallized is 100 ° C. higher than other films, and a heat treatment at 800 ° C. is required. When the processing temperature is increased, undesired phenomena such as damage to other layers and oxidation are more likely to occur, so that it is understood that the composition x may not be too low.

Also, as a result of evaluating the capacitor characteristics of each electrode, the switching charge amount was (A) 8 μC / cm ² , (B) 12 μC / cm ² ,
(C) 15 μC / cm ² and (D) 7 μC / cm ² . From this result, the optimum range of the composition x in which a sufficient charge can be accumulated is narrowed. (D)
Indicates that the leakage current of the capacitor is increased to 10 ⁻³ A / cm
^Two orders. This value is 1000 to 10000 times higher than the compositions of (A) to (C).

From these results, it is understood that it is preferable that the value of the composition x does not exceed 1.0. For the lower bound,
Even if x = about 0.5, no serious problem occurs with the hillock, but it is inferior to (B) and (C) in the heat treatment temperature, the accumulated charge amount, and the leak current. Therefore, 0.9 <x
It can be seen that the range of <0.99 is most preferable.

FIG. 4 shows a modification of the capacitor structure of FIG. In the example of FIG. 4, the upper electrode 33, to prepare a _{Sr (Ru 0.5 Ir 0.5) x} O y film by spin coating.
At this time, the composition was set to x = 0.95 in the raw material coating liquid.
This was applied and heat-treated, and the condition was examined. As a result, the surface resistance of the upper electrode was 50 μΩ · cm, which was １ ／ or less of that of the upper electrode structure shown in FIG. As for the charge accumulation, the crystallization temperature, and the surface state, good results were obtained as in FIGS. 3B and 3C.

(Second Embodiment) FIGS. 5A and 5
(B) shows ferroelectric memories 500A and 500B according to the second embodiment of the present invention. In the example shown in FIG. 5, the upper electrode 53 of the ferroelectric capacitor 50 is connected to the metal wiring 11. Either the material of the upper or lower electrode of the ferroelectric capacitor 50 is SrRu _x O _y, the other, the Sr in the A site ion, consists of _Sr 2 IrO ₄ using Ir in the B site ion ing. The ferroelectric film 32 was made of the same material as in the first embodiment.

To manufacture the ferroelectric memory shown in FIG.
First, a silicon oxide film is formed on the silicon substrate 20.
Forming an insulating film, diffusion processing, oxide film formation, doping
Processing, lamination of conductive layers, formation of interlayer insulating films, respectively.
From gate 22 and source / drain 23a, 23b
The resulting transistor and field oxide film 21 were obtained.
Thereafter, a contact plug 13 is formed in the interlayer insulating film 15
After the formation of the bit wiring 10, the interlayer insulating film 16 is deposited.
Then, Sr₂IrO₄To lower electrode layer 5
1 and spin coating SrBi.₂(Ta, N
b)₂O₉To form a ferroelectric film 52, _xO_y
After sputtering to form the upper electrode layer 53,
Into a capacitor shape by dry etching.

5A and 5B, one of the source and the drain of the transistor is connected to the bit line 10, and the other is connected to the upper electrode 33 of the ferroelectric capacitor 50 having the MFM structure. It is connected. 5A shows an example in which the capacitor 50 is formed on the field oxide film 21, and FIG. 5B shows an example in which the capacitor 50 is formed on the gate 22. Needless to say, these may have a structure in which the bit lines are wired on the capacitors as shown in FIG. FIG.
The operating speed of the memory element shown in FIGS.
00 nsec, and the yield rate was higher than that of the first embodiment, but the cell area was increased by 40%.

(Third Embodiment) FIG. 6 shows a MFMIS structure ferroelectric memory according to a third embodiment of the present invention.
The MFMIS capacitor 60 shown in FIG. 6 is a field-effect capacitor that also functions as a gate of a transistor. This memory element has a lower electrode 61 and an upper electrode 63 made of an oxide represented by SrRuxOy.
A ferroelectric Sr ₂ (Nb _0.4 Ta _0.6 ) ₂ O ₇ film 62 sandwiched between a lower electrode 61 and an upper electrode 63;
and an iO ₂ gate insulating film 64. The lower electrode 61 functions as a floating gate of a transistor of the ferroelectric memory, and the upper electrode 63 functions as a control gate.

In order to manufacture such a ferroelectric memory, an insulating film of a silicon oxide film is formed on a silicon substrate 65, and a diffusion process, an oxide film formation and a doping process are performed to form source / drain regions. At this point, the surface of the substrate between the source and drain regions is covered with Si as a gate insulating film.
An O ₂ film 64 is formed to a thickness of 50 °. On the gate insulating film 64, by sputtering SrRu _x O _y film thickness of 1000 Å, to form a lower electrode 61 serving as the floating gate. In the MFMIS structure, a ferroelectric film having a dielectric constant as small as possible is desirable. Therefore, on the lower electrode 61, a layered ferroelectric film 62 having a dielectric constant of 45
An r ₂ (Nb _0.4 Ta _0.6 ) ₂ O ₇ film was formed to a thickness of 2500 ° by a sol-gel method. Strong dielectric 61 after the annealing treatment to crystallize the SrRu _x O _y 1000
The upper electrode 63 was formed by sputtering to a thickness of Å.

To operate this element, the following operation is performed. When turning on, first, a voltage (+ V) sufficient to invert the ferroelectric film 62 is applied to the control electrode (upper electrode 63). When the polarization of the ferroelectric film 62 is inverted, the floating gate (lower electrode 61)
, A positive charge is generated on the gate insulating film 64 so as to cancel the charge. Further, in order to cancel the positive charge, a negative charge is generated on the substrate 65, and if a voltage higher than a threshold value serving as a depletion layer is applied to the control electrode 63, an inversion layer is formed and a transistor is formed. Is turned on. When a negative voltage (-V) is applied to the control voltage, the transistor is turned off. At the time of writing, a large voltage is applied to invert the ferroelectric film, but at the time of reading, a small bias voltage is applied, so that the ferroelectric film 62 is not inverted and an electric field is applied only to the gate insulating film 64. Although the yield of this prototype memory element was reduced, even if the reading speed was set to 50 nsec or less, no problem occurred in the operation for 60% or more. Further, no defective bit was generated even when only the read operation was performed 10 ¹² times or more.

(Fourth Embodiment) FIGS. 7A and 7
(B) shows MFS structure and MFIS structure ferroelectric memories 70A and 70B according to the fourth embodiment of the present invention. The ferroelectric memory 70A having the MFS structure includes a silicon substrate 71 and SrBi ₂ (Ta, Nb) ₂ O formed on the surface between the source and drain regions of the silicon substrate 71.
₉ and a SrRuxOy electrode 72 formed on the ferroelectric film 72. In order to obtain such a ferroelectric memory, SrBi ₂ (Ta, Nb) is formed on the silicon substrate surface between the source and drain regions.
₂ O ₉ was formed to a thickness of 1800 ° by spin coating. This ferroelectric film was crystallized by annealing, and SrRu _0.95 O _3.1 was sputtered thereon to a thickness of 1000 °.

In the CV measurement, a memory window of 0.6 eV was observed, but decreased to about 40% in 24 hours. This is because the ferroelectric film 72 is directly formed on the silicon substrate 71.
Is formed, so that the influence of diffusion is large and the reading speed is affected.

Therefore, as shown in FIG. 7B, an SiN film having a thickness of 50 ° was provided as a buffer layer 75 between the silicon substrate 71 and the ferroelectric film 72. The ferroelectric memory 70B having the MFIS structure as shown in FIG. 7B was able to stabilize the charge, and was able to maintain a memory window of 70% or more after 24 hours.

[0045]

As described above, according to the present invention, the electrode material of the capacitor of the ferroelectric memory is an oxide electrode having a low resistance value. Therefore, although the oxide electrode is used, high-speed switching of the ferroelectric capacitor is possible.

The upper electrode of such an oxide functions as a hydrogen blocking layer and contributes to the improvement of the recording retention characteristics. On the other hand, the lower electrode also functions as a barrier that prevents the ferroelectric component from diffusing into the plug or the interlayer insulating film.

Further, it is possible to effectively reduce an increase in leakage current and deterioration of ferroelectric characteristics due to diffusion of a noble metal component of the electrode into the ferroelectric film, thereby improving reliability of memory operation. I do. Since the content of the noble metal which becomes a diffusion element is small, hillocks are hardly generated and the mass production is excellent.

[Brief description of the drawings]

FIG. 1 is a sectional view of a ferroelectric memory according to a first embodiment of the present invention.

FIG. 2 is an enlarged sectional view of the capacitor structure shown in FIG.

3 is a table showing capacitor characteristics when the composition x of B site ions of an upper electrode is changed in the capacitor structure shown in FIG. 2;

FIG. 4 is a diagram showing a modification of the capacitor structure shown in FIG. 2 in which the composition of the upper electrode is different.

FIG. 5 is a sectional view of a ferroelectric memory according to a second embodiment of the present invention.

FIG. 6 is a sectional view of a ferroelectric memory according to a third embodiment of the present invention.

FIG. 7 is a sectional view of a ferroelectric memory according to a fourth embodiment of the present invention.

[Explanation of symbols]

 10 bit line 13 plug 15, 16 interlayer insulating film 20 substrate 21 field oxide film 22 gate 23 source / drain 30, 50 MFM capacitor 31, 51 lower electrode 32, 52, 62, 72 ferroelectric film 33, 53 Upper electrode 61 Floating electrode 63, 73 Control electrode 64, 75 Gate oxide film 60 MFMIS capacitor 70A MFS capacitor 70B MFIS capacitor

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) H01L 29/792 F-term (Reference) 5F001 AA17 AF06 AF10 AF25 5F083 FR02 FR05 FR06 FR07 GA02 GA21 JA17 JA39 JA40 JA45 MA06 MA17 PR33 5F101 BA62 BF02 BF09 BF10

Claims (9)

[Claims] 1. A non-Pb-based ferroelectric film and a perovskite
A ferroelectric capacitor having
In addition, at least one layer of the oxide electrode is AB _xO
_y(0.5 <x <1.0, 1.5 <y <3.3)
A ferroelectric memory, characterized in that the ferroelectric memory is an oxide. 2. The ferroelectric memory according to claim 1, wherein said ferroelectric capacitor is a ferroelectric capacitor having an MFM structure. 3. The ferroelectric memory according to claim 1, wherein the ferroelectric capacitor is an MFS structure, an MFMIS structure, or an MFIS structure field-effect type ferroelectric capacitor. 4. The ferroelectric memory according to claim 1, wherein said ferroelectric film is made of a layered compound. 5. The ferroelectric memory according to claim 4, wherein said layered compound contains bismuth (Bi). 6. The ferroelectric material according to claim 1, wherein the ferroelectric film and the electrode material contain one of Sr (strontium) and Ba (barium) as A-site ions. memory. 7. As the B site ion of the electrode material,
2. The ferroelectric memory according to claim 1, comprising at least one of Ru (ruthenium), Ir (iridium), and Rh (rhodium). 8. The ferroelectric memory according to claim 1, wherein the ferroelectric capacitor is disposed on a tungsten or silicon plug. 9. The ferroelectric memory according to claim 8, further comprising an oxide or nitride barrier layer between the plug and the ferroelectric capacitor.