JP2001267496A - Semiconductor device comprising input protection circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device wherein the scale of a circuit for input protection is reduced. SOLUTION: The semiconductor device comprises an input pad I connected to each of a plurality of input terminals A0-An, and a protection circuit P for bypassing an excessive current occurring when an abnormal voltage is applied to the input terminals A0-An. The protection circuit P is connected to the input pad I through transistors FT1-FTn, allowing a single protection circuit P to be shared with a plurality of input terminals A0-An.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an input protection circuit in a semiconductor device.

[0002]

2. Description of the Related Art With the recent development of semiconductor technology, the area of a transistor has been reduced, and the circuit portion of a semiconductor device has been highly integrated. On the other hand, in a semiconductor device, E
In general, a protection circuit is provided in an input circuit unit in order to protect against electrostatic breakdown when a surge voltage due to SD (Electro Static Discharge) or the like is applied to an input terminal.

FIG. 4 is a diagram illustrating an input circuit section in a conventional semiconductor device. In a conventional semiconductor device, an input circuit unit includes an input protection resistor R and protection circuits P0 to Pn between an input pad I and an input buffer B to prevent inflow of an overcurrent (surge current) due to a surge voltage. It is provided for each of A0 to An.

In the semiconductor device having such a configuration, when a high surge voltage is applied to the input terminals A0 to An, the field transistors Tr1 or Tr2 of the protection circuits P0 to Pn.
Is turned on, a current path is formed, and an overcurrent (surge current) flows through this current path, thereby preventing an overcurrent from flowing into an internal circuit of the semiconductor device.

FIG. 5 is a layout diagram showing the area occupied by each element of the input circuit section of the semiconductor device. In the figure, I / O cells are input terminals A0 to A0 in an input circuit section.
A circuit for each An, including an input protection resistor R and protection circuits P0 to Pn. In each I / O cell, the transistors Tr1 and Tr2 constituting the protection circuit have a sufficient size (area) such that a surge current can be sufficiently bypassed when a surge voltage is applied to one input terminal. )
It is formed with.

[0006]

In such a conventional semiconductor device, a protection circuit is provided for an output terminal in an output circuit portion, but the protection circuit for an output terminal also serves as an output buffer. Therefore, the area can be suppressed smaller than that of the input unit. On the other hand, in the case of the protection circuit for the input terminal, since it is used only for the purpose of preventing electrostatic destruction, efficiency cannot be improved as in the output circuit section. With the recent increase in the degree of integration of semiconductor devices, the proportion of the area occupied by the protection circuit of the input circuit portion in the semiconductor device has relatively increased, and the scale of the protection circuit of the input circuit portion has a large effect on the integration of the semiconductor device. ing.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a semiconductor device capable of reducing the size of a circuit for input protection.

[0008]

In order to solve the above-mentioned problems, a semiconductor device according to the present invention has a plurality of input terminals and an overcurrent generated when an abnormal voltage is applied to each input terminal. And the protection circuit is shared by a predetermined number of the input terminals. In this way, by sharing the protection circuit, the number of elements and the occupied area of the protection circuit can be reduced.

Preferably, each input terminal is connected to a protection circuit via a switchable transistor. In addition, it is preferable to use a transistor that does not turn on with a voltage in the voltage range of the voltage applied to the input terminal during normal operation.

[0010] The area of the protection circuit is larger than the area required to secure the withstand voltage when an abnormal voltage is applied to at least one input terminal, and the abnormal voltage is simultaneously applied to all the input terminals sharing the protection circuit. Is preferably smaller than the area required for securing the withstand voltage when the voltage is applied. Thus, it is possible to reduce the area of the protection circuit while sufficiently securing the withstand voltage per input terminal.

The area of the protection circuit may be an area necessary for securing a withstand voltage when an abnormal voltage is simultaneously applied to all the input terminals sharing the protection circuit. Thus, by making the area of the protection circuit sufficiently large,
The area of the protection circuit connected to one input terminal increases,
As a result, the breakdown voltage per input terminal can be increased.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of a protection circuit in a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

In the semiconductor device described below, the protection circuit is shared by a predetermined number of input terminals in the input circuit section, thereby reducing the number of elements of the protection circuit and reducing the occupied area. .

FIG. 1 is a circuit diagram of an input circuit section of a semiconductor device according to the present invention. In the semiconductor device,
It has an input pad I connected to each of the input terminals A0 to An, a protection resistor R, and an input buffer B. Data, control signals, and the like input from the input terminals A0 to An are transmitted to an internal circuit that performs predetermined processing via an input pad I, a protection resistor R, and an input buffer B.

An input pad I for each of the input terminals A0 to An is connected to a switching transistor FT0 to FT0.
It is connected to one protection circuit P via FTn. That is, the protection circuit P is shared by a plurality (predetermined number) of input terminals. The protection circuit P is a P-type transistor Tr1
And an N-type transistor Tr2 connected in series. For the switching transistors FT0 to FTn, for example, a field transistor whose threshold voltage is sufficiently higher than the threshold voltage of the transistor Tr1 is used. The field transistors FT0 to FTn can be replaced with other transistors as long as the threshold value is higher than the voltage applied to the input terminal during normal operation.

As described above, in the present semiconductor device, each of the input terminals A0 to An is connected to one protection circuit P via each of the switching transistors FT0 to FTn. The number of elements of the protection circuit can be reduced as compared with the conventional semiconductor device provided.

The operation in the input circuit section of the semiconductor device having the above configuration will be described. Note that the following description focuses on the input terminal An for convenience of description.

First, the operation during actual use, that is, when a normal voltage is applied to the input terminal will be described.

Referring to FIG. 1, when a normal positive voltage is applied via input pad I connected to input terminal An, the voltage applied to gate G of transistor FTn is equal to the threshold of transistor FTn. The transistor FTn does not turn on because it is sufficiently lower than the value voltage. On the other hand, when a normal negative voltage is applied via the input pad I, the magnitude of the voltage applied to the gate G of the transistor FTn is sufficiently smaller than the negative threshold voltage of the transistor FTn. Since it is high, the transistor FTn does not turn on. As described above, since the transistor FTn is not turned on during actual use, no short circuit occurs between the input terminals A0 to An.
Therefore, at this time, the protection circuit P does not operate, and the voltage applied to the input pad I is transmitted to the internal circuit via the input buffer B.

Next, the operation when an abnormality occurs, that is, when a high surge voltage is applied to the input terminal An will be described.

When a positive abnormal voltage higher than the threshold voltage of the transistor FTn is applied to the input terminal An, the transistor FTn turns on. As a result, the current path for flowing the surge current becomes the transistor FTn and the protection circuit P
Of the transistor Tr1. On the other hand, when a negative abnormal voltage lower than the threshold voltage of the transistor FTn on the negative side is applied to the input terminal An, the transistor FTn
Is punched through, a current path for flowing a surge current is formed by the transistor FTn and the transistor Tr2 of the protection circuit P. By forming the current path as described above, the surge current can be bypassed to prevent the surge current from flowing into the internal circuit, and protection from surge voltage can be realized.

FIG. 2 is a diagram showing an example of a layout diagram of the input circuit section when the protection circuit is shared as shown in FIG. In the figure, a circuit section 21 includes an input buffer B and transistors FT0 to FTn. The area of the transistors Tr1 and Tr2 shown in FIG.
It is equal to the sum of the areas of the transistors Tr1, Tr2 for the cell. That is, in the example shown in FIG. 2, the area of the protection circuit (transistors Tr1 and Tr2) per I / O cell is larger than that in the conventional case shown in FIG. In general, the larger the area of a transistor, the larger current can flow through the transistor. Therefore, when a surge voltage is simultaneously applied to a plurality of input terminals in the semiconductor device shown in FIG. 2, an allowable limit (static breakdown voltage) of a protection circuit equivalent to that of the conventional semiconductor device (see FIG. 5) is obtained. Further, when a surge voltage is applied to only one input terminal, a larger permissible limit than the conventional one is obtained. As described above, by sharing the protection circuit, it is possible to increase the withstand voltage of the surge voltage for one cell without increasing the area of the semiconductor device as a whole.

FIG. 3 is a diagram showing another example of the layout of each element of the input section when the protection circuit is shared. In the example shown in FIG. 3, the area of the transistors Tr1 and Tr2 constituting the protection circuit is made equal to the area of the protection circuit (transistors Tr1 and Tr2) for one I / O cell shown in FIG. Thereby, the protection circuit (transistor T
The area of (r1, Tr2) can be reduced as a whole as compared with the conventional case (see FIG. 5), and the circuit such as the input buffer can be arranged at a place away from the protection circuit. Even with such a configuration, normally, a surge voltage is applied to only one I / O cell at a time, so that it is considered that a sufficient electrostatic breakdown voltage can be obtained. Further, by minimizing the area of the protection circuit and minimizing the distance between the input terminal circuit 25 and the protection circuit, the area of the entire semiconductor device can be reduced without lowering the function as the protection circuit.

The area of the protection circuit is not limited to the examples shown in FIGS. 2 and 3, and is larger than an area necessary for securing a withstand voltage when an abnormal voltage is applied to at least one input terminal. The setting may be made within a range that is smaller than an area necessary for securing a withstand voltage when an abnormal voltage is simultaneously applied to all the input terminals sharing the protection circuit.

As described above, when the importance is placed on the high electrostatic breakdown voltage, the area of the protection circuit is increased as shown in the layout configuration of FIG. 2, and when the reduction of the circuit scale is emphasized, the layout shown in FIG. As in the configuration, the area of the protection circuit can be optimized so as to reduce the area of the protection circuit, whereby the circuit size of the entire semiconductor device can be reduced.

As described above, according to the semiconductor device of the present embodiment, the input terminal is not turned on through the field transistor having the threshold voltage that does not turn on normally but turns on or punches through when an abnormal voltage is applied. By using the same protection circuit, the number of elements of the protection circuit in the semiconductor device can be reduced, and the occupied area can be reduced.

[0027]

According to the semiconductor device of the present invention, the number of components constituting the circuit for input protection and the scale thereof can be reduced, so that the circuit scale of the entire semiconductor device can be reduced.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an input circuit section of a semiconductor device according to the present invention.

FIG. 2 is a layout diagram of an input circuit portion of the semiconductor device according to the present invention.

FIG. 3 is another layout diagram of the input circuit section of the semiconductor device according to the present invention.

FIG. 4 is a circuit diagram of an input circuit section of a semiconductor device having a conventional protection circuit.

FIG. 5 is a layout diagram of an input circuit section of a conventional semiconductor device.

[Explanation of symbols]

11 input terminal circuit section (including input buffer and input protection resistor) 21 input terminal circuit section (including input buffer and input protection resistor) 23 circuit section (including input protection resistor and the like) 25 input terminal circuit section (including input buffer resistance) A0 to An Input terminal B Input buffer FT0 to FTn Switch transistor G Switch transistor gate I Input pad P, P0 to Pn protection circuit R Input protection resistor Tr1 P-type transistor Tr2 N-type transistor

Claims (5)

[Claims] A plurality of input terminals; and a protection circuit for bypassing an overcurrent generated when an abnormal voltage is applied to each of the input terminals, wherein the protection circuit includes a predetermined number of the input terminals. A semiconductor device characterized by being shared. 2. The semiconductor device according to claim 1, wherein each of said input terminals is connected to said protection circuit via a switchable transistor. 3. The semiconductor device according to claim 2, wherein said transistor is not turned on at a voltage in a voltage range of a voltage applied to an input terminal during a normal operation. 4. The protection circuit according to claim 1, wherein an area required for securing a withstand voltage when an abnormal voltage is simultaneously applied to all the input terminals sharing the protection circuit is set. 2. The semiconductor device according to 1. 5. An area of the protection circuit is larger than an area necessary for securing a withstand voltage when an abnormal voltage is applied to at least one input terminal, and all inputs sharing the protection circuit are provided. 2. The semiconductor device according to claim 1, wherein the area is smaller than an area necessary for securing a withstand voltage when an abnormal voltage is simultaneously applied to the terminals.