JP2001267219A - Exposure system and apparatus and method for manufacturing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the productivity and accuracy of a semiconductor manufacturing process by appropriately performing exposure and preparations simultaneously in parallel with each other. SOLUTION: At the time of performing a plurality of units of treatment by predicting the ending time of the treatment at every treatment unit in accordance with the purpose of operations, the offset time to the predicted ending time is set and the end of each treatment is noticed a desired period of time prior to the end of the treatment.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an exposure apparatus, a device manufacturing apparatus, and a device manufacturing method for exposing an original pattern on a substrate such as a semiconductor substrate, and more particularly, to exchanging information with an exposure apparatus or a computer in a computer network. This is a device manufacturing apparatus to which a host apparatus for controlling the exposure apparatus is connected.

[0002]

2. Description of the Related Art In recent years, semiconductor manufacturing plants have become online, and semiconductor exposure apparatuses (eg, steppers) have been installed in SEMI (Semi-Semiconductor).
conductor Equipment and Material Internationala
l) Compliant protocol (SECS-I or SECS-
II), it is increasingly connected to an online control and monitoring system of a host computer in a semiconductor factory. Also, instead of the conventional combination of RS-232C (American Electronic Industries Association) and SECS-I, Ethernet (registered trademark) and TCP / IP (Transm
The use of a combination of ission Control Protocol / Internet Protocol (HSMS) and HSMS (Highspeed SECS Message Services) has often increased the size and volume of messages that are continuously transferred at high speed.

Conventionally, a factory host computer that manages a semiconductor exposure apparatus normally transmits an operation of the semiconductor exposure apparatus manually input by an operator to each semiconductor exposure apparatus via the above-described communication means as a remote command. . For outgoing messages from the host computer,
If necessary, in a semiconductor exposure apparatus having an interface that supports a protocol for returning a reply message, when receiving and replying to a remote command message or the like, it is determined whether remote command execution is currently possible or not. When the actual processing indicated by the remote command ends, the host computer is notified of the end of the processing and the execution result of the processing to the host computer. Upon completion of the processing, the host computer determines the next required processing based on the completion or the execution result, and starts execution.

[0004]

However, by the time the semiconductor exposure apparatus that has received the remote command notifies the host computer that the operation has been completed, the semiconductor exposure apparatus or any other processing required for the next processing is required. It is possible to perform pre-preparation processing in an external device in parallel with a remote command currently being executed in a semiconductor exposure apparatus, and this simultaneous processing is normally useful for improving the productivity and accuracy of device manufacturing. Even so,
Because the host computer cannot properly determine when the remote command ends and when to start preparations, the host computer must wait for the remote command to end without moving on to the preparation process.
Alternatively, even if the process shifts to the pre-preparation process, the pre-preparation process cannot be completed at an appropriate time, which has been one of the causes of reducing the productivity and accuracy of the semiconductor manufacturing process.

An object of the present invention is to provide an exposure apparatus, a device manufacturing apparatus and an exposure apparatus capable of solving the above-mentioned problems of the prior art and improving productivity and accuracy of a semiconductor manufacturing process by appropriately performing preparatory processing at the same time. An object of the present invention is to provide a device manufacturing method.

[0006]

In order to achieve the above object, the present invention provides a method for predicting the end time of a process for each processing unit such as a lot according to the operation purpose. In order to notify the end of the process earlier by a desired time, an offset time with respect to the predicted end time can be set.

That is, when the present invention is applied to a semiconductor exposure apparatus, the host apparatus, an operator, or the like can immediately perform exposure processing on a substrate (semiconductor substrate, etc.) of the next lot after completion of processing to be executed this time. Then, when the time required for the preparation processing before the exposure of the next lot is set as the offset time in the exposure apparatus, the exposure apparatus holds the offset time in an external storage device or the like.

In particular, in the case where a plurality of exposure apparatuses are collectively managed by setting an offset time from a host apparatus capable of controlling and monitoring, the exposure apparatuses are connected online such as for transmitting / receiving information to / from the host apparatus. May be provided. Then, the exposure apparatus notifies the host apparatus via a communication unit of an end notice at a time shifted by the offset time from the predicted end time of the lot to be processed this time.

[0009] As an example of a specific embodiment of the present invention, the following (1) to (1) to (2) allow notice of the end notice of the end of the semiconductor exposure apparatus in the semiconductor exposure apparatus and / or the host.
The function (4) is provided. (1) A processing end prediction function for predicting, for each command executed in the semiconductor exposure apparatus, the time required for the actual processing performed by the command. As described in detail in, for example, Japanese Patent Application Laid-Open No. 8-45828, the processing end prediction function includes a means for designating the number of substrates of one lot to be subjected to the exposure processing, and a method for each partial processing of the exposure processing. Means for setting information on required processing time, means for setting information on processing time required for each partial processing of exposure processing, and exposure of one lot based on information on a specified number of substrates and the set processing time. There is a configuration having means for calculating the time required for processing or the end time of the processing, and means for measuring the processing time required for each partial processing and correcting the set value based on the measurement result. (2) A function of arbitrarily setting an offset time relating to an end time for each command executed in the semiconductor exposure apparatus, and holding the set offset time in an external storage device or the like. (3) In an online-compatible semiconductor exposure apparatus connected to an online control / monitoring system using a host computer, a reception function for setting and registering the offset time received from the host computer in the semiconductor exposure apparatus. In the host computer, a function of setting an arbitrary offset time in the semiconductor exposure apparatus, such as a time required for preparation necessary for causing the semiconductor exposure apparatus to execute a command next to a command instructing the semiconductor exposure apparatus. (4) A function of notifying the host computer of a processing end notice at the time calculated from the processing end time and the offset time. A function in which a host computer receives a processing end notice and instructs another peripheral device to start preparations necessary for causing the semiconductor exposure apparatus to execute a process based on the next remote command based on the notice of the end.

[0010]

According to the present invention, the preparatory processing in the semiconductor exposure apparatus or another external apparatus for the next required processing can be performed concurrently with the remote command currently being executed in the semiconductor exposure apparatus. If it is possible and the parallel processing is beneficial for improving the productivity and accuracy of device manufacturing, the host computer receives the notification from the semiconductor exposure apparatus at an appropriate time to start preparation, and performs the preparation processing. It is possible to appropriately perform parallel processing, thereby improving the productivity and accuracy of the semiconductor manufacturing process.

Furthermore, the processing end prediction function described in Japanese Patent Application Laid-Open No. 8-45828 can be effectively used for lot scheduling.

[0012]

FIG. 1 is a block diagram for explaining a system configuration of an on-line semiconductor exposure apparatus according to an embodiment of the present invention. In FIG. 1, reference numeral 101 (1011 to 1012) denotes a host computer that accommodates an online system in a factory, and a semiconductor exposure apparatus group 102 (1021 to 1022) in the factory according to the SECS or HSMS protocol.
2) is connected. The online control / monitoring system of the semiconductor exposure apparatus group 102 is housed in the host computer 101 via the Ethernet 103 or the RS232C line 104. Ethernet communication network 103
Are installed to perform LAN communication in the factory. As the form of the Ethernet communication network 103, 10BASE-2 / 5 using a coaxial cable and 10BASE-T connected in a star shape using a twisted pair wire are widely used. As a protocol between the host (host computer) and the semiconductor exposure apparatus in the Ethernet communication network 103, an HS with TCP / IP as a lower layer is used.
MS is used. In general, in the Ethernet communication network 103, transmission / reception is often performed simultaneously using a protocol other than TCP / IP. The RS232C communication line 104 connects the host computer 101 and the semiconductor exposure apparatus 102 one to one. Host computer 1
01 and the semiconductor exposure apparatus 102 are RS232C communication lines 1
04, and communicates with the SECS-I protocol. The RS232C communication line 104 may be bundled with a plurality of serial lines by a multiplexer (line multiplexing device) on the way.

FIG. 2 illustrates a generic embodiment of the present invention in SECS.
9 is a flowchart for explaining using the -II protocol.

The host computer 101 determines a command COMM1 to be executed from now on and an offset time (offset timer value OFSTIME1) contained therein, and transmits a setting request command to the semiconductor exposure apparatus 102 (step S201).

The semiconductor exposure apparatus 102 stores the offset timer value OFTIME1 for the COMM1 command (step S202), and returns success or failure to the host computer 101 (step S203). The success or failure referred to here is the success or failure of the determination processing as to whether the command COMM1 exists on the semiconductor exposure apparatus 102 side. When a success result is obtained in step S203, the host computer 101 determines ON / OFF of an end notice flag for indicating whether an end notice is necessary, and requests the semiconductor exposure apparatus 102 to start execution of the command COMM1. , Transmits an end notice flag (step S20)
4).

The semiconductor exposure apparatus 102 receives the execution start request and determines whether a command COMM1 exists
A condition determination process is performed to determine whether the OMM 1 is currently in an executable state (step S205). If the executable conditions are not met, the host computer 101 determines that the execution has failed.
(S205-N). If the executable conditions are satisfied (S205-Y), the semiconductor exposure apparatus 10
2 judges whether the end notice flag obtained from the host computer 101 in step S204 is ON (step S204).
206) If the end notice flag is OFF (S2)
06-N), a success of the command COMM1 is returned to the host computer 101 (step S209). When the end notice flag is ON, for example, Japanese Patent Application Laid-Open No. 8-4582
8 using the above-described processing end prediction function described in detail in Japanese Unexamined Patent Application Publication No. H8-209, the end prediction time E for the command COMM1.
NDTIME1 is calculated (S206-Y). Next, the end notice time BEL obtained by subtracting the offset timer value OFSTTIME1 set and stored in step S202 from the obtained end expected time ENDTIME1.
LTIME1 is calculated (step S207). In order to generate the end notice report process (step T301) after the elapse of the end notice time BELLTIME1 derived in this way, a procedure of a timer interrupt process is performed (step S208). Then, the semiconductor exposure apparatus 102 returns a command success to the host computer 101 (step S209).

The semiconductor exposure apparatus 102 starts execution of the COMM 1 and sends the start event to the host computer 10.
1 (step S210). After the end notice time BELLTIME1 has elapsed from the start of the execution, the semiconductor exposure apparatus 1
02: timer interrupt processing (step T301)
Is generated, and an end notice event is transmitted to the host computer 101 (step S211).

Upon receiving this event notification, the host computer 101 starts pre-preparation processing for the next processing to be performed after the COMM1 command is completed (step S21).
2).

When the execution of the COMM1 command is completed (step S213), the semiconductor exposure apparatus 102
(1) An execution end event is transmitted to the host computer 101 (step S214). When the COMM1 command end result data is obtained (step S215), COMM1
The command end result data is transferred to the host computer 101.
(Step S216). The host computer 101 determines from the end result data of the COMM1 command whether to proceed to the next process, if necessary, and proceeds to the next process.

(Embodiment of Device Manufacturing Method) Next, an embodiment of a device manufacturing method using the above-described semiconductor exposure apparatus will be described. FIG. 3 shows a micro device (IC or LS)
1 shows a manufacturing flow of a semiconductor chip such as I, a liquid crystal panel, a CCD, a thin film magnetic head, a micromachine, and the like. In step 1 (circuit design), a device pattern is designed. Step 2 is a process for making a mask on the basis of the designed pattern. On the other hand, in step 3 (wafer manufacture), a wafer is manufactured using a material such as silicon or glass. Step 4 (wafer process) is called a pre-process, and an actual circuit is formed on the wafer by lithography using the prepared mask and wafer. The next step 5 (assembly) is called a post-process, and step 4
Is a process of forming a semiconductor chip using the wafer produced by the above process, and includes processes such as an assembly process (dicing and bonding) and a packaging process (chip encapsulation). In step 6 (inspection), inspections such as an operation confirmation test and a durability test of the semiconductor device manufactured in step 5 are performed. Through these steps, a semiconductor device is completed and shipped (step 7).

FIG. 4 shows the wafer process (step 4).
The detailed flow of is shown. Step 11 (oxidation) oxidizes the wafer's surface. Step 12 (CVD) forms an insulating film on the wafer surface. Step 13 (electrode formation) forms electrodes on the wafer by vapor deposition. In step 14 (ion implantation), ions are implanted into the wafer. In step 15 (resist processing), a resist is applied to the wafer. Step 16 (exposure) uses the above-described exposure apparatus or exposure method to align and print the circuit pattern of the mask on a plurality of shot areas of the wafer.
Step 17 (development) develops the exposed wafer.
In step 18 (etching), portions other than the developed resist image are removed. In step 19 (resist stripping), unnecessary resist after etching is removed. By repeating these steps 11 to 19, multiple circuit patterns are formed on the wafer.

If the production method of this embodiment is used, for example, the processing of steps 11 to 15 can be performed in parallel with the exposure processing of the previous lot, so that a highly integrated device which has conventionally been difficult to manufacture can be manufactured at low cost. be able to.

[0023]

As described above, according to the present invention,
The host computer receives the notification from the semiconductor exposure apparatus at an appropriate time when the preparation processing is started, and the preparation processing can be appropriately and concurrently performed, thereby improving the productivity and accuracy of the semiconductor manufacturing process. I can do it.

[Brief description of the drawings]

FIG. 1 is a system configuration diagram of an online system.

FIG. 2 is a comprehensive example.

FIG. 3 is a flowchart illustrating a device manufacturing method that can use the semiconductor manufacturing apparatus of the present invention.

FIG. 4 is a detailed flowchart of a wafer process in FIG. 3;

[Explanation of symbols]

101: host computer group, 102: semiconductor exposure apparatus group, 103: Ethernet communication network, 104: RS23
2C communication line.

Claims (10)

[Claims] In an exposure apparatus having a function of predicting the end time of a process for each processing unit according to an operation purpose, a prediction of the end of the process is made earlier by a desired time prior to the end of the process. An exposure apparatus wherein an offset time with respect to an end time can be set. 2. The exposure apparatus according to claim 1, further comprising means for holding the offset time in an external storage device of the exposure apparatus. 3. The exposure apparatus according to claim 1, wherein the processing unit is a lot unit of a semiconductor substrate that exposes an original pattern. 4. The exposure according to claim 3, wherein the offset time is set so that a pre-exposure preparation process can be performed on the next lot waiting for exposure from the end notice to the end of actual processing. apparatus. 5. A communication device for transmitting and receiving information between an exposure apparatus and a host apparatus so that the offset time can be set from a host apparatus capable of controlling and monitoring a plurality of exposure apparatuses, 5. The exposure apparatus according to claim 1, wherein the processing unit is a remote command unit instructed by the host device to the exposure apparatus. 6. The exposure apparatus according to claim 5, wherein the communication unit connects the exposure apparatus and the host device online. 7. The host device according to claim 5, wherein at the time shifted from the predicted end time by the offset time, the host device can be notified of the end notice via the communication means. Exposure equipment. 8. A device manufacturing apparatus comprising the exposure apparatus according to claim 5 and a host apparatus. 9. A preparatory process required for the exposure apparatus to execute a remote command instructed next by the host apparatus,
9. An apparatus according to claim 8, further comprising means for starting based on said notice of termination.
The device manufacturing apparatus according to claim 1. 10. A method of manufacturing a device by performing processing in a plurality of units while predicting an end time of the processing for each processing unit according to an operation purpose, setting an offset time with respect to the predicted end time, A device manufacturing method, wherein prior to the end of the process, a notice of the end of the process is issued earlier by the offset time.