JP2001237248A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high-current-amplification-factor semiconductor device which has no need of high temperature heat treatments and a uniform doping profile, and its manufacturing method. SOLUTION: The semiconductor device comprises an n-type Si substrate 11, p-type SiGe film 12 laminated on the Si substrate, n-type Si film 13 laminated on the SiGe film, n-type high-concentration P-doped SiGe film 14 formed on the Si film after doping P at a high concentration by the chemical vapor deposition on the Si film, electrodes 18 formed by cutting a part of the P-doped SiGe film and the Si film or inverting the conductivity type of the P-doped SiGe film and the Si film and bonding metal terminals to the cut or reversed parts, and electrodes 19 formed by bonding metal terminals to the P-doped SiGe film.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device such as a transistor, a diode, and an IGBT, and a method for manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, when an npn transistor having a high current amplification factor is manufactured, as shown in FIG. 4, a p-type SiGe film 22 is formed on an n-type Si substrate 21 by using a chemical vapor deposition method.
And the n-type Si film 23 are sequentially stacked (step S1), and a P-rich layer 25 is formed by multi-stage ion implantation from the phosphorus ion source 24 and high-temperature annealing for electrically activating the implanted ions (step S2). ), P high concentration layer 25 and n-type S by milling or reactive ion etching.
A part of the i-film 23 is removed to expose the base surface 26 (step S3), a mesa-etched portion 27 is formed by mesa etching (step S4), and the collector electrode 28, the base electrode 29, and the emitter electrode 30 are properly positioned. (Step S5).

In such a transistor, it is important that the ideal P profile of the P-rich layer 25 be uniformly doped in the emitter 23 as much as possible.

[0004]

However, in the conventional method, it is extremely difficult to uniformly form a high-concentration P-doped layer by a combination of multi-stage ion implantation and high-temperature annealing. It is very difficult. For this reason, the doping profile of the conventional high current amplification npn-type transistor becomes non-uniform,
For example, as shown by a curve E in FIG. 5, the P doping profile of the P high concentration layer 25 of the emitter is largely disturbed.

[0005] Further, due to mutual diffusion during high-temperature annealing, P
The doping profiles E and C and the B doping profile B are all deteriorated, and the widths d1 and d2 of the boundary layer are increased as shown in FIG. Such a rounded doping profile causes a reduction in current amplification factor due to a reduction in electron transfer efficiency inside the transistor, and also causes a reduction in breakdown voltage.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a high-current amplification semiconductor device having a uniform doping profile which does not require a high-temperature heat treatment, and a method of manufacturing the same. Aim.

Another object of the present invention is to provide a semiconductor device having a low contact resistance and a high current amplification factor and a method for manufacturing the same.

[0008]

A semiconductor device according to the present invention comprises a first conductivity type Si substrate, a second conductivity type SiGe film laminated on the Si substrate, and A first-conductivity-type Si film, which is formed by laminating a first-conductivity-type Si film formed by laminating P on the Si film by chemical vapor deposition;
A part of the high-concentration P-doped SiGe film and the Si film may be omitted, or a conductivity type of the high-concentration P-doped SiGe film and the Si film may be reversed, and a metal terminal may be joined to the missing or reversed part. And an electrode formed by joining a metal terminal to the high-concentration P-doped SiGe film.

[0009] The method for manufacturing a semiconductor device according to the present invention comprises the steps of:
A p-type SiGe film is formed on the substrate by heating the type Si substrate in a vacuum evacuated container and supplying a first semiconductor source gas into the vacuum container to act on the surface of the substrate. (A) and a step of (b) laminating an n-type Si film on the p-type SiGe film by applying a second semiconductor source gas to the surface of the p-type SiGe film under heating. A third surface on the surface of the n-type Si film under heating.
Of the n-type S
(c) forming a layer of a high-concentration P-doped n-type SiGe film on the i-film, and removing a part of the high-concentration P-doped n-type SiGe film and the n-type Si film; An electrode is formed by inverting the conductivity type of the P-doped n-type SiGe film and the n-type Si film and joining a metal terminal to the missing or inverted portion. (D) forming an electrode by joining metal terminals.

In the case of manufacturing a power transistor having a high current amplification factor as a semiconductor device, in the step (c), the third semiconductor source gas is 5 to 15 atomic% germane GeH _4.
And 50 to 1 × 10 ⁵ ppm phosphine, the balance consisting of disilane Si ₂ H ₆ and a P concentration of 1 × 10 ¹⁹ atom
It is desirable to form a high-concentration P-doped n-type SiGe film having a thickness of 100 to 500 nm and a thickness of not less than / cm ³ .

As a result of intensive research efforts, the present inventors have found that it is very difficult to increase the P-doping concentration in a film when forming an n-type Si film using a chemical vapor deposition method. It has been found that the P doping concentration is limited to at most about 1 × 10 ¹⁹ atom / cm ³ . According to the present invention, the P concentration of the high-concentration P-doped n-type SiGe film is set to 1 × 10
^It is specified to be ¹⁹ atom / cm ³ or more.

In the above case, high concentration P-doped n-type SiGe
The reason for setting the film thickness in the range of 100 to 500 nm is as follows.
If the thickness is less than 00 nm, a high current amplification factor required for a power transistor cannot be obtained.
If the film thickness exceeds nm, the film quality is deteriorated due to a longer film formation time, the transistor characteristics are deteriorated, and the film formation cost is further increased.

When a transistor having a low contact resistance and a high current amplification factor is manufactured as a semiconductor device, in the step (c), the third semiconductor raw material gas is 5 to 40 atomic% germane GeH ₄ and 1 × 10 ⁴ to 100 nm containing 1 × 10 ⁵ ppm phosphine PH ₃ , the balance consisting of disilane Si ₂ H ₆ and a P concentration of 1 × 10 ²⁰ atom / cm ³ or more
Forming the following high-concentration P-doped n-type SiGe film; and
In the above step (d), it is desirable to form an electrode on the high-concentration P-doped n-type SiGe film while heating the substrate to a temperature in the range of 380 to 420 ° C. By doing so, the amount of Ge oxide on the surface of the high-concentration P-doped n-type SiGe film is reduced, so that the contact resistance between the emitter and the electrode is significantly reduced, and a transistor with low loss and high current amplification is obtained. .

In the above case, high-concentration P-doped n-type SiGe
The reason why the P concentration of the film is 1 × 10 ²⁰ atom / cm ³ or more is that the contact resistivity generated between the electrode and the semiconductor junction can be sufficiently reduced, and the ON voltage can be reduced.

The reason why the thickness of the high-concentration P-doped n-type SiGe film is set to 100 nm or less is that the thickness required for lowering the contact resistivity is 100 nm or less. Although the lower limit of the film thickness is not particularly specified, the minimum required film thickness for forming an electrode is 10 nm.

Further, in the step (c), the substrate is
When a high-concentration P-doped n-type SiGe film is formed while heating to a temperature range
The P doping profile in the film becomes better. In the conventional high-temperature annealing process, the substrate is approximately 900 to 1000 ° C.
5, the P doping profile in the film was remarkably deteriorated as shown by a curve E in FIG. 5, but the film forming process using the chemical vapor deposition method of the present invention is a low-temperature process of 750 ° C. or less. As a result, the P doping profile in the film is greatly improved as shown by curve E1 in FIG. Further, according to the present invention, the widths d3 and d4 of the boundary layer due to the interdiffusion are much smaller than the widths d1 and d2 of the conventional boundary layer, and the doping profile is improved.

In the step (d), the substrate is set at 460-460.
Heated to a temperature in the range of 500 ° C. to form a high concentration P-doped n-type S
After removing the Ge oxide from the surface of the iGe film, it is preferable to form an electrode on the high-concentration P-doped n-type SiGe film. In the step (d), the substrate is set at 380-42.
High concentration P-doped n-type S while heating to a temperature in the range of 0 ° C.
It is preferable to form an electrode on the iGe film. When the high-concentration P-doped n-type SiGe film is heated in these temperature ranges for a short time, the abundance of Ge oxide in the surface layer decreases, and the contact resistance between the emitter and the electrode decreases.

Further, it is preferable that an i-type Si film having a thickness of 1 to 10 nm is formed on the high-concentration P-doped n-type SiGe film formed in the step (c) by chemical vapor deposition. Such an i-type Si film is made of a high-concentration P-doped n-type S
This is because the formation of Ge oxide on the surface of the iGe film is suppressed.

A chemical vapor deposition method is used to increase the doping concentration of the impurity element in the emitter / collector layer. Chemical vapor deposition is a method in which a heated substrate is placed in a vacuum vessel filled with a semiconductor material gas, and a semiconductor thin film is deposited on the surface of the heated substrate. For example, Si doped with an n-type impurity
In order to deposit the film on the substrate surface, disilane (Si ₂ H ₆ ) or a mixed gas of silane (SiH ₄ ) and phosphine (PH ₃ ) is used as a process gas. In order to deposit a SiGe film doped with a p-type impurity on the substrate surface, disilane (Si ₂ H ₆ ) or silane (Si
A mixed gas of H ₄ ), diborane (B ₂ H ₆ ), and germane (GeH ₄ ) is used. In order to deposit a SiGe film doped with an n-type impurity on the substrate surface, a process gas of disilane (Si ₂ H ₆ ) or a mixed gas of silane (SiH ₄ ), phosphine (PH ₃ ) and germane (GeH ₄ ) is used. Used. At this time, the substrate temperature is set to, for example, 650 ° C. or higher. The P-doping concentration of the n-type SiGe film is determined by disilane (Si
_It depends on the mixing ratio of phosphine (PH ₃ ) to ₂ H ₆ ) or silane (SiH ₄ ), but 1 × 10 ¹⁹ / c
A P doping concentration of m ³ or more can be achieved by setting the mixing ratio (PH ₃ partial pressure / Si ₂ H ₆ partial pressure or SiH ₄ partial pressure) to 50 ppm or more. When an n-type Si film serving as an emitter is formed, a diffusion method, an ion implantation method, or the like can be used in addition to the above-described chemical vapor deposition method. Increasing the doping concentration of the emitter disperses the collector current, which tends to concentrate on the portion close to the emitter electrode and the base electrode, and makes it easier for the collector current to flow to the center of the emitter electrode. , Lowers the ON voltage.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Various preferred embodiments of the present invention will be described below with reference to the accompanying drawings.

FIG. 1 is a schematic structural view showing a CVD film forming apparatus used for manufacturing a semiconductor device of the present invention. The substrate 11 is taken in and out of the vacuum vessel 3 of the CVD film forming apparatus 1 through a loading / unloading port (not shown), and is placed on the heating table 2 in the vessel.
1 is placed, and the substrate 11 is heated to a predetermined temperature. A gas supply port 6 is opened at an appropriate position in the upper part of the vacuum vessel 3, and an exhaust port 9 is opened at an appropriate place under the vacuum vessel 3. The gas supply port 6 communicates with a plurality of gas supply sources 8A, 8B, 8C via pipes 6a, 6b, 6c. Flow control valves 7A, 7B, and 7C controlled by a controller (not shown) are attached to the pipes 6a, 6b, and 6c, respectively, so that the amount of gas supplied from the gas supply sources 8A, 8B, and 8C into the processing chamber 5 is controlled. Each is controlled with high precision. The gas supply sources 8A, 8B, and 8C contain semiconductor source gases such as disilane, germane, phosphine, and diborane. Although only three gas supply systems are shown in the figure, this is a way of illustration for the sake of convenience, and there are other types that are not actually shown. The exhaust port 9 communicates with a turbo-molecular pump (not shown) via a pipe so that the inside of the processing chamber 5 surrounded by the vacuum vessel 3 is exhausted to a high degree of vacuum.

Next, a method of manufacturing an npn transistor as a semiconductor device of the present invention will be described with reference to FIG.

The container 3 evacuated from the n-type Si substrate 11
The chamber is heated to a predetermined temperature, the inside of the processing chamber 5 is evacuated, and disilane, germane, and diborane are supplied into the processing chamber 5 as semiconductor source gases.
A Ge film 12 is formed by lamination. Next, disilane and phosphine are respectively supplied as semiconductor source gases into the processing chamber 5, and the gas is allowed to act on the surface of the p-type SiGe film 12 under heating, so that the n-type Si film 13 is stacked on the n-type SiGe film 12. Form. Next, disilane, germane,
Phosphine is supplied as a semiconductor raw material gas, and the gas is caused to act on the surface of the n-type Si film 13 under heating, so that n-type S
A high concentration P-doped n-type SiGe film 14 is formed on the i-film 13 (step S11). This high-concentration P-doped n-type S
When the iGe film 14 is formed, disilane and phosphine may be supplied in advance into the processing chamber 5, and germane may be introduced into the processing chamber 5 slightly later. As a result, at the start of the film growth, the surface of the Si film 13 is exposed to disilane and phosphine to form a boundary layer with good consistency. Thereafter, germane arrives, and the germanium concentration in the film gradually increases. P-doped n-type SiG
This becomes the e-film 14.

Next, the high-concentration P-doped n-type SiGe film 14 and the n-type Si film 13 are selectively patterned by reactive ion etching to expose the base surface 15 (step S12). Next, the mesa etching part 16 is formed by mesa etching (step S13). The collector electrode 17 is formed by a metal vapor deposition method, a metal CVD film forming method, or the like.
The base electrode 18 and the emitter electrode 19 are respectively connected and formed at appropriate places (step S14).

(Example 1) As Example 1, a power transistor having a high current amplification factor was manufactured.

First, a B-doped p-type SiGe film 12 is formed to a thickness of 400 nm on a n-type silicon substrate 11 of 0.01 Ω · cm or less by chemical vapor deposition, and P is doped thereon. An n-type Si film 13 having a thickness of 100 nm and an n-type SiGe film 14 heavily doped with P
Layers were sequentially formed at 0 nm. The semiconductor material gas of the film 12 includes 7.5 atomic% of germane and 100 ppm of diborane,
The remainder used disilane of 4 × 10 ⁻⁴ Torr. Membrane 13
300 ppm of phosphine and 4 ×
Disilane of 10 ^-4 Torr was used. The semiconductor source gas for the film 14 is 5 to 15 atomic% germane and 50 to 1 × 10 ^5.
ppm phosphine PH ₃ and 4 × 10 ⁻⁴ Torr
Was used.

The impurity doping amounts of the films 12, 13 and 14 are 1 × 10 ¹⁷ atom / cm ³ and 8 × 10 ¹⁸ atom / cm ³ , respectively.
³ , 1 × 10 ¹⁹ to 1 × 10 ²¹ atom / cm ³ .

The temperatures of the substrate 11 when the films 12, 13, and 14 were formed were 780 ° C., 750 ° C., and 680 ° C.

The laminate thus manufactured was selectively etched by a reactive ion etching method, and an emitter electrode 19 and a base electrode 18 were formed by a metal deposition method. Thereafter, the substrate 11 was brought into contact with a metal to form a collector electrode 17. This makes the size 5mm x 5mm
An angular power transistor was obtained. When the current gain was measured, results of 10 to 100 were obtained.

Example 2 As Example 2, a transistor having a low contact resistance was manufactured.

First, B-doped p-type silicon is deposited on an n-type silicon substrate 11 of 0.001 Ω · cm by chemical vapor deposition.
Type SiGe film 12 to a thickness of 400 nm, n-type Si film 13 doped with P to a thickness of 500 nm, and n-type SiGe film 14 heavily doped with P to a thickness of 100 nm.
Then, an i-type Si film (not shown) was sequentially formed thereon to a thickness of 5 nm.

The semiconductor raw material gas of the film 12 is 7.5 atomic%.
Of germane and 100 ppm of diborane, 4 × 10 ^-4 To
rr disilane was used. As the semiconductor source gas for the film 13, 300 ppm phosphine of 4 × 10 ⁻⁴ Torr of disilane was used. As the semiconductor source gas for the film 14, 5 to 40 atomic% germane, 1 × 10 ⁴ to 1 × 10 ⁵ ppm of phosphine PH ₃ , and 4 × 10 ⁻⁴ Torr of disilane were used. The semiconductor source gas of the i-type Si film (not shown) is 4 ×
Disilane of 10 ^-4 Torr was used.

The impurity doping amounts of the films 12, 13 and 14 are 1 × 10 ¹⁷ atom / cm ³ and 8 × 10 ¹⁸ atom / cm ³ , respectively.
³ , 1 × 10 ²⁰ to 1 × 10 ²¹ atom / cm ³ .

The temperatures of the substrate 11 when the films 12, 13, 14 and the i-type Si film (not shown) were formed were 780 ° C., 750 ° C., 680 ° C., and 750 ° C., respectively.

The laminate thus manufactured was selectively etched by a reactive ion etching method, and an emitter electrode 19 and a base electrode 18 were formed by a metal deposition method. Thereafter, the substrate 11 was brought into contact with a metal to form a collector electrode 17.

As a result, a transistor having a size of 5 mm × 5 mm was obtained. When the contact resistivity was measured, a result of 10 ⁻³ to 10 ⁻⁶ Ω · cm ² was obtained.

In the above embodiment, an example of a bipolar transistor has been described. However, the present invention is not limited to this and can be similarly applied to other semiconductor devices such as a diode and an IGBT.

[0038]

According to the present invention, high-concentration P-doped n having a uniform doping profile can be eliminated by eliminating the need for high-temperature heat treatment.
A semiconductor device having a type SiGe film and a method of manufacturing the same are provided. A high current amplification factor is selected by using a high-concentration P-doped n-type SiGe film as an emitter. In addition, since high-temperature annealing is not required, the number of steps in the manufacturing process is reduced, and the cost is reduced.

Furthermore, according to the present invention, since the emitter surface layer of the semiconductor device having a high current amplification factor is modified, the contact resistance can be reduced.

[Brief description of the drawings]

FIG. 1 is a diagram showing an outline of a CVD film forming apparatus.

FIG. 2 is a process chart showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 3 is a characteristic diagram showing a doping profile of the semiconductor device according to the embodiment of the present invention.

FIG. 4 is a process chart showing a conventional manufacturing method.

FIG. 5 is a characteristic diagram showing a doping profile of a conventional semiconductor device (transistor).

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... CVD film-forming apparatus, 2 ... Heating table, 3 ... Vacuum container, 5 ... Processing chamber, 6 ... Gas supply port, 7A-7C ... Flow control valve, 8A-8C ... Gas supply source, 9 ... Exhaust port, 11 ... n-type Si substrate (collector), 12 ... p-type SiGe film (base), 13 ... n-type Si film (emitter), 14 ... high concentration P-doped n-type SiGe film (emitter surface layer), 15 ... base exposed surface, 16: Mesa etching part, 17: Collector electrode, 18: Base electrode, 19: Emitter electrode.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI theme coat ゛ (Reference) H01L 29/78 652 H01L 29/72 655 29/78 658E 21/336 29/91 A 21/329 H 29 / 861 F-term (reference) 5F003 BA92 BB01 BB04 BE01 BE90 BF06 BH00 BM01 BP08 BP21 BP31 BP41 BP94 BZ01 5F045 AB01 AB02 AC01 AC19 AD07 AD08 AD09 AD10 AD11 AF03 BB16 CA01 DA52 DA60 EE12 HA13

Claims (12)

[Claims] 1. A first conductivity type Si substrate, and a second conductivity type SiGe laminated on the Si substrate.
And a first conductive type Si layer formed on the SiGe film.
A first-conductivity-type high-concentration P-doped Si layer formed by laminating P on the Si film by P-doping at a high concentration by chemical vapor deposition;
The Ge film and a part of the high-concentration P-doped SiGe film and the Si film are omitted, or the conductivity type of the high-concentration P-doped SiGe film and the Si film is reversed, and the missing or reversed part is A semiconductor device comprising: an electrode formed by bonding metal terminals; and an electrode formed by bonding metal terminals to the high-concentration P-doped SiGe film. 2. The semiconductor device according to claim 1, wherein the P-doped SiGe film has a P concentration of 1 × 10 ¹⁹ atom / cm ³ or more. 3. The semiconductor device according to claim 1, wherein the high-concentration P-doped SiGe film has a thickness of 100 nm or more and 500 nm or less. 4. The semiconductor device according to claim 1, wherein the P concentration of the high-concentration P-doped SiGe film is 1 × 10 ²⁰ atom / cm ³ or more. 5. The semiconductor device according to claim 1, wherein the high-concentration P-doped SiGe film has a thickness of less than 100 nm. 6. An n-type Si substrate is heated in a vacuum-evacuated container, and a first semiconductor raw material gas is supplied into the vacuum container to act on the surface of the substrate, whereby a p-type Si substrate is formed on the substrate.
(A) laminating and forming a n-type SiGe film on the p-type SiGe film by applying a second semiconductor source gas to the surface of the p-type SiGe film under heating; Forming a high concentration P-doped n-type SiGe film on the n-type Si film by causing a third semiconductor source gas to act on the surface of the n-type Si film under heating; (C) performing the high-concentration P-doped n-type SiGe film and the n-type Si
Either a part of the film is missing or the conductivity type of the high-concentration P-doped n-type SiGe film and the n-type Si film is inverted,
An electrode is formed by joining a metal terminal to the missing or inverted portion, and the high-concentration P-doped n-type S
(d) forming an electrode by bonding a metal terminal to the iGe film. 7. In the step (c), the third semiconductor source gas contains 5 to 15 atomic% germane GeH ₄ and 50 to 1 atomic%.
High-concentration P-doped n-type Si having a film thickness of 100 to 500 nm containing × 10 ⁵ ppm phosphine PH ₃ , the balance being disilane Si ₂ H ₆ and having a P concentration of 1 × 10 ¹⁹ atom / cm ³ or more.
7. The method according to claim 6, wherein a Ge film is formed. 8. In the step (c), the third semiconductor source gas is 5 to 40 atomic% germane GeH ₄ and 1 × 10 ⁴
High concentration P-doped n-type Si having a film thickness of 100 nm or less containing １1 × 10 ⁵ ppm phosphine PH ₃ , the balance being disilane Si ₂ H ₆ and a P concentration of 1 × 10 ²⁰ atom / cm ³ or more.
7. The method according to claim 6, wherein a Ge film is formed. 9. In the step (c), the substrate is 620-75.
High concentration P-doped n-type SiG while heating to a temperature range of 0 ° C
7. The method for manufacturing a semiconductor device according to claim 6, wherein an e film is formed. 10. In the step (d), the substrate is 460 to 5
Heated to a temperature in the range of 00 ° C. to form a high concentration P-doped n-type Si
After removing the Ge oxide from the surface of the Ge film, the high concentration P
9. The method of manufacturing a semiconductor device according to claim 6, wherein an electrode is formed on the doped n-type SiGe film. 11. In the step (d), the substrate is 380-4
9. The method for manufacturing a semiconductor device according to claim 6, wherein an electrode is formed on the high-concentration P-doped n-type SiGe film while heating to a temperature in the range of 20 ° C. 12. An i-type Si film having a thickness of 1 to 10 nm is formed on the high-concentration P-doped n-type SiGe film formed in the step (c) by chemical vapor deposition. The method of manufacturing a semiconductor device according to claim 6.