JP2001217886A - Phase shifter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a 90-degree phase shifter that suppresses a phase shift error. SOLUTION: The 90-degree phase shifter that generates two output signals whose phase difference is 90 degrees from an input signal, is provided with a phase shifter 20 that generates two local phase shift signals LoQ', LoI' with a phase difference being output signals from a local signal Lo being an input signal, two flip-flop circuits 11, 12 that receives the respective local phase shifts signals outputted from the phase shifter and outputs phase shift signals whose phase difference is 90-degrees, and a clock supply means 32 that supplies a clock signal CLK with a frequency twice that of the local phase shift signals outputted from the phase shifter to each of the flip-flop circuits. The local phase shift signals are synchronized by using the clock signal to produce the phase shift signals whose phase difference is 90-degrees while suppressing a phase error of the local phase shift signals.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase shifter used in a digital modulation system and a phase shift method thereof, and a mobile communication device such as a mobile radio communication terminal device or a base station device using the same. The phase shift error is suppressed.

[0002]

2. Description of the Related Art A transmitting side of digital mobile communication modulates a transmission signal using a quadrature modulator, and a receiving side demodulates a reception signal using a quadrature demodulator.

FIG. 14 shows a configuration of a quadrature modulator used in a digital mobile communication device or the like, and FIG. 15 shows a configuration of a quadrature demodulator. The quadrature modulator inputs the local signal
Two phase-shifted signals Lo with a phase difference of 90 degrees from Lo
A 90-degree phase shifter 200 for generating I and LoQ; a multiplier 41 for multiplying the input signal I and the phase-shifted signal LoI; a multiplier 42 for multiplying the input signal Q and the phase-shifted signal LoQ; 41 and multiplier 4
And an adder 44 for adding the two outputs.

[0004] The quadrature demodulator is provided with two phase-shifted signals Lo having phases different from each other by 90 degrees from the input local signal Lo.
A 90-degree phase shifter 200 for generating I and LoQ, a multiplier 41 for multiplying the modulation signal MF and the phase shift signal LoI, a multiplier 42 for multiplying the modulation signal MF and the phase shift signal LoQ, and a multiplier Low-pass filters 56 and 55 for removing high-frequency components from the outputs of 41 and 42 are provided.

Quadrature modulator and quadrature demodulator 90-degree phase shifter
200 inputs the local signal Lo and the phase difference between
Two phase shift signals LoI and LoQ of 0 degrees are output. The phase shift signals LoI and LoQ are input to multipliers 41 and 42, respectively.

In the quadrature modulator, the multiplier 41 outputs the phase-shifted signal LoI
And the digital input signal I, and the multiplier 42 multiplies the phase shift signal LoQ by the digital input signal Q. The outputs of the multipliers 41 and 42 are added by the adder 44, and the modulated signal MF
Is generated.

On the other hand, in the quadrature demodulator, a multiplier 41 multiplies the phase shift signal LoI and the modulation signal MF, and a multiplier 42 multiplies the phase shift signal LoQ and the modulation signal MF. Low-pass filters 55 and 56 remove high-frequency components from the outputs of the respective multipliers 41 and 42 to obtain digital signals I and Q.

[0008] The 90-degree phase shifter 200 includes one that performs analog processing and one that performs digital processing.

The RC type phase shifter shown in FIG. 18 performs analog processing. This phase shifter includes a resistor R0 and a capacitor C0 forming a low-pass filter 61, and a resistor R0 forming a high-pass filter 62. R0 and a capacitor C0, and limiter amplifiers 63 and 64 are provided. Low-pass filter 61
And the cutoff frequency of the high-pass filter 62 is 1 / (2
π × C0 × R0). Output of low-pass filter 61
The phase difference between LoI ′ and the output LoQ ′ of the high-pass filter 62 is 90
Degrees. The limiter amplifiers 63 and 64 amplify the outputs LoI 'and LoQ' of the respective filters so that the amplitudes thereof become equal.

When the variation in the constant of the resistor R0 and the capacitor C0 occurs due to the variation of the elements, the cutoff frequency of the low-pass filter 61 and the high-pass filter 62 changes, and the amplitude deviation of the output LoI 'and LoQ' of each filter occurs. . Limiter amplifiers 63 and 64 are designed to reduce this amplitude deviation.
Amplifies the output of each filter to obtain local phase-shifted signals LoI 'and LoQ'.

A flip-flop type phase shifter shown in FIG. 16 performs digital processing. This phase shifter divides a local signal by using flip-flops 22 and 24 and outputs a phase difference. Obtain a 90 degree signal. flip flop
The frequency is divided by 2 at 24 and further divided by 2 at the master-slave flip-flop 22 to obtain local phase shift signals LoI 'and LoQ'.

[0012]

However, the frequency of the local signal Lo may change greatly in digital mobile communication or the like. In the RC phase shifter shown in FIG. 18, the output LoI of the low-pass filter 61 and the high-pass filter 62 is low. ', LoQ' has a large amplitude error, so it is necessary to increase the gain of the limiter amplifier.In such a case, the amplitude error of the filter outputs LoI ', LoQ' is small, but the limiter amplifier 63, 64 There is a problem that phase distortion occurs and the phase difference between the respective filter outputs LoI and LoQ deviates from 90 degrees (a phase shift error occurs).

In the flip-flop type phase shifter of FIG. 16, the local signal Lo has a wider frequency adaptation range than that of the RC type phase shifter.
At 22, the phase difference between the local phase shift signals LoI 'and LoQ' is 90
There is a problem that it is out of order (a phase shift error occurs).

FIG. 17 shows the internal configuration of the master-slave flip-flop 22 shown in FIG. A local phase shift signal LoI ′ is obtained from the output of the latch 222,
Outputs a local phase shift signal LoQ '. The local phase shift signal LoI 'is latched by the local phase shift signal LoI'.
, A delay of one stage occurs between LoI ′ and LoQ ′. This is the cause of the phase shift error.

An RC type phase shifter or a flip-flop type phase shifter which causes the phase shift error is connected to the quadrature modulator 90 shown in FIG.
When used as the phase shifter 200, the local phase shift signal L
Since the phase difference between oI 'and LoQ' deviates from 90 degrees, the image component of the modulation signal MF increases. When this RC type phase shifter or flip-flop type phase shifter is used as the 90-degree phase shifter 200 of the quadrature demodulator in FIG. 15, the phase difference between the local signals LoI ′ and LoQ ′ is from 90 degrees. Because of the deviation, the error rate of the demodulated signal increases.

The present invention solves such a conventional problem, and provides a 90-degree phase shifter in which a phase-shift error is suppressed. It is an object of the present invention to provide a quadrature modulator in which the error rate is improved and a quadrature demodulator in which the error rate is increased.

[0017]

Therefore, according to the present invention, there is provided a 90-degree phase shifter for generating two output signals having a phase difference of 90 degrees from each other from an input signal. A phase shifter for generating two local phase shift signals having a phase difference from each other, and the respective local phase shift signals output from the phase shifter are input to each other,
And two flip-flops for outputting a phase-shifted signal having a phase difference of one degree, and a clock signal having a frequency corresponding to an integer multiple of 2 of the frequency of the local phase-shifted signal output from the phase shifter, to each of the flip-flops And a clock supply means for performing the operation.

Further, in the 90-degree phase shifting method for generating two phase-shifted signals having a phase difference of 90 degrees from the input local signal, the two local phase-shifted signals having a phase difference from the input local signal are converted. By generating and synchronizing this local phase shift signal with a clock signal, a phase shift error of the local phase shift signal is suppressed, and phase shift signals having a phase difference of 90 degrees are generated.

Therefore, the local phase shift signal generated by the phase shifter is input to the flip-flop, and a 90-degree phase shift signal with a reduced phase shift error is obtained from the flip-flop.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) As shown in FIG. 1, a 90-degree phase shifter according to a first embodiment has a local signal.
From the signal generating means 31 for generating Lo and the local signal Lo,
Two local phase-shifted signals LoI ', LoQ' having a phase difference from each other
, A signal generating means 32 for generating a clock signal CLK having a frequency twice the frequency of the local phase signals LoI 'and LoQ', a local phase signal LoQ 'and a clock signal CLK.
And a D flip-flop 11 that outputs the quadrature component LoQ of the 90-degree phase-shifted signal, and the in-phase component LoI of the 90-degree phase-shifted signal that receives the local phase-shifted signal LoI ′ and the inverted clock signal CLK. And a D flip-flop 12 for outputting the same.

The local signal Lo is input from the signal generating means 31 to the phase shifter 20, and the phase shifter 20 outputs two local phase shift signals LoI 'and LoQ' having a phase difference from each other. Since the two local phase shift signals LoI ′ and LoQ ′ include a phase shift error, their phase difference is not 90 degrees.

The local phase shift signals LoI 'and LoQ' are input to D flip-flops 11 and 12, respectively. A clock signal CLK having a frequency fCLK = 2 × f1 ′, which is twice the frequency f1 ′ of the local phase shift signals LoI ′ and LoQ ′, is input to the D flip-flop 11 without inversion.
The clock signal CLK is inverted. Therefore, the local phase shift signal input to the D flip-flop 12
LoI ′ is shaped at the falling timing of the clock signal CLK and output as the phase shift signal LoI, and the local phase shift signal LoQ ′ input to the D flip-flop 11 is
The signal is shaped at the timing of the rising edge of the clock signal CLK and output as the phase shift signal LoQ.

As a result, the phase-shifted signal LoI and the phase-shifted signal LoQ are equal to one-half cycle of the clock signal CLK (1/4 of the phase-shifted signal).
(Phase), that is, as a phase-shifted signal having a phase difference of 90 degrees.

FIG. 12 shows a timing chart of each part of the 90-degree phase shifter of FIG. Here, a is the clock signal CLK, b is the in-phase component LoI 'of the local phase-shifted signal, c is the quadrature component LoQ' of the local phase-shifted signal, d is the in-phase component LoI of the 90-degree phase shifter output signal, and e is Indicates the quadrature component LoQ of the 90 ° phase shifter output signal.

The phase difference between the local phase shift signal LoI 'of b and the local phase shift signal LoQ' of c includes a phase shift error larger than 90 degrees. However, D flip-flops 11, 12
It can be seen from the output of that the phase shift error has disappeared.

As described above, the local phase-shifted signal having the phase difference output from the phase shifter is input to the separate flip-flops, and the clock signal is non-inverted to one of the flip-flops and the clock signal is input to the other. By inverting the signal and inverting the phase shift signal from each flip-flop using this clock signal so that the phase difference between the flip-flops becomes 90 degrees, the 90-degree phase shift signal with the phase shift error suppressed is output. Obtainable.

In the above description, the frequency of the clock signal CLK is twice the frequency of the local phase shift signal.
It may be an integer multiple of.

(Second Embodiment) 90 of the second embodiment
As the phase shifter, as shown in FIG. 2, an RC type phase shifter 21 is used as the phase shifter 20 in FIG. Other configurations are first
There is no difference from the embodiment. The RC type phase shifter 21 has a configuration illustrated in FIG.

The output signal of the RC phase shifter 21 is synchronously output from the D flip-flops 11 and 12 as a phase shift signal having a phase difference of 90 degrees. Therefore, the phase shift error of the RC phase shifter 21 is eliminated, and the frequency range to which the RC phase shifter 21 can be applied is widened.

(Third Embodiment) 90 of the third embodiment
As shown in FIG. 3, the phase shifter uses a phase shifter 22 composed of a master-slave type D flip-flop as the phase shifter 20 in FIG.

In this circuit, the frequency fLo of the local signal Lo generated from the local signal generating means 31 is divided by 2 by the flip-flop type phase shifter 22, so that the frequency fLo of the local signal generating means 31 is reduced. Local phase shift signal Lo
It is twice the frequency f1 'of I' and LoQ '. Other configurations are the same as those of the first embodiment (FIG. 1).

The master-slave type D flip-flop is
As shown in FIG. 17, the D latches are connected in a dependent manner, and the in-phase component LoI ′ and the quadrature component LoI of the local phase-shifted signal are
The orthogonal component LoQ ′ is delayed from Q ′ by the delay amount of the D latch 221.

In this 90-degree phase shifter, as shown in FIG. 3, the local phase shift signal Lo of the flip-flop type phase shifter 22 is used to avoid the delay of the quadrature component LoQ 'of the local phase shift signal.
I 'is input to the D flip-flop 12, and the local phase shift signal
LoQ 'is input to the D flip-flop 11, the clock signal CLK is input non-inverted to the flip-flop 11, the clock signal CLK is input inverted to the flip-flop 12, and the phase difference between each flip-flop is 90. Degree phase shift signal.

(Fourth Embodiment) The 90th embodiment of the fourth embodiment will be described.
The phase shifter is, as shown in FIG. 4, a doubling circuit 23 for doubling the frequency of the local signal Lo generated by the signal generating means 31.
It has. The other configuration is the third embodiment (FIG. 3)
There is no change.

The local signal Lo of the frequency f1 generated by the signal generating means 31 is converted by the doubling circuit 23 into the local signal Lo of the local frequency f1.
The frequency is doubled and input to the flip-flop type phase shifter 22. Therefore, the local frequency f1 of the signal generated by the signal generating means 31 can be made the same as the frequency f1 of the local phase shift signals LoI ′ and loQ ′.

In this 90 degree phase shifter, when the signal generating means 31 is realized by a voltage controlled oscillator, the current consumption of the voltage controlled oscillator can be reduced by lowering the frequency of the generated signal.

(Fifth Embodiment) 90 of the fifth embodiment
The phase shifter uses the output of the doubler circuit 23 as the clock signal CLK of the D flip-flops 11 and 12, as shown in FIG. Other configurations are the same as those of the fourth embodiment (FIG. 4).

In this 90-degree phase shifter, the clock signal CLK of the D flip-flops 11 and 12 is obtained from the output of the doubling circuit 23, so that the clock signal generating means 32 becomes unnecessary, and the circuit can be miniaturized. Becomes possible.

(Sixth Embodiment) The 90th embodiment of the sixth embodiment will be described.
As shown in FIG. 6, the phase shifter includes a D flip-flop 24 for dividing the frequency fLo of the local signal Lo generated by the signal generating means 31 by two. Further, the signal generating means 31
Generates a local signal having a local frequency fLo that is four times the frequency f1 of the local phase-shifted signals LoI ′ and loQ ′, and this local signal is directly (non-inverted) input to the D flip-flops 11 and 12. Other configurations are the same as those of the fifth embodiment (FIG. 5).

In this 90-degree phase shifter, the local signal Lo having a frequency of 4 × f1 generated by the signal generating means 31 is frequency-divided by 2 in a D flip-flop 24, and the local signal having a frequency of 2 × f1 is flip-flop type. Input to the phase shifter 22.

The flip-flop type phase shifter 22 generates local phase shift signals LoI 'and LoQ' having a frequency f1 'from this input signal, and the D flip-flops 11 and 12 generate local phase shift signals.
From LoI ′ and LoQ ′, phase shift signals LoI and LoQ having a phase difference of 90 degrees are generated using a clock signal CLK having a frequency of 4 × f1.

FIG. 13 shows a timing chart of each part of the sixth embodiment. Where a is a clock signal
CLK and b are the outputs of the D flip-flop 24 constituting the frequency divider, c is the in-phase component LoI 'of the local phase shift signal of the flip-flop type phase shifter 22, and d is the flip-flop type phase shifter 22.
Represents the quadrature component LoQ ′ of the local phase shift signal, and e represents the in-phase component LoI of the 90 ° phase shifter output signal, and f represents the quadrature component LoQ of the 90 ° phase shifter output signal.

Since the D flip-flops 11 and 12 synchronize only with the rising edge of the clock signal CLK, they do not depend on the duty ratio of the clock signal CLK. Also,
A clock signal CLK having a frequency of 4 × f1 is applied to a D flip-flop 2
When dividing by 2 by 4, the output after dividing by 2 is the clock signal CLK.
, The output from the D flip-flop 24 is constant regardless of the duty of the clock signal CLK. Therefore, the phase difference between the quadrature component LoQ ′ and the in-phase component LoI ′ of the local phase shift signal of the flip-flop type phase shifter 22 is constant regardless of the duty of the clock signal CLK.

As described above, by setting the frequency of the clock signal CLK to be four times the frequency of the local phase shift signals LoI 'and LoQ' of the phase shifter 22, a 90-degree shift independent of the duty ratio of the clock signal CLK is achieved. A phaser can be realized.

(Seventh Embodiment) 90th Embodiment of the Seventh Embodiment
As shown in FIG. 7, the phase shifter is a quadrupler 24 which quadruples the frequency of the local signal Lo generated by the signal generator 31.
It has. The other configuration is the sixth embodiment (FIG. 6)
There is no change.

The local signal Lo of the frequency f1 generated by the signal generating means 31 is converted into a signal of the local frequency f1 by the quadrupling circuit 24.
The output of the quadruple circuit 24 is input to the D flip-flop 24, and the D flip-flop 11,
Input directly (without inversion) to 12. Other configurations are the same as in the sixth embodiment (FIG. 6).

In the 90-degree phase shifter, the same effect as that of the sixth embodiment can be obtained. In addition, when the signal generating means 31 is realized by a voltage-controlled oscillator, the frequency can be reduced.
The current consumption of the voltage controlled oscillator can be reduced.

(Eighth Embodiment) In the eighth embodiment,
The configuration of the transmission modulator will be described.

As shown in FIG. 8, the transmission modulation section includes a signal generating means 31 for generating a local signal Lo and a signal generating means 32 for generating a clock signal CLK.
90-degree phase shifter 20 that outputs 0-degree phase shift signals LoI and LoQ
0, a first multiplier 41 for multiplying the digital input signal I and the phase shift signal LoI, a second multiplier 42 for multiplying the digital input signal Q and the phase shift signal LoQ, a multiplier 41 and the multiplier 41 An adder 44 for adding the output of the adder 42 and outputting a modulated signal MF;
Signal generating means 33 for generating the local signal Lo2
A third multiplier 51 for multiplying the modulation signal MF by the second local signal Lo2, and an amplifier 52 for amplifying the output of the multiplier 51
And a band-pass filter 53 for removing unnecessary components from the output of the amplifier 52.

In this transmission modulator, the local signal Lo is input from the signal generating means 31 to the 90-degree phase shifter 200, and the clock signal CLK is input from the signal generating means 32 to the 90-degree phase shifter 200. The phase shift signals LoI and LoQ having a phase difference of 90 degrees are output from the 90 degree phase shifter 200.

This phase-shifted signal is input to a first multiplier 41 and a second multiplier 42 constituting a quadrature modulator, and the first multiplier 41 converts the digital input signal I and the phase-shifted signal LoI. The second multiplier 42 multiplies the digital input signal Q and the phase shift signal Lo
Multiply by Q. The signals multiplied by each of the first multiplier 41 and the second multiplier 42 are added by an adder 44 to generate a modulated signal MF. This modulated signal MF is supplied to a third multiplier
The signal is input to 51, is multiplied by the second local signal Lo2, is frequency-converted, and the converted signal is amplified by an amplifier 52, passes through a band-pass filter 53, and generates a transmission modulation signal RF.

The 90-degree phase shifter 200 of such a transmission modulation section
By using the 90-degree phase shifters of the first to seventh embodiments, a transmission modulation signal having a small image component can be obtained. When the 90-degree phase shifters of the fifth to seventh embodiments are used as the 90-degree phase shifters, the signal generation means 32 for the clock signal CLK becomes unnecessary.

(Ninth Embodiment) In the ninth embodiment,
A transmission modulator using a 90-degree phase shifter according to the sixth embodiment (FIG. 6) will be described.

As shown in FIG. 9, this transmission modulation section
6 is provided as the 0-degree phase shifter, and the local signal Lo generated from the signal generation means 31 of the 90-degree phase shifter is used to convert the frequency of the modulation signal MF. .

Assuming that the frequencies of the phase-shifted signals LoI and LoQ output from the 90-degree phase shifter 200 and having a phase difference of 90 degrees are f1, the frequency fLo of the local signal Lo is 4 × f1,
The frequencies of the clock signal CLK and the second local signal Lo2 are also 4 × f1.

Therefore, the frequency of the transmission modulation signal RF is 5 × f1, and the frequency of the second local signal Lo2 is an integral multiple of the frequency of the modulation signal MF, so that spurious components are generated at the frequency interval of the modulation signal. In addition, there is no spurious generated near the transmission frequency, which is a problem in indirect modulation (heterodyne modulation).

Also, the local signal Lo and the clock signal CL
Since the signal generation means for K and the second local signal Lo2 can be shared, it is effective for reducing power consumption and miniaturization.

(Tenth Embodiment) In a tenth embodiment, a configuration of a reception demodulation unit will be described.

As shown in FIG. 10, this reception demodulation unit
A band-pass filter 53 that limits the band of the input signal RF, an amplifier 52 that amplifies the output of the band-pass filter 53, a second signal generation unit 33 that generates a second local signal Lo2,
A third multiplier 51 for multiplying the output of the amplifier 52 by the second local signal Lo2, a band-pass filter 54 for removing unnecessary components from the output of the multiplier 51, and a first multiplier constituting a quadrature demodulator 41, a second multiplier 42, a local signal generator 31, a clock signal generator 32, a 90-degree phase shifter 200, and low-pass filters 55 and 56.

In this receiving / demodulating unit, the input signal RF is band-limited by the band-pass filter 53, amplified by the amplifier 52, and then output by the third multiplier 51 to the second local signal Lo2.
, And is band-limited by the band-pass filter 54 and input to the quadrature demodulator.

The input signal MF input to the quadrature demodulator is
Are multiplied with the phase shift signals LoI and LoQ of the 90-degree phase shifter 200 by the multiplier 41 and the second multiplier 42, respectively, and then only the low-frequency components are extracted by the low-pass filters 55 and 56.
The demodulated signals I and Q are obtained.

The 90-degree phase shifter 200 of such a reception demodulation section
By using the 90-degree phase shifters according to the first to seventh embodiments, it is possible to obtain a received demodulated signal having a low error rate during reception. In the case where the phase shifters of the fifth to seventh embodiments are used as the 90-degree phase shifter, the signal generating means 32 for the clock signal CLK is not required.

(Eleventh Embodiment) In the eleventh embodiment, a reception demodulation unit using the 90-degree phase shifter of the sixth embodiment (FIG. 6) will be described.

As shown in FIG. 11, this reception demodulation unit
It has the configuration of FIG. 6 as a 90-degree phase shifter,
As the second local signal Lo2, the local signal Lo generated from the signal generating means 31 of the 90-degree phase shifter is used.

Assuming that the frequency of the phase-shifted signals LoI and LoQ output from the 90-degree phase shifter 200 and having a phase difference of 90 degrees is f1, the frequency fLo of the local signal Lo is 4 × f1,
The frequencies of the clock signal CLK and the second local signal Lo2 are also 4 × f1.

Therefore, the frequency of the input signal RF is 5 × f1, and
Since the frequency of the second local signal Lo2 is 4 × f1, the frequency of the input signal MF to the quadrature demodulator is f1, and the demodulator can obtain the demodulated signals I and Q.

As described above, since the frequency of the local signal is an integral multiple, spurious does not occur near the demodulated signal. In addition, since the signal generating means for the local signal Lo, the clock signal CLK, and the second local signal Lo2 is one in common, it is effective in reducing the power and reducing the size.

The transmission modulators of the eighth and ninth embodiments,
The reception demodulators of the tenth and eleventh embodiments are applied to a mobile radio communication terminal device, a base station device, and the like to improve the accuracy of mobile communication and reduce the power and size of the device. Can be.

[0069]

As is apparent from the above description, the phase shifter of the present invention can obtain a phase-shifted signal having a phase difference of 90 degrees and containing no phase-shift error. By using this phase shifter, it is possible to obtain a transmission modulator in which an increase in an image component is improved and a reception demodulator in which an error rate is improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a phase shifter according to a first embodiment;

FIG. 2 is a block diagram illustrating a configuration of a phase shifter according to a second embodiment;

FIG. 3 is a block diagram showing a configuration of a phase shifter according to a third embodiment;

FIG. 4 is a block diagram showing a configuration of a phase shifter according to a fourth embodiment;

FIG. 5 is a block diagram showing a configuration of a phase shifter according to a fifth embodiment;

FIG. 6 is a block diagram illustrating a configuration of a phase shifter according to a sixth embodiment;

FIG. 7 is a block diagram illustrating a configuration of a phase shifter according to a seventh embodiment.

FIG. 8 is a block diagram illustrating a configuration of a transmission modulation unit according to an eighth embodiment;

FIG. 9 is a block diagram illustrating a configuration of a transmission modulation unit according to a ninth embodiment;

FIG. 10 is a block diagram illustrating a configuration of a reception demodulation unit according to a tenth embodiment;

FIG. 11 is a block diagram illustrating a configuration of a reception demodulation unit according to an eleventh embodiment;

FIG. 12 is a diagram showing a timing chart of the phase shifter according to the first embodiment;

FIG. 13 is a diagram showing a timing chart of a phase shifter according to a sixth embodiment;

FIG. 14 is a block diagram showing a configuration of a quadrature modulator;

FIG. 15 is a block diagram showing a configuration of a quadrature demodulator;

FIG. 16 is a block diagram showing a configuration of a conventional flip-flop type phase shifter;

FIG. 17 is a block diagram showing a configuration of a master-slave type flip-flop of a conventional flip-flop type phase shifter;

FIG. 18 is a block diagram showing a configuration of a conventional CR type phase shifter.

[Explanation of symbols]

 11, 12, 22, 24 D flip-flop 20 Phase shifter 21 RC phase shifter 23 Doubler 24 Quadrupler 31, 32, 33 Signal generating means 41, 42, 51 Multiplier 44 Adder 52 Amplifier 53, 54 Band-pass filter 55, 56 Low-pass filter 61 Low-pass filter 62 High-pass filter 63, 64 Limiter amplifier 200 90-degree phase shifter 221, 222 D latch

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5J034 AB00 DB03 5J098 AB00 AB01 AB04 AB21 AB25 AB31 AB32 AD03 DA04 5K004 AA05 AA08 FH01 FJ08 FJ17 JJ02

Claims (24)

[Claims] 1. A two phase difference of 90 degrees from an input signal.
A 90-degree phase shifter that generates two output signals; a phase shifter that generates two local phase-shift signals having a phase difference from each other as an output signal from a local signal as an input signal; Two flip-flops which input respective local phase shift signals and output phase shift signals having a phase difference of 90 degrees from each other, and an integer of 2 of the frequency of the local phase shift signal output from the phase shifter Clock supply means for supplying a clock signal having a frequency equivalent to twice to each of the flip-flops. 2. The clock supply means according to claim 1, wherein the clock signal is inverted and input to one of the flip-flops, and is input to the other flip-flop without being inverted. 90-degree phase shifter of Claim. 3. The phase shifter according to claim 1, wherein the clock supply means includes a signal generation means for generating the clock signal. 4. The 90-degree phase shifter according to claim 1, wherein an RC type phase shifter is provided as the phase shifter. 5. The 90-degree phase shifter according to claim 1, wherein the phase shifter includes a flip-flop type phase shifter in which a flip-flop constitutes a frequency divider by 2. 6. The 90-degree phase shifter according to claim 5, further comprising a doubling circuit for doubling a local signal input to the flip-flop type phase shifter. 7. The 90-degree phase shifter according to claim 5, wherein a clock signal is supplied by said clock supply means by inputting an output of said doubler circuit to each of said flip-flops. 8. A divide-by-two frequency divider which divides a local signal input to the flip-flop type phase shifter by 2, and supplies a clock signal by the clock supply means to each of the flip-flops. The 90-degree phase shifter according to claim 5, wherein the non-inverting input is performed. 9. A quadruple circuit for quadrupling a local signal input to the flip-flop type phase shifter, wherein a clock signal is supplied by the clock supply means and an output of the quadruple circuit is output to each of the flip-flops. 6. The 90-degree phase shifter according to claim 5, wherein the phase shift is performed by non-inverting input. 10. A 90-degree phase shifting method for generating two phase-shifted signals having a phase difference of 90 degrees from an input local signal, wherein two local phase-shifted signals having a phase difference from each other are input from the input local signal. By generating and synchronizing the local phase shift signal with a clock signal, a phase shift error of the local phase shift signal is suppressed, and phase shift signals having a phase difference of 90 degrees from each other are generated. 90 degree phase shift method. 11. The 90-degree phase shift method according to claim 10, wherein the frequency fCLK of the clock signal is set to an integer multiple of 2 of the frequency f1 ′ of the local phase shift signal. 12. The frequency of an input signal which is generated by using a flip-flop type phase shifter that forms a frequency divider by a flip-flop and generates the two local phase shift signals, and which is input to the flip-flop type phase shifter Is set to twice the frequency f1 'of the local phase-shifted signal.
2. The 90-degree phase shift method according to 1. 13. The frequency fLo of the local signal is set to be the same as the frequency f1 ′ of the local phase shift signal, and the frequency fLo of the local signal is doubled and input to the flip-flop type phase shifter. The 90-degree phase shift method according to claim 12, characterized in that: 14. The 90-degree phase shifting method according to claim 13, wherein a signal obtained by doubling the frequency fLo of the local signal is used as the clock signal. 15. The frequency fLo of the local signal is set to four times the frequency f1 ′ of the local phase shift signal, and the frequency fLo of the local signal is divided by two and input to the flip-flop type phase shifter. The method according to claim 12, wherein the local signal is used as the clock signal. 16. The frequency fLo of the local signal is set to be the same as the frequency f1 'of the local phase-shifted signal, and the frequency fLo of the local signal is multiplied by 4 and then divided by 2 to obtain the flip-flop type phase shift. 13. The 90-degree phase shift method according to claim 12, wherein the local signal that is input to a mixer and quadrupled is used as the clock signal. 17. A quadrature modulator including two multipliers, a 90-degree phase shifter, and an adder; a first signal generation unit that generates a first local signal input to the quadrature modulator;
A second signal generating means for generating a clock signal input to the quadrature modulator; a third multiplier for multiplying a modulation signal output from the quadrature modulator with a second local signal; A third signal generating means for generating two local signals, an amplifier circuit for amplifying the output of the third multiplier, and a band-pass filter for band-limiting the output of the amplifier circuit. A transmission modulator comprising the 90-degree phase shifter according to claim 1 as a phase shifter. 18. The 90-degree phase shifter according to claim 6, wherein the 90-degree phase shifter has the same frequency as the clock signal, the first local signal, and the second local signal. 18. The transmission modulator according to claim 17, wherein there is one signal generating means for generating a signal. 19. A first band-pass filter for limiting a band of an input signal, an amplifier circuit for amplifying an output of the band-pass filter, and a third circuit for multiplying an output of the amplifier circuit by a second local signal. , A third signal generating means for generating the second local signal, a second band-pass filter for band-limiting an output of the multiplier, and an output of the second band-pass filter. A quadrature demodulator that obtains two demodulated signals by multiplying a phase shift signal output from the 90-degree phase shifter and having a phase difference of 90 degrees, and a first local signal input to the quadrature demodulator , A second signal generating means for generating a clock signal input to the quadrature demodulator, and first and second low-frequency bands for limiting the band of the two demodulated signals. And a pass filter. A reception demodulator comprising the 90-degree phase shifter according to any one of claims 1 to 9 as a degree phase shifter. 20. The 90-degree phase shifter according to claim 6 as the 90-degree phase shifter, wherein the clock signal, the first local signal, and the second local signal have the same frequency,
20. The reception demodulator according to claim 19, wherein there is one signal generation means for generating these signals. 21. A mobile wireless terminal device incorporating the transmission modulator according to claim 17. 22. A mobile wireless terminal device incorporating the reception / demodulation unit according to claim 19. 23. A mobile radio base station device incorporating the transmission modulation unit according to claim 17. 24. A mobile radio base station device incorporating the reception / demodulation unit according to claim 19.