JP2001217250A - Method for manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device that can stably form desired groove depth and can simplify a manufacturing process. SOLUTION: In the method for manufacturing a semiconductor device, a plurality of dielectric films 1-9 are formed on a silicon substrate in multiple steps, a resist pattern 13 is formed ion the dielectric film, and plurality of dielectric film 6-9 are subjected to dry etching with the resist pattern 13 as a mask, thus forming a groove in the dielectric films 6-9, peeling off the resist pattern 13, depositing an Al alloy film in grooves 10a and 10b and on a dielectric 10, and removing the Al alloy film at a flat part on the dielectric film 10. The end point of etching in a process for forming the grooves 10a and 10b is detected by stopping etching with specific count (count four) while counting the change in emission of each of the dielectric films 5-9.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device in which a wiring is formed by using a damascene method.

[0002]

2. Description of the Related Art FIGS. 5 to 8 are sectional views showing an example of a conventional method for manufacturing a semiconductor device. This method of manufacturing a semiconductor device is a method of forming a wiring by using a damascene method.

[0005] First, as shown in FIG. 5, an insulating layer (for example, Si) as a dielectric layer is formed on a silicon substrate (not shown).
After forming the O ₂ layer 21, an etching stop layer 23 is provided on the insulating layer 21. As the etching stop layer 23, a CVD (Chemical Vapor Depositio
An Si ₃ N ₄ layer or a SiON layer deposited by the method n) is used.

Next, an SiO ₂ film 25 is deposited on the etching stop layer 23 by a plasma CVD method. This S
The thickness of the iO ₂ film 25 is substantially the same as the thickness of the wiring to be finally formed. Thereafter, a resist film is applied on the SiO ₂ film 25, and the resist film is exposed and developed to form a resist pattern 27 having the same pattern as the patterns of the wirings 29a and 29b described later.

After that, as shown in FIG.
SiO2 using pattern 27 as a mask _TwoDry film 25
Switch. At this time, the etching stop layer 23
Etching until exposed, this etching stop
Layer 23 acts as an etch stop. to this
From SiO_TwoThe film 25 has a pattern of wirings 29a and 29b to be described later.
The grooves 25a and 25b made of the same pattern as the turns are formed.
Is done.

Next, after the resist pattern 27 is peeled off, as shown in FIG. 7, an Al alloy film 29 is deposited on the SiO ₂ film 25 by sputtering so that the grooves 25a and 25b are completely filled.

[0007] Thereafter, as shown in FIG.
In order to selectively form the Al alloy film 29 only in the area 5b, the flat Al alloy film 29 on the SiO ₂ film 25 is removed by CMP (Chemical Mechanical Polishing). As a result, Al alloy wirings 29a and 29b are formed in the grooves.

[0008]

As described above, in the conventional method of manufacturing a semiconductor device, in order to control the depth of the trenches 25a and 25b for forming wiring, an etching stop layer is formed in the dielectric layer. A groove 23a, 25b having a predetermined depth is formed by stopping the etching at the etching stop layer 23. In a conventional method for manufacturing a semiconductor device, such an etching stop layer 2
Since the step of forming 3 is necessarily required, the number of steps increases accordingly, and the manufacturing process becomes complicated.

As described above, an Si ₃ N ₄ layer or a SiON layer is generally used as a material for the etching stop layer 23, and these materials generally form a dielectric layer (insulating layer 21). Has a higher dielectric constant than the material to be formed. This etching stop layer 23 is formed of an Al alloy wiring 29
Since these are left even after the formation of a and 29b, the parasitic capacitance of the wiring increases.

On the other hand, in order to simplify the process, it is conceivable to form a wiring without forming the etching stop layer 23 described above. In the case of this method, since there is no etching stop layer in the dielectric layer, the depth at which the dielectric layer is etched per unit time is simply calculated from the etching rate, and the etching time is set from the calculated value. , The depth of the groove must be controlled. But,
In this method, the actual etching rate changes depending on factors such as the film quality, the state of the etching apparatus, and the area to be etched. Therefore, it is difficult to stably maintain the accuracy of the groove depth. Therefore, this method cannot be adopted.

The present invention has been made in consideration of the above circumstances, and has as its object to manufacture a semiconductor device capable of stably forming a desired groove depth and simplifying a manufacturing process. It is to provide a method.

[0012]

A method of manufacturing a semiconductor device according to the present invention comprises the steps of forming a plurality of dielectric films on a semiconductor substrate in multiple steps, and forming a resist pattern on the dielectric films. Forming a groove in the dielectric film by dry-etching the plurality of dielectric films using the resist pattern as a mask, removing the resist pattern, and forming a conductive film in the groove and on the dielectric film. A step of depositing a film and a step of performing CMP on the flat conductive film on the dielectric film.
The step of forming the groove, wherein the detection of the end point of the etching is performed by counting the change in the light emission of each dielectric film and stopping the etching at a predetermined count. I do.

According to the method of manufacturing a semiconductor device described above, the step of providing an etching stop layer as in the prior art is not required, so that the number of steps can be reduced accordingly.
The manufacturing process can be simplified. In addition, since the end point of the etching is detected by counting the change in the light emission of each dielectric film and stopping the etching at a predetermined count, the accuracy of the groove depth can be stably maintained.

A method of manufacturing a semiconductor device according to the present invention comprises the steps of forming a plurality of dielectric films on a semiconductor substrate in multiple steps; forming a resist pattern on the dielectric film; Forming a groove in the dielectric film by dry-etching the plurality of dielectric films using the mask as a mask, removing the resist pattern, and depositing a conductive film in the groove and on the dielectric film. Removing the conductive film in the flat portion on the dielectric film by CMP. In the step of forming the groove, the end point of the etching is detected by measuring a change in light emission of each dielectric film, , The average time of the interval between subsequent light emission changes is detected, and the etching is stopped after a certain period of time that is proportional to the average time from the start of etching. It is characterized in.

According to the method of manufacturing a semiconductor device described above, a change in light emission is measured, and then the average time between changes in light emission (ie, the average etching time of the dielectric film formed in one step) is measured. To detect the end point of the etching. For this reason, the influence of the fluctuation of the etching rate can be reduced, and the desired groove depth can be formed stably.

In the method for manufacturing a semiconductor device according to the present invention, it is preferable that the dielectric film is a plasma SiO ₂ film.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIGS. 1 to 4 are sectional views showing a method of manufacturing a semiconductor device according to an embodiment of the present invention. This method of manufacturing a semiconductor device is a method of forming a wiring by using a damascene method.

First, as shown in FIG. 1, an insulating film (for example, a plasma SiO ₂ film) 10 as a dielectric film is formed on a silicon substrate (not shown) by a multi-step film forming apparatus. An apparatus for forming a film in multiple steps has, for example, a plurality of stages in a process chamber,
For example, a plasma CVD apparatus of a type in which a wafer moves each time a film is formed on each stage for a certain period of time. That is,
First to ninth insulating films 1 to 9 are sequentially formed on a silicon substrate in nine steps. The first to ninth insulating films 1 to
It is desirable that the thickness of each of the nine is substantially the same.

Next, a resist film is applied on the insulating layer 10, and the resist film is exposed and developed to form a resist pattern 13 having the same pattern as the patterns of the wirings 15a and 15b to be described later.

Thereafter, as shown in FIG. 2, the sixth to ninth insulating films 6 to 9 are formed using this resist pattern 13 as a mask.
Is dry-etched by a plasma etching apparatus (not shown). At this time, the etched portion emits light, and a change in light emission during etching appears due to a change in film quality caused by forming the film in multiple steps. Therefore,
The change in the light emission is measured and counted, and the etching is stopped at a predetermined count (here, 4 counts). Thereby, the sixth to ninth insulating films 6 to 9 can be etched, and the depth of the groove can be controlled.
Are formed with the same patterns as the patterns of the wirings 15a and 15b to be described later, and grooves 10a and 10b having a desired depth (that is, the thicknesses of the sixth to ninth insulating films) are formed.

That is, when the ninth insulating film 9 is being etched, the first light is emitted from the etched portion, and when the eighth insulating film 8 is being etched, the first light is emitted from the etched portion. Emits a different second light. Therefore, a change in light emission appears when the etching of the eighth insulating film 8 is started after the etching of the ninth insulating film 9 is completed. Similarly, when the seventh insulating film 7 is being etched, third light is emitted from the etched portion,
When the sixth insulating film 6 is being etched, fourth light is emitted from the etched portion. When the fifth insulating film 5 is being etched, the fifth light is emitted from the etched portion.
Light is emitted. Therefore, after the etching of the eighth insulating film 8 is completed, the etching of the seventh insulating film 7 is started, and after the etching of the seventh insulating film 7 is completed, the etching of the sixth insulating film 6 is started. When the etching of the fifth insulating film 5 is started after the completion of the etching, a change in light emission appears. Therefore, by stopping the etching when the fourth light emission change is counted, grooves 10a and 10b having a desired depth are formed in insulating film 10.

As a method of counting a change in light emission, a light detection unit is arranged in a plasma etching apparatus, and the light detection unit detects light emission from an etched portion and its change, and counts the change. Use Further, as a method of detecting the change in light emission at the time of etching with higher sensitivity, it is preferable to emphasize the change in light emission by differentiating data obtained by detecting light emission.

The method of forming the insulating film 10 is as follows.
Although it is only necessary to use an apparatus for forming a film in multiple steps, the first to ninth insulating films 1 to 9 are formed so that a change in light emission can be easily determined.
It is also possible to introduce impurities such as phosphorus, boron, arsenic, nitrogen, etc. into each of the markings. Such a film is formed at a certain timing during film formation in each step.
Phosphine, diborane, arsine, ammonia, nitrous oxide, etc. are added to the process gas in an amount of 0. It can be formed by adding several to several percent. Alternatively, a method of forming insulating films 1 to 9 having different densities from each other can be used. Such a film can be formed by changing the RF power applied at the time of film formation in each step.

Next, after the resist pattern 13 is peeled off, as shown in FIG. 3, an Al alloy film 15 is deposited on the insulating film 10 by sputtering so as to completely fill the grooves 10a and 10b.

Then, as shown in FIG. 4, the grooves 10a, 1
In order to selectively form the Al alloy film 15 only in the region 0b, the flat Al alloy film 1 on the insulating film 10 is formed by CMP.
5 is removed. Thereby, the Al alloy wiring 15 is formed in the groove.
a, 15b are formed.

According to the above-described embodiment, there is no need to provide a step of providing an etching stop layer as a means for controlling the depth of a groove for forming a wiring as in the conventional method of manufacturing a semiconductor device. Therefore, the number of steps can be reduced accordingly, and the manufacturing steps can be simplified. Further, since the etching stop layer is not used, an increase in the parasitic capacitance of the wiring can be suppressed.

Further, in this embodiment, the accuracy of the depth of the groove can be stably maintained as compared with the method of controlling the depth of the groove by controlling the etching time. Further, by repeating the photolithography process, grooves having different depths can be formed with high accuracy.

The present invention is not limited to the above embodiment, but can be implemented with various modifications. For example,
In the present embodiment, the Al alloy film 15 is deposited on the insulating film 10 by sputtering to form the Al alloy wiring 1.
Although 5a and 15b are formed, it is also possible to form a Cu alloy wiring by depositing a Cu alloy film on the insulating film 10.

In this embodiment, nine insulating films 1 to 9 are formed on the silicon substrate in nine steps, but eight or less or ten or more steps are formed on the silicon substrate in eight or less steps. The above insulating film can be formed.

In the present embodiment, the top four insulating films (sixth to ninth) are formed using the resist pattern 13 as a mask.
Although the insulating films 6 to 9) are dry-etched, it is also possible to dry-etch three or less or five or more insulating films from above using the resist pattern as a mask.

Next, another method of detecting an end point when etching an insulating film as a dielectric layer in the above embodiment will be described. That is, another method of detecting the end point when the sixth to ninth insulating films 6 to 9 are dry-etched by the plasma etching apparatus using the resist pattern 13 as a mask will be described.

A change in light emission at the time of etching caused by a change in film quality caused by forming a film in multiple steps is measured, and a change in a certain light emission is measured. After the detection, the etching is stopped after a certain period of time that is proportional to the average time from the start of the etching.

That is, from the change in light emission that occurs at the start of the etching of the eighth insulating film 8 after the end of the etching of the ninth insulating film 9, it is determined at the start of the etching of the sixth insulating film 6 after the completion of the etching of the seventh insulating film 7. The average etching time of the insulating film formed in one step is calculated by multiplying the time until the change of the generated light emission by ２. Here, groove 1
Since the etching is stopped in a state where the fifth insulating film is exposed at the bottoms of Oa and 10b, the etching is stopped after a lapse of time four times the average etching time from the start of the etching. Thus, the sixth to ninth insulating films 6 to 9 can be etched, and the etching can be stopped in a state where the fifth insulating film 5 is exposed at the bottom of the groove.

According to the above-mentioned other end point detection method, a change in a certain light emission is measured, and then the average time between changes in the light emission (ie, the average etching time of the insulating film formed in one step) is measured. To detect the end point of the etching.
For this reason, the influence of the fluctuation of the etching rate can be reduced, and a groove having a specific depth can be formed stably.

In the other end point detection method, even if an unstable film is formed at the start of the formation of the dielectric film, the average etching time of the dielectric film formed in one step can be reduced. By performing the measurement, the end point of the etching can be stably detected.

[0037]

As described above, according to the present invention, the end point of the etching is detected by counting the change in light emission of each dielectric film and stopping the etching at a predetermined count. In addition, an end point of etching is detected by measuring a change in a certain light emission and then measuring an average time between changes in the light emission thereafter. Therefore, it is possible to provide a method of manufacturing a semiconductor device in which a desired groove depth can be formed stably and the manufacturing process can be simplified.

[Brief description of the drawings]

FIG. 1 is a sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the embodiment of the present invention, showing a step subsequent to FIG. 1;

FIG. 3 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the embodiment of the present invention, showing a step subsequent to FIG. 2;

FIG. 4 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the embodiment of the present invention, which shows the step subsequent to FIG. 3;

FIG. 5 is a cross-sectional view illustrating an example of a conventional method for manufacturing a semiconductor device.

FIG. 6 is a cross-sectional view showing an example of a conventional method for manufacturing a semiconductor device, and is a cross-sectional view showing a step subsequent to that of FIG.

7 is a cross-sectional view showing an example of a conventional method for manufacturing a semiconductor device, and is a cross-sectional view showing a step subsequent to that of FIG.

8 is a cross-sectional view illustrating an example of a conventional method for manufacturing a semiconductor device, and is a cross-sectional view illustrating a step subsequent to that of FIG.

[Explanation of symbols]

1-9 First to Ninth Insulating Film 10 Insulating Film (Plasma SiO ₂ Film) 10a, 10b Groove 13 Resist Pattern 15 Al Alloy Film 15a, 15b Al Alloy Wiring 21 Insulating Layer (SiO ₂ Layer) 23 Etching Stop Layer 25 SiO ₂ film 25a, 25b Groove 27 Resist pattern 29 Al alloy film 29a, 29b Al alloy wiring

Claims (3)

[Claims] A step of forming a plurality of dielectric films on a semiconductor substrate in multiple steps; a step of forming a resist pattern on the dielectric film; and forming a plurality of dielectric films using the resist pattern as a mask. Forming a groove in the dielectric film by dry etching, removing the resist pattern, depositing a conductive film in the groove and on the dielectric film, and forming a flat portion on the dielectric film. Removing the conductive film by CMP. In the step of forming the groove, the end point of the etching is detected by counting a change in light emission of each dielectric film and stopping the etching at a predetermined count. A method for manufacturing a semiconductor device, comprising: A step of forming a plurality of dielectric films on the semiconductor substrate in multiple steps; a step of forming a resist pattern on the dielectric film; and a step of forming a plurality of dielectric films using the resist pattern as a mask. Forming a groove in the dielectric film by dry etching, removing the resist pattern, depositing a conductive film in the groove and on the dielectric film, and forming a flat portion on the dielectric film. Removing the conductive film by CMP; and detecting the end point of the etching in the step of forming the groove by measuring a change in light emission of each dielectric film, measuring a change in light emission, and thereafter Detecting the average time of the light emission change interval, and stopping the etching after a lapse of a certain time proportional to the average time from the start of the etching. Production method. 3. The method for manufacturing a semiconductor device according to claim 1, wherein said dielectric film is a plasma SiO ₂ film.