JP2001196687A - Semiconductor laser control circuit and laser light source - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor laser control circuit that can accurately control the peak, bottom, and bias in modulation light intensity to a specific light power even if the frequency characteristics of a photo detector for monitoring high-speed modulation light are insufficient. SOLUTION: The weighted mean of the peak, bottom, and bias in the output of a photo detector 2, and that of the peak and bottom in the section of a multi-pulse are detected. Based on the weighted means, the peak and bottom of monitored light are obtained by an arithmetic circuit, and the output light intensity of a semiconductor laser is controlled to a target.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor laser control circuit for adjusting a laser power at each level to a target value when output modulation of laser light is performed between multiple levels.

[0002]

2. Description of the Related Art Phase-change recording media and magneto-optical recording media are known as recording media on which information or data can be optically rewritten.

When writing information on a phase change recording medium,
The focused laser beam is applied to the recording film of the recording medium to heat and melt the recording film. Since the ultimate temperature of the recording film and the cooling process differ according to the level of the intensity of the laser light, it is possible to locally change the optical characteristics (such as the refractive index) of the recording film by modulating the intensity of the laser light. is there. More specifically, when the intensity of the laser light exceeds a predetermined level, the irradiated portion of the recording film rapidly cools from a high temperature state and becomes amorphous. On the other hand, when the laser light is relatively weak, the irradiated portion of the recording film gradually cools from a medium to high temperature state, and thus crystallizes. The amorphous portion of the recording film is called a “mark”, and the crystallized portion is called a “space”. The mark and the space have different optical characteristics such as a refractive index. It is possible to store binary information by arrangement of marks and spaces.

When reproducing recorded information from a phase change recording medium, a laser beam (reproducing light) that is weak enough to cause no phase change in the recording film is applied to the recording film, and the reflected light is detected.
An amorphous mark portion has a relatively low reflectance, and a crystallized space portion has a relatively high reflectance.
Therefore, if a difference in light amount between the reflected light from the mark and the reflected light from the space is detected, a reproduced signal can be obtained.

As information recording systems, there are a pulse position modulation system (PPM) and a pulse width modulation system (PWM). Recording by the pulse width modulation method is also called mark edge recording.

In PPM recording, relatively short marks having a constant pulse width are recorded with spaces of various lengths, and recording information is assigned to the positions of the marks. On the other hand, in the PWM recording, marks of various lengths are recorded with spaces of various lengths, and recording information is assigned to both the mark length and the space length. Generally, adopting PWM can increase information recording density rather than using PPM.

When performing the PWM recording, a mark longer than that of the PPM recording is recorded. When a long mark is recorded on a phase change recording medium, the width of the mark may be non-uniform due to the heat storage / radiation effect of the recording film and the variety of recording sensitivity. Further, it is known that if the recording film is continuously irradiated with continuous recording light to form one long mark, heat is excessively accumulated in the latter half of the long mark, and the mark width is widened. For this reason, even when one mark is formed, a method (write strategy) in which the recording light is composed of a plurality of shorter pulses is employed. Such a method of forming each mark using a plurality of pulses and a recording / reproducing apparatus are disclosed in, for example, US Pat. No. 5,490,126 and US Pat. No. 5,636,194.

In order to write data to a recording medium without error, it is necessary to maintain the intensity of the laser beam applied to the recording medium at an appropriate level. Such an appropriate level differs depending on the type of the recording medium, but after the recording medium is inserted into the recording / reproducing apparatus, the laser beam intensity is automatically optimized. However, in order to maintain the laser light intensity at the optimum level obtained in this way, the intensity of the laser light is constantly or regularly monitored, and a laser light source (semiconductor laser) is used so that the light intensity does not shift from the target level. Needs to be controlled.

Hereinafter, a conventional semiconductor laser control circuit will be described with reference to FIGS. 9 and 10 (a) to 10 (h).

FIG. 9 shows a configuration of a conventional semiconductor laser control circuit. This control circuit controls the current for driving the semiconductor laser 1 and allows the semiconductor laser 1 to emit a laser beam having a pulse waveform as shown in FIG.

The intensity (power level) of the laser light emitted from the semiconductor laser 1 is converted into a current signal by the monitoring photodetector 2. This current signal is then converted by the current-voltage converter 3 into a voltage signal. The voltage signal is input to the peak value detector 4, the bottom value detector 5, and the sample and hold circuit 6 shown in FIG.

The peak value detector 4 detects the envelope of the peak value level in the waveform of the input voltage signal, and the bottom value detector 5 detects the envelope of the bottom value level. The sample hold circuit 6 detects a bias value level of the laser light.

The outputs of the peak value detector 4, the bottom value detector 5, and the sample hold circuit 6 are input to a peak value current control means 7, a bottom value current control means 12, and a bias value current control means 17, respectively. You.

The peak value current control means 7 compares the output from the peak value detection circuit 4 with a predetermined reference peak value voltage 8, and controls the value of the current flowing from the peak value current source 9. This current is supplied to the semiconductor laser 1 via a switch 11 that opens and closes according to the peak value modulation signal 10 shown in FIG.

The bottom value current control means 12 compares the output from the bottom value detection circuit 5 with a predetermined reference peak voltage 13 to control the value of the current flowing from the bottom value current source 14. This current is supplied to the semiconductor laser 1 via the switch 16 that opens and closes according to the bottom value modulation signal 15 shown in FIG.

The bias value current control means 17 compares the output from the bias value sample / hold circuit 6 with a predetermined reference bias value voltage 18 and controls the value of the current flowing out of the bias value current source 19. This current is shown in FIG.
It is supplied to the semiconductor laser 1 via a switch 21 that opens and closes according to the bias value modulation signal 20 shown in (c).

The peak value current source 9, the bottom value current source 14,
The semiconductor laser 1 is driven by a combination of the current supplied to the semiconductor laser from the bias value current source 19 and emits a laser beam having a waveform modulated between three levels as shown in FIG. .

[0018]

According to the above control circuit, when the clock frequency of the modulation signal becomes high, the peak value and the bottom value of the modulated optical pulse waveform cannot be accurately detected, and the peak value and the bottom value of the optical pulse are not detected. There is a problem that the values deviate from the respective target values. Hereinafter, this problem will be described.

An optical head used in an ordinary optical disk recording apparatus does not include a photodetector capable of responding at an extremely high speed from the viewpoint of cost. Therefore, in the case of a photodetector used in an ordinary optical disc recording apparatus, it becomes difficult to secure a frequency characteristic capable of faithfully detecting a modulated optical pulse waveform at the time of recording when the clock frequency of the modulation signal becomes higher. Come.

Generally, in order to improve the frequency characteristics of the photodetector 2, an expensive photodetector having excellent frequency characteristics is used, and laser light to be monitored is focused on the photodetector. There is a need. However, the frequency characteristics of a photodetector used in an ordinary optical disk recording device are not sufficient.

When the frequency characteristics of the photodetector 2 are insufficient, the laser beam intensity is detected by the photodetector 2 and is converted into a signal having a waveform as shown in FIG. Output from the container 2. More precisely, FIG. 10F shows the waveform of the voltage signal output from the current-to-voltage converter 3, but the signal waveform is substantially the same before and after the current-to-voltage converter 3. It is.

As can be seen by comparing FIGS. 10D and 10F, the output waveform of the photodetector 2 does not accurately reproduce the intensity waveform of the laser light, and the intensity waveform of the laser light is blunted. It has a different shape.

When peak detection is performed on such an output waveform, the peak value obtained is at the level shown in FIG. On the other hand, when bottom detection is performed on the output waveform, the obtained bottom value is at the level shown in FIG.
Here, FIG. 10E shows the output of the peak value detection circuit 4, and FIG. 10G shows the output of the bottom value detection circuit 5.

If the photodetector 2 has the frequency characteristics necessary to faithfully reproduce the waveform shown in FIG. 10D, the peak detection output at level 23 and the level 2
4 is obtained. In other words, the level difference between the peak value and the bottom value should have the magnitude indicated by reference numeral “25” if the frequency characteristics of the photodetector 2 are sufficient, but in reality, the photodetector 2 Since the frequency characteristic of No. 2 is insufficient, it is determined to have a relatively small size as indicated by reference numeral “26”.

When the signal at the level shown in FIG. 10E is input to the peak value current control means 7, it is erroneously recognized that a peak value smaller than the actual peak value 23 of the light pulse is detected. As a result, the control is performed so as to increase the peak value, so that the peak value of the modulated light pulse after the power control becomes larger than the reference peak value 27 as shown in FIG. Here, FIG. 10H shows the intensity waveform of the laser light after the power level control of the laser light is performed using the control circuit.

On the other hand, when the signal at the level shown in FIG. 10 (g) is input to the bottom value current control means 12, it is erroneously recognized that a bottom value larger than the bottom value 24 of the light pulse is actually detected. As a result, since the control is performed so as to lower the bottom value, the bottom value of the modulated light pulse after the power control becomes smaller than the reference bottom value 28 as shown in FIG.

As described above, when the clock frequency of the modulation signal is increased, the frequency characteristics of the photodetector become insufficient.
The peak value and the bottom value of the modulated light pulse waveform cannot be accurately detected. This makes it difficult to accurately control the semiconductor laser, and causes a problem that the fluctuation or error of the peak value and the bottom value of the light pulse is increased.

The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to set a peak value and a bottom value of an optical pulse to a predetermined value even if the frequency characteristics of the photodetector are insufficient. An object of the present invention is to provide a semiconductor laser control circuit that can accurately control a level.

[0029]

A semiconductor laser control circuit according to the present invention has a first level and a second level lower than the first level.
A semiconductor laser control circuit capable of modulating light intensity between a plurality of set levels including a first level and a third level lower than the first level and higher than the second level; A circuit for generating a first signal based on the light intensity actually detected by the photodetector during a first period during which the light intensity is to be modulated between two levels and a third level; A circuit for generating a second signal based on the light intensity actually detected by the photodetector during a second period in which the light intensity of the laser light is to be modulated between the first and second levels; The light intensity of the light is the third
A circuit for generating a third signal based on the light intensity actually detected by the photodetector during a third period to be at a level, and calculating based on the first to third signals,
An arithmetic circuit for obtaining the first level light intensity and the second level light intensity; and adjusting the light intensity based on an output of the arithmetic circuit.

In a preferred embodiment, the first signal represents a probability of occurrence of a laser beam having a first level light intensity x actually detected by the photodetector during the first period as a, A value represented by ax + by + cE = M ₁ is shown where b is the probability of occurrence of a laser beam having a light intensity y of two levels and c is the probability of occurrence of a laser beam having a light intensity E of a third level.

In a preferred embodiment, the second signal has a probability of occurrence of a laser beam having a first level light intensity x actually detected by the photodetector during the second period as d, A value represented by dx + ey = M ₂ is shown where e is the occurrence probability of a laser beam having two levels of light intensity y.

In one preferred embodiment, the third
Indicates the third level light intensity E actually detected by the photodetector during the third period.

In one preferred embodiment, the first
Receiving the output of the photodetector and generating a signal corresponding to a weighted average of the output within the first period as the first signal.

In one preferred embodiment, the first
Has a first low-pass filter having a selected cut-off frequency.

In one preferred embodiment, the first
Has a sample-and-hold circuit that holds the output of the first low-pass filter at a selected timing.

In one preferred embodiment, the second
Receiving the output of the photodetector and generating a signal corresponding to a weighted average of the output within the second period as the second signal.

In one preferred embodiment, the second
Has a second low-pass filter having a selected cut-off frequency, and a sample-and-hold circuit for holding the output of the second low-pass filter at a selected timing.

In one preferred embodiment, the third
Has a sample-and-hold circuit that holds the output of the photodetector at a selected timing.

In one preferred embodiment, the second
Has a second low-pass filter having a selected cut-off frequency, and a peak-hold circuit that holds a peak value at an output of the second low-pass filter for a selected period. .

In a preferred embodiment, a band rejection filter is provided before the second low-pass filter.

In a preferred embodiment, a full-wave rectifier is provided before the second low-pass filter.

Another semiconductor laser control circuit according to the present invention is a semiconductor laser control circuit capable of modulating light intensity between a first level and a second level lower than the first level. A circuit for generating a signal indicating a weighted average of the light intensity actually detected by the photodetector during a period in which the light intensity is to be modulated between one level and the second level;
A circuit for generating a signal indicating the light intensity actually detected by the photodetector during a period when the light intensity should be at the second level; and calculating the first level light intensity by calculation based on the two signals. And a light intensity of the laser beam is adjusted based on an output of the operation circuit.

In a preferred embodiment, the signal indicating the weighted average is a signal which is actually detected by the photodetector during a period in which light intensity is to be modulated between the first level and the second level. When the probability of occurrence of a laser beam having a light intensity x of one level is d and the probability of occurrence of a laser beam having a light intensity y of a second level is e, dx + ey = M
Indicates the value represented by ₂ .

In a preferred embodiment, the circuit for generating the signal indicating the weighted average includes a low-pass filter having a selected cut-off frequency, and a sample-and-hold circuit for holding the output of the low-pass filter at a selected timing. Have.

In a preferred embodiment, the circuit for generating a signal indicating the light intensity actually detected by the photodetector during the period when the light intensity should be at the second level selects the output of the photodetector. And a sample-and-hold circuit for holding at the set timing.

A laser light source according to the present invention includes any one of the semiconductor laser control circuits described above, and a semiconductor laser driven by the control circuit.

An apparatus according to the present invention includes any one of the semiconductor laser control circuits, a semiconductor laser driven by the control circuit, and an optical system that irradiates a laser beam emitted from the semiconductor laser to a recording medium. ing.

In a preferred embodiment, the apparatus includes a circuit for reproducing information recorded on the recording medium.

[0049]

(Embodiment 1) Hereinafter, a first embodiment of a semiconductor laser control circuit according to the present invention will be described with reference to FIGS. 1 and 2A to 2J.

The semiconductor laser control circuit according to the present embodiment controls the drive current of the semiconductor laser to reduce the intensity of light emitted from the semiconductor laser to a first level (peak value level) and a second level (bottom value level). , And a third level (bias value level). Note that the bottom value level is set lower than the peak value level, the bias value level is set lower than the peak value level, and higher than the bottom value level. The waveform of the output light intensity of the semiconductor laser 1 is shown in FIG.
In FIG. 2D, a period during which the light intensity is modulated between a peak value level and a bottom value level for writing a mark (a period during which the multi-pulse portion 45 is generated), and
A certain period including a period in which the light intensity is held at the bias value level for data erasing is shown. In a period during which the light intensity is modulated between the peak value level and the bottom value level, a mark having a length corresponding to the period is written on the recording medium. On the other hand, during the period when the light intensity is maintained at the bias value level, the mark recorded on the recording medium is erased.

In a sufficiently long period including the above two types of periods, the light intensity is modulated between three set levels including a peak value level, a bottom value level, and a bias value level. In this specification, this sufficiently long period is referred to as a “first period”, a period during which a mark is written on a recording medium is referred to as a “second period”, and a period during which a mark on the recording medium is erased is referred to as a “third period”. Period ”.

The semiconductor laser control circuit according to the present embodiment includes a circuit A for generating a first signal based on a laser beam intensity actually detected by the photodetector 2 during a first period,
A circuit B1 for generating a second signal based on the laser light intensity actually detected by the photodetector 2 during the period
And a circuit C for generating a third signal based on the laser light intensity actually detected by the photodetector 2 during the period.

In the present embodiment, the peak value level and the bottom value laser beam intensity are obtained by the arithmetic processor 34 based on the first to third signals, and the laser beam intensity is determined based on the output of the arithmetic processor 34. Adjust

Hereinafter, the configuration of the semiconductor laser control circuit will be described in more detail.

The photodetector 2 including a photodiode (PD) receives a part of the laser light emitted from the semiconductor laser 1 and generates a current signal according to the intensity. Preferably, a strong laser beam emitted from one end surface of the semiconductor laser 1 is irradiated on the recording medium, and a weak laser beam (monitor light) emitted from the opposite end surface is irradiated on the light receiving surface of the photodetector 2. Placed in

The current-voltage converter (IV) 3 converts the current signal output from the photodetector 2 into a voltage signal. The voltage signal has the same waveform as the waveform of the current signal output from the photodetector 2, and its shape is shown in FIG. The voltage signal follows the response characteristic of the photodetector 2,
The laser light output waveform shown in FIG.

In the present embodiment, a peak value level and a bottom value level in the intensity of the modulated laser light are obtained from this voltage waveform by using a method different from that of the prior art. The driving of the semiconductor laser can be controlled so as to approach the level.

The voltage signal output from the current-voltage converter 3 is input in parallel to the circuits A, B1, and C as shown in FIG.

The circuit A includes a first low-pass filter (LP
1) 30 and first sample hold (S / H1) circuit 3
2 is provided.

The low-pass filter 30 receives the output of the current-to-voltage converter 3 and transmits frequency components below a predetermined frequency (cutoff frequency) and attenuates high frequency components exceeding the cutoff frequency. As a result, the low-pass filter 30 outputs a signal in which the high-frequency component of the input signal is suppressed.

The sample and hold circuit 32 has a function of sampling the signal output from the low-pass filter 30 for a relatively short period of time, and then holding the signal at the sampled value for a relatively long period of time. . The sample hold circuit 32 executes signal sampling at a timing (average value detection timing) at which the output of the low-pass filter 30 is stabilized and converges to a specific value (a value obtained by averaging the input signal). The output of the sample and hold circuit 32 is a weighted average value M of the output of the photodetector 2 during the first period.
1 and the first AD converter (AD1) 33
And converted into a digital signal M1. The digital signal M1 is input to the arithmetic processor 34. Sampling by the sample and hold circuit 32 is performed by S / S (not shown).
Timing signal 31 generated by H timing generation circuit
This is executed when (FIG. 2G) is input to the sample hold circuit 32. The S / H timing generation circuit operates based on a signal transmitted from a recording pulse generator (not shown). The recording pulse generator, based on the output of the modulator that encodes the data to be recorded,
It has a function of generating the signal shown in (c).

As described above, the cut-off frequency of the first low-pass filter 30 is obtained by smoothing the peak value, the bottom value, and the bias value of the input voltage signal, and converting the signal having the magnitude corresponding to the weighted average value M1 thereof. Selected to output. Specifically, it is determined as follows.

If the width of one pulse included in the multi-pulse portion 45 is T seconds, the first low-pass filter 30
Cutoff frequency fc ₁ of, for example, 1 / (100T) ~1 /
(50T). In the present embodiment, since the order of T = 40 ns, the cut-off frequency fc ₁ of the first low-pass filter 30 250~500k
Hz.

The circuit B1 includes a second low-pass filter (L
P2) 35 and second sample hold circuit (S / H2)
36. The low-pass filter 35 has a current
It receives the output of the voltage converter 3 and outputs a signal in which frequency components higher than a preset frequency are suppressed. The sample hold circuit 36 has a function of sampling the signal output from the low-pass filter 35 for a relatively short period of time, and then holding the signal at the sampled value for a relatively long period of time. Sample hold circuit 3
6 executes signal sampling at a timing when the output of the low-pass filter 35 is stabilized and converges to a specific value (average value detection timing). Sample hold circuit 3
The sampling by 6 is executed when the timing signal 37 (FIG. 2 (i)) generated by the S / H timing generation circuit is input to the sample hold circuit 36. The output of the sample and hold circuit 36 represents the weighted average value M2 of the output of the photodetector 2 in the second period, and is input to the second AD converter (AD2) 38.
It is converted to a digital signal M2. This digital signal M2
Is also input to the arithmetic processor 34.

In the second period, as shown in FIG.
Pulse repetition part of the same cycle (multi-pulse part 4
This corresponds to period 5). Second low-pass filter 3
The cutoff frequency of 5 is selected such that its output indicates the weighted average M2 of the multipulse portion 45. The cut-off frequency fc ₂ of the second low-pass filter 35 is, for example, １ ／ T
Set to about.

The circuit C includes a third sample / hold (S / H3) circuit 39 for sampling and holding the voltage signal output from the current-voltage converter 3. The third sample and hold circuit 39 executes the sample and hold at a timing (bias value detection timing) at which the bias value level of the light intensity is stabilized and converges to a specific value (bias value). The sampling by the sample hold circuit 39 is executed when the timing signal 40 (FIG. 22 (j)) generated by the S / H timing generation circuit is input to the sample hold circuit 39.
The output of the third sample and hold circuit 39 is
Represents the value E of the output in the third period. The output of the third sample-and-hold circuit 39 is input to a third AD converter 40 (AD3) and is converted into a digital signal E. This digital signal E is also input to the arithmetic processor 34.

If noise and the like are removed from the output of the third sample and hold circuit 39 and the output is stabilized, a more accurate bias value level can be obtained. For this purpose,
A band-limiting filter such as a low-pass filter may be inserted before the third sample-and-hold circuit 39.

Further, the data inputted from the first AD converter 33, the second AD converter 38, and the third AD converter 41 to the arithmetic processor 34 may be appropriately corrected in the arithmetic processor. By correcting such data, it is possible to compensate for the offset voltage of the low-pass filter and the sample-and-hold circuit, and to reduce the bad influence of their frequency characteristics. Further, it is also possible to remove the influence of the residual ripple of the output waveform.

The arithmetic processor 34 in the present embodiment
Is composed of a digital signal processor (DSP) that performs arithmetic processing on digital data in accordance with a pre-recorded program. From the above three types of input data, a peak current value Ip to be supplied to the semiconductor laser 1 and a bottom current value Current value Ib and bias current value Ie
And outputs respective current data.

The data of the peak current value Ip output from the arithmetic processor 34 is input to the first DA converter 42 and converted into an analog current value. The peak current value Ip is supplied to the semiconductor laser 1 via a first switch 11 that opens and closes according to the peak value modulation signal 10.

The data of the bottom current value Ib output from the arithmetic processor 34 is input to the second DA converter 43 and is converted into an analog current value. The bottom current value Ib is supplied to the semiconductor laser 1 via a second switch 16 that opens and closes according to the bottom value modulation signal 15.

The data of the bias current value Ie output from the arithmetic processor 34 is input to the third DA converter 44 and converted into an analog current value. Then, the semiconductor laser 1 is input to the third switch 21 and switched to a pulse current to drive the semiconductor laser 1 in the same manner. The third bias current value Ie is opened and closed according to the bias value modulation signal 20.
The power is supplied to the semiconductor laser 1 via the switch 21.

Next, the operation of the circuit of FIG. 1 will be described in detail with reference to FIGS. 2 (a) to 2 (j).

FIG. 2A shows “Low” level and “Hi” level.
gh ”level, peak value modulation signal waveform 1
0 is shown. When the peak value modulation signal waveform 10 is “Hig
When the switch is at the “h” level, the switch 11 of FIG. 1 is closed, and a current defining the peak value level is supplied to the semiconductor laser 1 through the switch 11.

FIG. 2B shows a bottom value modulation signal waveform 15 which originally changes between a “Low” level and a “High” level. In FIG. 2B, "high"
The state at the level is shown. The bottom value modulation signal waveform 15 becomes “High” level at the timing of driving the optical pulse to a power level equal to or higher than the bottom value power level. When the bottom value modulation signal waveform 15 is at the “High” level,
The switch 16 in FIG. 1 is closed, and a current defining the bottom value level is supplied to the semiconductor laser 1 through the switch 16. The bottom value modulation signal waveform 15 is at the “High” level in the information writing mode, and is at the “Low” level in the reading mode.

FIG. 2C shows the “Low” level and the “Hi” level.
gh ”level and a bias value modulation signal waveform 20 changing between the levels. When the bias value modulation signal waveform 20 is "H"
When the switch 21 is at the "high" level, the switch 21 of FIG.
1 to the semiconductor laser 1. The bias value modulation signal waveform 20 has a peak value modulation signal waveform 10 of “Lo”.
Only when it is at the "w" level is it at the "High" level.
Also, only when the bias value modulation signal waveform 20 is at the “Low” level, the peak value modulation signal waveform 10 becomes “High”.
h ”level.

FIG. 2D shows an output light waveform of the semiconductor laser 1 driven by a combination of such three types of modulation signals.

FIG. 2E shows a voltage waveform output from the current-voltage converter 3. This voltage waveform has a shape in which the actual output light waveform is blunted according to the response characteristics of the photodetector 2. In FIG. 2E, the level indicated by reference numeral “47” corresponds to the weighted average of the peak value and the bottom value.

FIG. 2F shows the first low-pass filter 3.
0 is the output waveform. In a sufficiently long period (first period) in which the output of the first low-pass filter 30 is stabilized,
The occurrence probability of the peak value is a, the occurrence probability of the bottom value is b, the occurrence probability of the bias value is c, the light intensity of the peak value level actually detected by the photodetector is x, and the light intensity of the bottom value level is y. When the light intensity at the bias value level is E, the following equations 1 and 2 hold.

A + b + c = 1 Equation 1 ax + by + cE = M1 Equation 2 The value M1 is a weighted average value of the light intensity in the first period. First low-pass filter 30 in which high-frequency components are equalized
Indicates the level corresponding to the weighted average value M1.

When the data before modulation is composed of substantially random signals, it is possible to calculate the occurrence probability of each code obtained by modulating this data. Based on the rules for converting each code into the light modulation pulse train of the semiconductor laser, the occurrence probabilities a, b, and c can be obtained from the occurrence probabilities of each code.

In particular, when the code is a specific pattern (for example, 4T
Signal mark and space repetition pattern), the occurrence probability of the pattern can be easily known. Therefore, the occurrence probabilities a, b, and c are determined based on the rules for converting each code into the optical modulation pulse train of the semiconductor laser. It can be easily calculated.

FIG. 2 (g) shows a waveform of a timing signal 31 for sampling and holding the output of the low-pass filter 30 when the output of the low-pass filter 30 is stabilized and converged.

In the case where the optical pulse is modulated at random, the sample and hold can be executed at an arbitrary timing after the output of the first low-pass filter 30 has converged and stabilized. On the other hand, there is a section where the light pulse is modulated in a specific pattern, and the peak value, the bottom value, and the average value of the bias value are calculated in a predetermined section of the light pulse composed only of the specific pattern. In the case of detection, the sample and hold may be performed at a timing when the average value output from the first low-pass filter 30 converges and stabilizes within a predetermined section of a specific pattern.

FIG. 2H shows the second low-pass filter 3.
5 is an output waveform. In the multi-pulse part 45, the light intensity is modulated between a peak value level and a bottom value level. The number of pulses in the multi-pulse portion 45 is determined according to the length of the mark to be written. Multipulse part 4
Since the width and the pulse interval of each pulse in 5 have a set magnitude, the occurrence probabilities of the peak value and the bottom value in the multi-pulse portion 45 are easily obtained. Assuming that the occurrence probability of the peak value in the multipulse portion 45 is d and the occurrence probability of the bottom value is e, the following Expressions 3 and 4 hold.

D + e = 1 Equation 3 dx + ey = M2 Equation 4 where x and y are the light intensity at the peak value level and the light intensity at the bottom value level actually detected by the photodetector 2, respectively.

The value M2 is a weighted average value of the light intensity in the second period. In a period (second period) 46 during which the output of the second low-pass filter 35 is stable, the output of the second low-pass filter 35 indicates a level corresponding to the value M2. Then, the value M2 is represented by reference numeral “47” in FIG.
Corresponds to the level indicated by.

The peak value occurrence probability d and the bottom value occurrence probability e of the multi-pulse portion 45 are
Is a repetitive periodic waveform, it can be easily obtained from the duty. If it is not a repetitive periodic waveform, it follows the rule of converting the laser light into a pulse train for modulation.

FIG. 2 (i) shows the waveform of the timing signal 37 for sampling and holding the output of the low-pass filter 35 when the output is converged and stabilized.

FIG. 2 (j) shows the waveform of the timing signal 40 for sampling and holding the output of the current-voltage converter 3 when the output converges to the bias value level and stabilizes.

Next, the operation flow of the operation processor 34 will be described with reference to FIG.

First, as described above, the values M1, M
2, and data indicating E are input to the arithmetic processor 34 (step 49). And a peak value level (P _p ), a bottom value level (P _b ) over a sufficiently long period,
Probability of occurrence of bias value level (P _e ) a, b and c
And the occurrence probabilities d and e of the peak value level (P _p ) and the bottom value level (P _b ) during the mark period are input (step 50).

When the values x and y are unknown numbers, the above equations 2 and 4 constitute the following simultaneous linear equations.

Ax + by + cE = M1 Equation 2 dx + ey = M2 Equation 4 Occurrence probabilities a, b, c, d, and e obtained from the coding rule, and values M1, M2, and E obtained by measurement are known. So the only unknowns are x and y,
It is possible to solve the above simultaneous equations. Step 51
, The values x and y are obtained by solving the above simultaneous equations.

The values x and y thus obtained are
When the measured value E is compared with a predetermined set reference value,
Difference values Δx, Δy, and ΔE are calculated (step 52). That is, if the target value of the peak value level (set reference power value) is Vp, the target value of the bottom value level (set reference power value) is Vb, and the target value of the bias value level (set reference power value) is Ve, Holds.

Δx = Vp−x Expression 5 Δy = Vb−y Expression 6 ΔE = Ve−E Expression 7 In step 53, the following Expressions 8 to 8 are obtained from the difference values Δx, Δy, and ΔE obtained by the above calculation. 10 is used to determine current value data to be passed to the semiconductor laser 1.

Ip = K (x + Δx) Expression 8 Ib = K (y + Δy) Expression 9 Ie = K (E + ΔE) Expression 10 where K is a current conversion coefficient, Ip is peak value current data, Ib is bottom value current data, Ie is bias value current data.

At step 54, the peak value current data I
p, bottom value current data Ib, and bias value current data Ie are output to a first DA converter 42, a second DA converter 43, and a third DA converter 44, respectively.

As described above, according to the present embodiment, even if the frequency characteristics of the photodetector are insufficient, the cut-off frequency of the low-pass filter is appropriately selected so that the weighted average value of a predetermined section of the received light waveform can be reduced. , It is possible to detect the weighted average value of the peak value and the bottom value of the partial section of the multi-pulse portion. Then, based on these two weighted average values,
Since the peak value and the bottom value of the received light waveform can be obtained by the calculation, the peak value and the bottom value of the light pulse can be accurately controlled to a target level.

Although the power level of the light pulse in the present embodiment is composed of three levels, ie, a peak value, a bottom value, and a bias value, the present invention relates to a case where the power level of the light pulse is three or more. It is also applicable when a level is included.

(Embodiment 2) FIG. 3 and FIGS.
A second embodiment of the semiconductor laser control circuit according to the present invention will be described with reference to FIG.

FIG. 3 shows the configuration of the semiconductor laser control circuit of this embodiment. FIGS. 4A to 4K show signal waveforms in main parts of the present semiconductor laser control circuit. FIGS. 4A to 4G and 4K correspond to FIGS. 2A to 2G and 2J, respectively, which show the same signal waveform.

The main difference between this embodiment and the first embodiment is that the semiconductor laser control circuit of this embodiment is different from the circuit B1
In that the circuit B2 is provided instead of the circuit B2.

Hereinafter, the configuration of the present semiconductor laser control circuit will be described in more detail.

First, the intensity of the light pulse emitted from the semiconductor laser 1 is converted into a current signal by the photodetector 2, and this current signal is converted into a voltage signal by the current-voltage converter 3. The voltage signal output from the current-voltage converter 3 is input to the circuit A, the circuit B2, and the circuit C in parallel.
Since the configurations of the circuits A and C are the same as the configurations of the circuits A and C used in the first embodiment, the configuration and functions of the circuit B2 will be described below in detail.

The circuit B2 includes the low-pass filter 36 described above.
Low-pass filter 55 having filter characteristics different from
And a sample-and-hold circuit 56 that samples and holds the output of the low-pass filter 55 at the timing when the output of the low-pass filter 55 is stabilized and converges to a specific value (average value detection timing). The output of the sample and hold circuit 56 represents the weighted average value M2 of the output of the photodetector 2 in the second period, and the second A
The signal is input to the D converter 38 and converted into a digital signal M2.

The low-pass filter 55 has a higher cut-off frequency than the cut-off frequency of the low-pass filter 35 used in the first embodiment. The cut-off frequency of the low-pass filter 35 used in the first embodiment is selected so that a weighted average value can be obtained directly from the output itself. It is selected so that the influence of the leading pulse 145 located before the multi-pulse portion 45 shown in (d) does not extend backward. When the period of the multi-pulse portion 45 is short, if a cut-off frequency that can obtain a weighted average value directly from the output of the low-pass filter 55 is selected, the influence of the leading pulse 145 changes the detection level of the multi-pulse portion 45. , The output may shift from the true weighted average of the multi-pulse portion 45. Particularly when the period of the multi-pulse portion 45 is short, the leading pulse 145
Makes it impossible to obtain a correct weighted average value.

FIG. 4H shows the output waveform of the low-pass filter 55. In the present embodiment, by increasing the cutoff frequency of the low-pass filter 55, the level of the portion corresponding to the first pulse in the output of the low-pass filter 55 is leveled, and the effect of that portion is reduced to the multi-pulse portion 45
To be less than the output waveform corresponding to. By doing so, there is obtained an advantage that the design condition range of the low-pass filter 55 is wider than that of the low-pass filter 35 used in the first embodiment.

As shown in FIG. 4H, ripples appear in the output waveform of the low-pass filter 55 due to an increase in cutoff frequency. In the present embodiment, a signal in which the ripple remains is input to the peak hold circuit 56, and the peak value of the residual ripple is detected. FIG. 4I shows a waveform of a timing signal 57 for sampling and holding the output when the residual ripple in the output waveform of the low-pass filter 55 is stabilized. The peak hold operation is performed in response to the timing signal 57 shown in FIG. 4 (i) after the ripple of the signal output from the low-pass filter 55 starts to change regularly.

FIG. 4 (j) shows the output 59 of the peak hold circuit 56. The magnitude of the output 59 represents the peak value 58 of the output of the low-pass filter 55, and this detection level is larger than the true weighted average value by the residual ripple amplitude.

The output of the peak hold circuit 56 is input to the second AD converter 38 and is converted into digital data. This digital data is input to the arithmetic processor 34. As described above, the level of the output 59 of the peak hold circuit 55 is larger than the true weighted average value by the residual ripple amplitude. Therefore, to obtain a true weighted average value, a correction process may be performed in the arithmetic processor 34. In this correction process, for example, the output value of the second AD converter 38 may be multiplied by a certain numerical value.

The arithmetic processor 34 determines the peak current value Ip, the bottom current value Ib, and the bias current value Ie to be supplied to the semiconductor laser 1 by the same arithmetic operation as described above, and outputs current data.

In this embodiment, the peak hold circuit 55
Was used, but a bottom hold circuit may be used instead.

(Embodiment 3) FIG. 5 and FIGS.
An embodiment of a third semiconductor laser control circuit of the semiconductor laser control circuit according to the present invention will be described with reference to (k).

FIG. 5 shows the configuration of the semiconductor laser control circuit of this embodiment. FIGS. 6A to 6K show signal waveforms in main parts of the present semiconductor laser control circuit. FIGS. 6 (a) to 6 (g), (j) and (k) correspond to FIGS. 2 (a) to (g), (i) and (j), respectively, which are the same signal. The waveform is shown.

The main difference between this embodiment and the first embodiment is that the semiconductor laser control circuit of this embodiment is different from the circuit B1
In that the circuit B3 is provided instead of the circuit B3.

Hereinafter, the configuration of the semiconductor laser control circuit will be described in more detail.

First, the intensity of the light pulse emitted from the semiconductor laser 1 is converted into a current signal by the photodetector 2, and this current signal is converted into a voltage signal by the current-voltage converter 3. The voltage signal output from the current-voltage converter 3 is input in parallel to the circuit A, the circuit B3, and the circuit C.
Since the configurations of the circuits A and C are the same as the configurations of the circuits A and C used in the first embodiment, the configuration and function of the circuit B3 will be described below in detail.

The circuit B3 includes a band elimination filter 60, a low-pass filter 61, and a sample-hold that performs a sample-hold on the output of the low-pass filter 61 when the output of the low-pass filter 61 is stabilized and converges to a specific value. And a circuit 36. The output of the sample-and-hold circuit 36 represents a weighted average value M2 of the output of the photodetector 2 in the second period, is input to the second AD converter 38, and is converted into a digital signal M2.

Since the multi-pulse portion 45 of the signal waveform shown in FIG. 6D has a pulse repetition waveform, a current-voltage converter is added to the band rejection filter 60 for removing the band including the repetition frequency. 3, the signal output from the band elimination filter 60 is ideally leveled and the multi-pulse portion 4
A weighted average of 5 is obtained.

However, it is difficult to obtain a completely flattened average value output due to the restrictions on the design conditions of the band elimination filter 60, and ripples remain in the output waveform. Since the amplitude of the residual ripple is relatively small, even if the residual ripple is input to a low-pass filter having a low order and a simple configuration, the residual ripple can be easily removed, and the average value of the flat multi-pulse portion 45 can be obtained.

FIG. 6H shows an output waveform of the band elimination filter 60. The band elimination filter 60 is configured as shown in FIG.
In the signal shown in (e), the band component of the repetition frequency of the portion corresponding to the multi-pulse portion 45 in FIG. 6D is removed. At the output of the band elimination filter 60,
Although the repetitive waveform portion of the input signal is attenuated, it is not completely removed and ripples appear.

FIG. 6 (i) shows an output waveform of the low-pass filter 61. The low-pass filter 61 is designed to remove the residual ripple. Since the amplitude of the residual ripple is relatively small, the configuration of the low-pass filter 61 has a low order and is simple. As is clear from FIG. 6I, the output of the low-pass filter 61 includes a flattened portion 46 from which the residual ripple has been removed. The level of this portion 46 corresponds to the average level 47 between the peak value and the bottom value shown in FIG.

FIG. 6 (j) shows a waveform of a timing signal 37 for sampling and holding the output when the flat portion 16 appears in the output of the low-pass filter 61. The output of the sample and hold circuit 36 is input to a second AD converter 38 and is converted into digital data. This digital data is input to the arithmetic processor 34.

The arithmetic processor 34 determines the peak current value Ip, the bottom current value Ib, and the bias current value Ie to be supplied to the semiconductor laser 1 by the same calculation as described above, and outputs current data.

(Embodiment 4) FIGS. 7 and 8A-
A fourth embodiment of the semiconductor laser control circuit according to the present invention will be described with reference to (k).

FIG. 7 shows the configuration of the semiconductor laser control circuit of this embodiment. FIGS. 8A to 8K show signal waveforms in the main part of the semiconductor laser control circuit. FIGS. 8A to 8G and FIG.
(A) to (g) and (k), which show the same signal waveform.

The main difference between this embodiment and the third embodiment is that the semiconductor laser control circuit of this embodiment is different from the circuit B3
In that the circuit B4 is provided instead of the circuit B4.

Hereinafter, the configuration of the present semiconductor laser control circuit will be described in more detail.

First, the intensity of the light pulse emitted from the semiconductor laser 1 is converted into a current signal by the photodetector 2, and this current signal is converted into a voltage signal by the current-voltage converter 3. The voltage signal output from the current-voltage converter 3 is input to the circuit A, the circuit B4, and the circuit C in parallel.
Since the configurations of the circuits A and C are the same as the configurations of the circuits A and C used in the first embodiment, the configuration and function of the circuit B4 will be described below in detail.

The circuit B4 includes a full-wave rectifier 62, a low-pass filter 63, and a sample-and-hold circuit for performing a sample-and-hold operation on the output of the low-pass filter 31 at a timing when the output of the low-pass filter 63 is stabilized and converges to a specific value. And a circuit 36. The output of the sample-and-hold circuit 36 represents a weighted average value M2 of the output of the photodetector 2 in the second period, is input to the second AD converter 38, and is converted into a digital signal M2.

Since the multi-pulse portion 45 of the signal waveform shown in FIG. 8D has a pulse repetition waveform, when the signal shown in FIG.
The full-wave rectifier 62 outputs a signal having a waveform shown in FIG.

As described above, the target value of the peak value level (setting reference value) is Vp, the target value of the bottom value level (setting reference value) is Vb, and the target value of the bias value level (setting reference value) is Ve. Then, the voltage (M2) corresponding to the weighted average value M2 of the peak value and the bottom value is applied to the full-wave rectifier 62.
_ref ) is given as a reference voltage. The voltage (M2 _ref ) is represented by the following equation.

M2 _ref = a · Vp + b · Vb + c · Ve Equation 11 According to the present embodiment, the full-wave rectifier 62 converts the input signal of the multi-pulse part 45 into a signal having a frequency twice and an amplitude half. Sufficient smoothing can be achieved by using a low-pass filter having a simpler configuration than when full-wave rectification is not performed.

FIG. 8 (i) shows an output waveform of the low-pass filter 63. The low-pass filter 63 is designed to remove high-frequency components appearing in the output of the full-wave rectifier 62.

FIG. 8 (j) shows the waveform of the timing signal 37 for sampling and holding the output of the low-pass filter 63 after the output of the low-pass filter 63 is stabilized. The output of the sample and hold circuit 36 is input to a second AD converter 38 and is converted into digital data. This digital data is input to the arithmetic processor 34.

The arithmetic processor 34 determines the peak current value Ip, the bottom current value Ib, and the bias current value Ie to be supplied to the semiconductor laser 1 by the same operation as the above-described operation, and outputs current data.

(Embodiment 5) In each of the above embodiments, for example, a laser beam modulated between ternary levels as shown in FIG. 2D is output, but the present invention is not limited to this. For example, the present invention can be applied to a case where laser light modulated between binary levels is output.

Hereinafter, a fifth embodiment of the semiconductor laser control circuit according to the present invention will be described with reference to FIG.

The semiconductor laser control circuit according to the present embodiment controls the drive current of the semiconductor laser to reduce the intensity of light emitted from the semiconductor laser to a first level (peak value level) and a second level (bottom value level). Modulation between two set levels consisting of: In other words, the bias value level in the above embodiment is equal to the bottom value level.

A waveform of the output light intensity of the semiconductor laser 1 according to the present embodiment is shown in FIG. In FIG. 13, a period during which the light intensity is modulated between a peak value level and a bottom value level for writing a mark (a period during which the multi-pulse portion 45 is generated), and
Certain periods are shown, including periods in which light intensity is maintained at the bottom value level to form spaces located between marks. In the present embodiment, a write-once storage medium is used.

In this embodiment, since the binary level modulation is performed, the bottom value level can be detected by the same method as the method for detecting the bias value in the above-described embodiment.
When the bottom value level is known, the bottom value level can be obtained from the output of the circuit B1 by a simpler operation. That is, in the present embodiment, the following equation may be solved, and y indicating the bottom value level is known.
Only.

D + e = 1 Equation 12 (= Equation 3) dx + ey = M2 Equation 13 (= Equation 4) Therefore, in the present embodiment, the peak value level is determined by calculation more easily than the calculation performed in the above-described embodiment. .

Hereinafter, the configuration of the semiconductor laser control circuit will be described in more detail.

The semiconductor laser control circuit according to the present embodiment indicates the weighted average of the light intensity actually detected by the photodetector 2 during the period when the light intensity is to be modulated between the peak value level and the bottom value level. A circuit B1 for generating a signal and a circuit C for generating a signal indicating the light intensity actually detected by the photodetector 2 during the period when the light intensity should be at the bottom value level are provided.

The structures and operations of the circuit B1 and the circuit C are as described in the other embodiments. The output of the circuit B1 is input to the AD converter 38 and is converted into a digital signal M2. This digital signal M2 is supplied to the arithmetic processor 3
4 is input. Circuit C (Sample hold circuit 39)
Is input to an AD converter 41 and converted into a digital signal E. This digital signal E is also input to the arithmetic processor 34.

In this embodiment, based on the two types of signals M2 and E, an arithmetic processor (DSP) 34 determines the laser beam intensity at the peak value level and the bottom value level, and based on the output of the arithmetic processor 34, Adjust the light intensity.

In this embodiment, the circuit B1 of the first embodiment is adopted, but the circuit B2 is replaced with the circuit B2.
To B4 may be adopted.

As described above, according to the embodiment of the present invention,
Based on the light intensity detected during the period of writing the mark with the high-speed modulated light pulse, by calculation,
A peak value level and / or a bottom value level can be determined. As a result, even if the response characteristics of the photodetector are insufficient, the output power of the semiconductor laser can be controlled with high accuracy.

In each of the above embodiments, the first A
The data input from the D converter 33, the second A / D converter 38, and the third A / D converter 41 to the arithmetic processor 38 is subjected to an appropriate correction operation. Correction, correction of frequency characteristics, removal of residual ripple, and the like may be performed.

[0151]

According to the present invention, even if the frequency characteristics of a photodetector for monitoring the intensity of laser light modulated at high speed are insufficient, the selection of the intensity of the laser beam measured by the photodetector can be performed. The peak value and the bottom value of the laser light intensity can be obtained by calculation by detecting the weighted average value during the period. According to the present invention, the peak value and the bottom value of the laser beam can be accurately controlled to a predetermined level based on the peak value and the bottom value of the modulated laser beam intensity thus obtained.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a semiconductor laser control circuit according to a first embodiment of the present invention.

FIG. 2 is a signal waveform diagram of a main part of the semiconductor laser control circuit according to the first embodiment of the present invention.

FIG. 3 is a configuration diagram of a semiconductor laser control circuit according to a second embodiment of the present invention.

FIG. 4 is a signal waveform diagram of a main part of a semiconductor laser control circuit according to a second embodiment of the present invention.

FIG. 5 is a configuration diagram of a semiconductor laser control circuit according to a third embodiment of the present invention.

FIG. 6 is a signal waveform diagram of a main part of a semiconductor laser control circuit according to a third embodiment of the present invention.

FIG. 7 is a configuration diagram of a semiconductor laser control circuit according to a fourth embodiment of the present invention.

FIG. 8 is a signal waveform diagram of a main part of a semiconductor laser control circuit according to a fourth embodiment of the present invention.

FIG. 9 is a configuration diagram of a conventional semiconductor laser control circuit.

FIG. 10 is a signal waveform diagram of a main part of a conventional semiconductor laser control circuit.

FIG. 11 is a flowchart of a calculation operation of a calculation processor constituting the semiconductor laser control circuit;

FIG. 12 is a configuration diagram of a semiconductor laser control circuit according to a fifth embodiment of the present invention.

FIG. 13 is a diagram illustrating a signal waveform of a laser beam generated by a semiconductor laser control circuit according to a fifth embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor laser 2 Photodetector 30 1st low pass filter 32 1st sample hold 35 2nd low pass filter 36 2nd sample hold 39 3rd sample hold 11 1st switch 16 2nd switch 21 3rd Switch

Claims (20)

[Claims] A first level; a second level lower than the first level; and the second level lower than the first level.
A semiconductor laser control circuit capable of modulating light intensity between a plurality of set levels including a third level higher than a level, wherein the light intensity is between the first level, the second level, and the third level. A circuit for generating a first signal based on the light intensity actually detected by the photodetector during a first period to be modulated; and a light intensity of the laser light between the first and second levels. A circuit for generating a second signal based on the light intensity actually detected by the photodetector during a second period in which the laser light is to be modulated, and a light intensity of the laser light being at the third level. 3
And a circuit for generating a third signal based on the light intensity actually detected by the photodetector during the period, and calculating the first level light intensity and the first level light intensity based on the first to third signals. An arithmetic circuit for calculating the second level light intensity, wherein the semiconductor laser control circuit adjusts the light intensity based on an output of the arithmetic circuit. 2. The first signal has a probability of occurrence of a laser beam having a first level light intensity x actually detected by the photodetector during the first period, and a second level light beam. When the occurrence probability of the laser light having the intensity y is b and the occurrence probability of the laser light having the third level light intensity E is c,
claim indicates a value represented by _{ax + by + cE = M 1} 1
3. The semiconductor laser control circuit according to claim 1. 3. The method according to claim 2, wherein the second signal is generated before the second period.
The first level light intensity actually detected by the photodetector
The probability of occurrence of a laser beam having x is d, the second level light intensity
When the occurrence probability of a laser beam having y is e,
dx + ey = M _TwoThe value of claim 1 or
3. The semiconductor laser control circuit according to 2. 4. The semiconductor according to claim 1, wherein the third signal indicates the third level of light intensity E actually detected by the photodetector during the third period. Laser control circuit. 5. The circuit for generating the first signal receives an output of the photodetector and generates a signal corresponding to a weighted average of the output within the first period as the first signal. The semiconductor laser control circuit according to claim 1, wherein: 6. The semiconductor laser control circuit according to claim 1, wherein the circuit for generating the first signal has a first low-pass filter having a selected cutoff frequency. 7. The circuit for generating the first signal includes a sample and hold circuit for holding an output of the first low-pass filter at a selected timing.
3. The semiconductor laser control circuit according to claim 1. 8. A circuit for generating the second signal receives the output of the photodetector and generates a signal corresponding to a weighted average of the output within the second period as the second signal. The semiconductor laser control circuit according to claim 1, wherein: 9. A circuit for generating the second signal, a second low-pass filter having a selected cut-off frequency, and a sample-and-hold circuit for holding an output of the second low-pass filter at a selected timing. The semiconductor laser control circuit according to claim 8, comprising: 10. The semiconductor according to claim 1, wherein the circuit that generates the third signal includes a sample and hold circuit that holds an output of the photodetector at a selected timing. Laser control circuit. 11. A circuit for generating the second signal, comprising: a second low-pass filter having a selected cut-off frequency; and a peak for holding a peak value at an output of the second low-pass filter for a selected period. The semiconductor laser control circuit according to claim 8, further comprising a hold circuit. 12. The semiconductor laser control circuit according to claim 9, further comprising a band elimination filter before said second low-pass filter. 13. The semiconductor laser control circuit according to claim 9, further comprising a full-wave rectifier in a stage preceding said second low-pass filter. 14. A semiconductor laser control circuit capable of modulating light intensity between a first level and a second level lower than the first level, the semiconductor laser control circuit comprising: A circuit for generating a signal indicating a weighted average of the light intensity actually detected by the photodetector during a period in which the light intensity is to be modulated; and A circuit for generating a signal indicating the light intensity actually detected; and an arithmetic circuit for calculating the first-level light intensity by calculation based on the two signals, based on an output of the arithmetic circuit. A semiconductor laser control circuit for adjusting the light intensity of laser light. 15. The signal indicating the weighted average is the first signal.
The occurrence probability of the laser light having the first level light intensity x actually detected by the photodetector during the period in which the light intensity is to be modulated between the level and the second level is d, The semiconductor laser control circuit according to claim 14, wherein a value represented by dx + ey = M ₂ is shown when an occurrence probability of a laser beam having a light intensity y is e. 16. A circuit for generating a signal indicating the weighted average includes a low-pass filter having a selected cut-off frequency, and a sample-and-hold circuit for holding an output of the low-pass filter at a selected timing. Claim 1
16. The semiconductor laser control circuit according to 4 or 15. 17. A circuit for generating a signal indicating a light intensity actually detected by the photodetector during a period in which the light intensity should be at the second level, the output of the photodetector being selected at a selected timing. 17. The semiconductor laser control circuit according to claim 14, further comprising a sample and hold circuit for holding. 18. A laser light source comprising: the semiconductor laser control circuit according to claim 1; and a semiconductor laser driven by the control circuit. 19. A semiconductor laser control circuit according to claim 1, a semiconductor laser driven by said control circuit, and an optical system for irradiating a recording medium with laser light emitted from said semiconductor laser. And a device comprising: 20. The apparatus according to claim 19, further comprising a circuit for reproducing information recorded on the recording medium.