JP2001196630A - Method of manufacturing semiconductor light emitting element having enhanced external quantum efficiency - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor light emitting element having an enhanced external quantum efficiency by roughening the upside of a semiconductor light emitting element. SOLUTION: The manufacturing method comprises a step of forming a multilayer structure including a semiconductor light emitting region on a semiconductor substrate, a step of forming a topmost layer covering the multilayer structure, a step of forming a layer containing an electrode material and covering the topmost layer, a step of heating and treating to diffuse the electrode material in the topmost layer, and a step of etching the electrode material- containing layer to form a top electrode on the topmost layer and expose a part of the topmost layer, and the exposed part of the topmost layer is a rough surface.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a rough surface treatment method (surf
The present invention relates to a process for manufacturing a semiconductor light emitting device such as a light emitting diode (LED) in which external quantum efficiency is increased by using an ace roughening method.

[0002]

BACKGROUND OF THE INVENTION Today,
Semiconductor light emitting devices such as light emitting diodes are used for a wide range of applications such as lighting and remote control. In order to guarantee high functional reliability and low power requirements of a semiconductor light emitting device, it is desired that the device has as high an external quantum efficiency as possible.

[0003] In principle, the external quantum efficiency of a semiconductor light emitting device is determined by the internal quantum efficiency and the extraction efficiency. The internal quantum efficiency is determined by the properties of the material and its quality. Extraction efficiency refers to the proportion of radiation emitted from the interior of the device to the ambient atmosphere or sealing epoxy. The extraction efficiency is
It is determined by the losses that occur as radiation exits the interior of the device. One of the main causes of such losses is that radiation due to the high optical index of refraction of the semiconductor material (eg, about 3.6 for gallium arsenide (GaAs)) cannot be emitted at the semiconductor surface due to total internal reflection. Percentage. In the case of GaAs, the critical angle for total reflection of 16.2 ° is the result of a transition to the atmosphere. The direct path emits only some radiation incident on the boundary at a lower angle to the normal to the surface. However, some of this radiation still assumes partial reflections caused by sharp changes in the index of refraction. Transmission coefficient is about 68% for radiation perpendicular to the interface
If the absorption of radiation on the way to the interface is neglected, about 2.7% of the generated radiation can be emitted from semiconductor crystals on the direct path in the case of flat structures.

Some prior art techniques for assembling a semiconductor light emitting device disclose a method for enhancing the external quantum efficiency of a semiconductor light emitting device by using a roughening method. It is described, for example, in U.S. Pat.
No. 5,429,954 and U.S. Pat. No. 5,040,044.

However, those prior arts only show the need for new roughening methods applicable to any kind of semiconductor light emitting device. In particular, Ga
The uppermost layer formed on the P (100) plane is usually a window layer of a semiconductor light emitting device having an active layer of AlGaInP.
er) and it is still difficult to roughen the surface uniformly. Therefore, a new roughening method, GaP, GaAsP,
It is desired to be able to be applied to the uppermost layer (coating layer) of a semiconductor light emitting device formed of a normal semiconductor material such as AlGaAs. Further, the uppermost layer can be roughened using a roughening method regardless of the direction of the lattice of the semiconductor material forming the layer. Roughened using a roughening method,
It is also desired that the uppermost layer of the semiconductor light emitting device has a uniform surface roughness. It is also desirable that the rough surface treatment method be reproducible and low cost. The present invention seeks to satisfy the aforementioned needs.

It is an object of the present invention to provide a method for manufacturing a semiconductor light emitting device having an improved external quantum efficiency by roughening the upper surface of the semiconductor light emitting device.

Another object of the present invention is to provide a new rough surface treatment method applicable to any kind of semiconductor light emitting device, that is, to change the direction of the lattice forming the target layer (top layer) and the material thereof. It is an object of the present invention to provide a method capable of performing a roughening method regardless of the case.

Another object of the present invention is to provide a method in which the surface of the uppermost layer of a semiconductor light emitting device is roughened, and the roughened surface of the multilayer structure has a uniform surface roughness. is there.

Another object of the present invention is to provide a method for roughening the surface of the uppermost layer of a semiconductor light emitting device. Furthermore, the method is reproducible and low cost.

[0010]

SUMMARY OF THE INVENTION The present invention provides a method for manufacturing a semiconductor light emitting device. First, a multi-layer structure including a light emitting region such as a PN junction, a double hetero junction, or a multiple quantum well is formed on a semiconductor substrate. Thereafter, the top layer is formed and covered with a multilayer structure. Next, a layer containing an electrode material that covers the uppermost layer is formed. Heat treatment is performed on the formed structure to diffuse the electrode material to the uppermost layer. Next, the layer containing the electrode material is partially etched to form an upper electrode on the uppermost layer, and a part of the uppermost layer is exposed. Part of the exposed top layer has a rough surface. The method can be performed regardless of the material and orientation of the top layer and provides a top layer with uniform surface roughness.

The advantages and spirit of the present invention may be understood by the following detailed description with reference to the accompanying drawings.

FIGS. 1 to 5 are schematic cross-sectional views for explaining a manufacturing method of the present invention according to the present invention. FIG. 6 shows the uppermost layer of C-type (100) GaP without roughening.
These are the results of the V test. FIG. 7 shows the result of a CV test of the top layer of P-type (100) -oriented GaP subjected to the roughening treatment according to the present invention.

[0013]

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method of manufacturing a semiconductor light emitting device having an external quantum efficiency enhanced by a rough surface. 1 to 5 are schematic sectional views showing a method according to the present invention. Hereinafter, this method will be described in detail.

First, a multilayer structure 12 including a plurality of epitaxial layers formed continuously is formed on a semiconductor substrate 11. In particular, the multilayer structure 12 includes a light emitting region such as a PN junction, a double heterojunction, or a multiple quantum well. Thereafter, as shown in FIG. 1, an uppermost layer 13 is formed and the uppermost layer 12 is covered. The dotted line SS indicates the upper surface of the uppermost layer 13. In one embodiment, the top layer 13 acts as a cover layer, ohmic contact layer, or window layer, as designed for the semiconductor light emitting device. In one embodiment,
The uppermost layer 13 may be formed of a material selected from a group including GaP, GaAsP, AlGaAs, and a material having a good matching with the similar multilayer structure 12.

Next, as shown in FIG. 2, a layer 14 containing an electrode material for covering the uppermost layer 13 is formed. Top layer 13
Consists of a P-type semiconductor, the electrode material must be formed on the P-type top layer 13, ie, the electrode material is
Note that it is selected from the group including BeAu, ZnAu, etc. Conversely, if the top layer 13 is made of an N-type semiconductor, the electrode material must be formed on the N-type top layer 13, that is, the electrode material is selected from the group including GeAu, NiAu, SiAu, etc. Note that

As shown in FIG. 3, a heat treatment is performed on the formed structure to diffuse the electrode material into the uppermost layer 13 via SS bonds on the surface.

Next, an etch stop layer (not shown) covering layer 14 is formed. Next, a portion of the etch stop layer is selectively removed to provide a pattern that partially exposes layer 14. Thereafter, the exposed portions of layer 14 are etched until the SS bonds on the surface of top layer 13 below the exposed portions of layer 14 are exposed and roughened. Then, the etching stop layer is removed. Thus, as shown in FIG. 4, the upper electrode 15 is formed on the uppermost layer 13, and the roughened form of the uppermost layer 13 shows uniformly dispersed pits.

During roughening of the top layer 13, in a conventional approach, the top layer 13 is substantially attacked by the etching solution, but in the present invention, the top layer 13 is more likely to be Note that the spreading electrode material is substantially attacked. It is clear that the roughening method according to the present invention mainly uses heat treatment and etching of the electrode material diffused in the uppermost layer. Therefore, the roughening method according to the present invention is a reproducible and low-cost method.

Further, as shown in FIG. 5, a lower electrode 16 is formed on the lower surface of the semiconductor substrate 11 to complete the semiconductor light emitting device.

In practical applications, the conditions of the aforementioned heating step, ie, isothermal and time, depend on the electrode material used and are determined to provide sufficient driving force for diffusion of the electrode material to the top layer. . Taking a semiconductor light emitting device having an active layer of AlGaInP as an example, P-type (100) -oriented GaP is used to form the uppermost layer of the semiconductor light emitting device, and BeAu is used as an electrode material. In this case, the heat treatment is preferably performed at a temperature between 400 ° C. and 600 ° C. for 30 minutes. As a result, one preferred form of the roughened surface of the top layer shows uniformly dispersed pits about 0.5 μm in diameter and 0.5 μm deep.

Referring to Table 1, the brightness in the above case is about
96mcd. The luminance of the semiconductor light emitting device having the same structure as that described above but not performing the roughening treatment is about 80 mcd.
It is. It is clear that the enhanced percentage of external quantum efficiency in the above case is about 20%. Table 1 also shows the luminances of a plurality of types of the semiconductor light emitting devices subjected to the roughening treatment according to the present invention and the semiconductor light emitting devices not subjected to the surface treatment. The external quantum efficiency of all the semiconductor light emitting devices listed in Table 1 is
It is evident that the roughening method according to the present invention has been considerably enhanced. Technically, the roughening method according to the present invention is applicable to other types of semiconductor light emitting devices not described in this specification.

[Table 1]

Further, in the present invention, the surface charge density of the semiconductor light emitting device manufactured according to the present invention is considerably enhanced by the diffusion of the electrode material to the uppermost layer. Taking a semiconductor light-emitting device having an active layer of AlGaInP as an example, a CV test in which the uppermost layer of the semiconductor light-emitting device is formed of P-type (100) -oriented GaP and the uppermost layer is not subjected to roughening treatment 6 is shown in FIG. 6, and the result of the CV test in the case where the rough surface treatment was performed is shown in FIG. The surface charge density in the above case after roughening increases by about two orders of magnitude within a depth of 0.05 μm. The enhancement of the surface charge density is one of the reasons that the present invention can enhance the external quantum efficiency of a semiconductor light emitting device.

In summary, the distinguishing features and advantages of the present invention are: During roughening of the top layer, the electrode material is etched more than the top layer. 2. The rough surface treatment method can be applied to any semiconductor light emitting device regardless of the material of the uppermost layer and the direction of the lattice. 3. The surface of the uppermost layer roughened by the roughening method of the present invention has a uniform surface roughness. 4. The roughening method according to the invention is a reproducible and low-cost method.

Although the present invention has been described in terms of several preferred embodiments, the terms used have been used for description rather than for limitation, and, within the scope of the appended claims. It should be understood that changes may be made without departing from the scope and spirit of the invention in the broader embodiments.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view showing an initial stage of a method for manufacturing a semiconductor light emitting device according to the present invention.

FIG. 2 is a schematic sectional view showing a next stage shown in FIG. 1;

FIG. 3 is a schematic sectional view showing a next stage shown in FIG. 2;

FIG. 4 is a schematic sectional view showing a next stage shown in FIG. 3;

FIG. 5 is a schematic sectional view showing a next stage shown in FIG. 4;

FIG. 6: The top layer of the semiconductor light emitting device is oriented to the P-type (100) plane
FIG. 9 is a diagram showing a result of a CV test in the case where the uppermost layer is not subjected to the rough surface treatment when formed of GaP.

FIG. 7: The top layer of the semiconductor light emitting device is oriented to the P-type (100) plane
FIG. 8 is a diagram showing a result of a CV test in a case where a rough surface treatment is performed on the uppermost layer in the case of forming with GaP.

[Explanation of symbols]

 Reference Signs List 11 semiconductor substrate 12 multilayer structure 13 uppermost layer 14 layer containing electrode material 15 upper electrode 16 lower electrode

Claims (17)

[Claims] 1. A step of forming a multilayer structure including a semiconductor light emitting region on a semiconductor substrate, a step of forming an uppermost layer covering the multilayer structure, and a layer including an electrode material, covering the uppermost layer. Forming a heat treatment so that the electrode material diffuses into the uppermost layer; etching a layer containing the electrode material to form an upper electrode on the uppermost layer; and Exposing a part of the uppermost layer, wherein the exposed part of the uppermost layer is a rough surface. 2. The method according to claim 1, further comprising forming a lower electrode on a lower surface of the semiconductor substrate. 3. The method according to claim 1, wherein the morphology of the rough surface indicates pits uniformly dispersed. 4. The method according to claim 1, wherein the light emitting region has a PN junction. 5. The method according to claim 1, wherein the light emitting region has a double hetero junction. 6. The method according to claim 1, wherein the semiconductor light emitting region has a multiple quantum well. 7. The method according to claim 7, wherein the uppermost layer is made of GaP, GaAsP and AlGaAs.
The method for manufacturing a semiconductor light emitting device according to claim 1, comprising a material selected from the group including: 8. The method according to claim 7, wherein the uppermost layer is formed of a P-type material, and the electrode material is selected from a group including BeAu and ZnAu. 9. The method according to claim 7, wherein the uppermost layer is made of an N-type material, and the electrode material is selected from a group including GeAu, NiAu, SiAu and the like. 10. A method for roughening an upper surface of a semiconductor compound having a light emitting region, the method comprising: forming an electrode material layer covering the upper surface; Performing a heat treatment so as to diffuse into the semiconductor compound through the surface, forming an etching stop film on the electrode material layer, removing a selected part of the etching stop film, and removing the electrode material layer. Partially exposing; etching the exposed part of the electrode material so that the upper surface below the exposed part of the electrode material layer is exposed and roughened, A method for roughening a semiconductor compound, comprising: diffusing a part of a layer into the semiconductor compound; and removing the etching stop layer. 11. The method for manufacturing a semiconductor light emitting device according to claim 10, wherein a part of the shape of the exposed upper surface shows uniformly dispersed pits. 12. The method according to claim 10, wherein the light emitting region has a PN junction. 13. The method according to claim 10, wherein the light emitting region has a double hetero junction. 14. The method according to claim 10, wherein the light emitting region has a multiple quantum well. 15. The method according to claim 15, wherein the upper surface is formed of GaP, GaAsP, and AlGaA.
The method for manufacturing a semiconductor light emitting device according to claim 10, wherein the semiconductor light emitting device is formed by a layer made of a material selected from a group including s. 16. The method according to claim 15, wherein the upper surface is formed of a layer made of a P-type material, and the electrode material layer is formed of a material selected from a group including BeAu and ZnAu. 17. The semiconductor light emitting device according to claim 15, wherein the upper portion is formed of a layer made of an N-type material, and the electrode material is formed of a material selected from a group including GeAu, NiAu, SiAu, and the like. Method.