JP2001196418A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JP2001196418A
JP2001196418A JP2000006112A JP2000006112A JP2001196418A JP 2001196418 A JP2001196418 A JP 2001196418A JP 2000006112 A JP2000006112 A JP 2000006112A JP 2000006112 A JP2000006112 A JP 2000006112A JP 2001196418 A JP2001196418 A JP 2001196418A
Authority
JP
Japan
Prior art keywords
connection pad
semiconductor element
conductive film
anisotropic conductive
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000006112A
Other languages
Japanese (ja)
Inventor
Yoshihiro Basho
義博 芭蕉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2000006112A priority Critical patent/JP2001196418A/en
Publication of JP2001196418A publication Critical patent/JP2001196418A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/1012Auxiliary members for bump connectors, e.g. spacers
    • H01L2224/10122Auxiliary members for bump connectors, e.g. spacers being formed on the semiconductor or solid-state body to be connected
    • H01L2224/10125Reinforcing structures
    • H01L2224/10126Bump collar

Abstract

PROBLEM TO BE SOLVED: To solve a problem in which the connection pad of an insulating base cannot be surely, firmly, and electrically connected to the electrode of a semiconductor device due to the deformation of the insulating base. SOLUTION: A semiconductor device is composed of an insulating base 1 equipped with connection pads 3 on its top surface and a semiconductor element 2 equipped with electrodes 2a on its under surface, where the semiconductor element 2 is mounted on the insulating base 1, and the connection pads 3 and the electrodes 2a are connected together through the intermediary of an anisotropic conductive film 4 which is formed by dispersing conductive particles 4a into a resin film 4b. The top surface of the connection pad 3 is set at 15 μm or below in evenness, the maximum height (Ry) of the surface roughness of the connection pad 3 is set 1/2 or above as large as the average diameter of the conductive particles 4a dispersed into the anisotropic conductive film 4 and set at 10 μm or below, and an organic resin insulating layer 6 is interposed between the side of the connection pad 3 and the anisotropic conductive film 4.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はコンピューター等の
情報処理装置に実装される半導体装置に関し、より詳細
には半導体素子の電極を配線基板の接続パッドに異方性
導電膜を介して接続して成る半導体装置に関するもので
ある。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device mounted on an information processing apparatus such as a computer, and more particularly to a semiconductor device in which electrodes of a semiconductor element are connected to connection pads of a wiring board via an anisotropic conductive film. The present invention relates to a semiconductor device comprising:

【0002】[0002]

【従来の技術】半導体装置は、従来、半導体素子と、半
導体素子を実装する配線基板と、半導体素子と配線基板
とを電気的、機械的に接続して実装する異方性導電膜
(ACF)等の接続材とから形成されている。
2. Description of the Related Art Conventionally, a semiconductor device includes a semiconductor element, a wiring board on which the semiconductor element is mounted, and an anisotropic conductive film (ACF) in which the semiconductor element and the wiring board are electrically and mechanically connected and mounted. And the like.

【0003】前記配線基板は、酸化アルミニウム質焼結
体等のセラミックスから成り、上面に半導体素子搭載部
を有する絶縁基体と、タングステン、モリブデン、銅、
銀等のメタライズ金属層から成り、前記搭載部の表面に
形成された接続パッドとにより形成されている。
The wiring substrate is made of ceramics such as an aluminum oxide sintered body, and has an insulating base having a semiconductor element mounting portion on an upper surface, tungsten, molybdenum, copper, and the like.
It is made of a metallized metal layer such as silver and is formed by connection pads formed on the surface of the mounting portion.

【0004】また、前記異方性導電膜は、金、銀、銅等
の金属や、これらの金属を表面に被着させた有機樹脂か
ら成る導電粒子(平均径が1〜10μm程度)を、厚さ
10〜50μmの熱硬化性樹脂、熱可塑性樹脂、光硬化
性樹脂等の有機樹脂から成る樹脂フィルム中に分散させ
た構造を有している。
Further, the anisotropic conductive film includes conductive particles (average diameter of about 1 to 10 μm) made of a metal such as gold, silver, and copper, and an organic resin having these metals adhered to the surface thereof. It has a structure in which it is dispersed in a resin film having a thickness of 10 to 50 μm and made of an organic resin such as a thermosetting resin, a thermoplastic resin, or a photocurable resin.

【0005】かかる半導体装置は、例えば、前記搭載部
に形成された接続パッドと半導体素子下面の接続パッド
とを対向させるようにして、絶縁基体の搭載部上に半導
体素子を、間に異方性導電膜を挟んで載置させ、しかる
後、これらの半導体素子、異方性導電膜および配線基板
を上下方向に加圧し、同時に異方性導電膜の樹脂フィル
ムを硬化させることにより製作されており、前記加圧に
よって絶縁基体の接続パッドと半導体素子の電極とが異
方性導電膜の導電粒子を挟みつけて適度に扁平化させ、
この導電粒子を介して電気的に接続され、同時に絶縁基
体と半導体素子とが樹脂フィルムを介して接合されるこ
ととなる。
In such a semiconductor device, for example, a semiconductor element is mounted on a mounting portion of an insulating base such that a connection pad formed on the mounting portion and a connection pad on a lower surface of the semiconductor element are opposed to each other. The semiconductor device, the anisotropic conductive film, and the wiring board are pressed vertically, and the resin film of the anisotropic conductive film is cured at the same time. The connection pad of the insulating base and the electrode of the semiconductor element are appropriately flattened by sandwiching the conductive particles of the anisotropic conductive film by the pressing,
Electrical connection is made via the conductive particles, and at the same time, the insulating base and the semiconductor element are joined via the resin film.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、上記従
来の半導体装置は、酸化アルミニウム質焼結体等から成
る絶縁基体を形成するための焼成時、絶縁基体にソリ等
の変形が発生し易く、このソリ等に起因して絶縁基体の
搭載部表面に形成された全接続パッドの上面の平坦度が
通常30μm以上と高く、上下方向の位置のばらつきが
大きいという欠点があり、このため接続パッドに半導体
素子の電極を異方性導電膜を介して接続する際、異方性
導電膜中の導電粒子を挟みつける力が複数の接続部間で
大きくばらついてしまい、各接続パッドと半導体素子の
電極との間に導電粒子を均一の圧力で挟みつけることが
できず、接続パッドおよび電極と導電粒子との接触面積
がばらついて接続部の電気抵抗が所定の抵抗値からばら
つき、半導体素子を正確に作動させることができなくな
るおそれがあるという問題があった。
However, in the above-described conventional semiconductor device, when the insulating substrate made of an aluminum oxide-based sintered body or the like is fired, the insulating substrate is liable to be deformed such as warp. The flatness of the upper surface of all the connection pads formed on the mounting portion surface of the insulating base due to warpage or the like is high, typically as high as 30 μm or more, and there is a large variation in the position in the vertical direction. When the electrodes of the device are connected via the anisotropic conductive film, the force for sandwiching the conductive particles in the anisotropic conductive film varies greatly between the plurality of connection portions, and each connection pad and the electrode of the semiconductor device are connected to each other. The conductive particles cannot be sandwiched between the conductive particles at a uniform pressure, and the contact areas between the connection pads and the electrodes and the conductive particles vary, so that the electrical resistance of the connection portion varies from a predetermined resistance value. There is a problem that it may become impossible to accurately operate.

【0007】また、前記メタライズ金属層により形成さ
れる接続パッドは、その表面粗さの最大高さRy(JI
S規格)が0.5μm未満と、導電粒子の平均径(1〜
10μm)に比べて小さいことから、導電粒子を捕捉、
保持する作用が弱く、この接続パッドと半導体素子の電
極との間に異方性導電膜を挟んで加圧したとき、十分な
数の導電粒子を接続面に捕捉、保持することが難しいた
め接続パッドと半導体素子の電極との間の接触面積が小
さくなって接触抵抗が高くなり、半導体装置の電気特性
を劣化させるおそれがあるという問題もあった。
The connection pad formed by the metallized metal layer has a maximum surface roughness Ry (JI).
S standard) is less than 0.5 μm, and the average diameter of the conductive particles (1 to 1)
10 μm), which captures conductive particles,
Since the holding function is weak, it is difficult to capture and hold a sufficient number of conductive particles on the connection surface when the anisotropic conductive film is sandwiched between the connection pad and the electrode of the semiconductor element and pressed. There is also a problem that the contact area between the pad and the electrode of the semiconductor element is reduced, the contact resistance is increased, and the electrical characteristics of the semiconductor device may be degraded.

【0008】さらに上記従来の半導体装置は、半導体装
置の小型化のために接続パッドがより狭ピッチ(約10
0μm以下)で形成されるようになってきており、異方
性導電膜の導電粒子が複数個横方向に連なり、この連な
った導電粒子を介して隣接する接続パッド間が電気的に
短絡し、その結果、半導体装置を正常、かつ安定に作動
させることができないという問題も有していた。
Further, in the above-mentioned conventional semiconductor device, the connection pads have a narrower pitch (about 10 to reduce the size of the semiconductor device).
0 μm or less), a plurality of conductive particles of the anisotropic conductive film are connected in a horizontal direction, and adjacent connection pads are electrically short-circuited via the connected conductive particles, As a result, there is also a problem that the semiconductor device cannot be operated normally and stably.

【0009】[0009]

【課題を解決するための手段】本発明の半導体装置は、
上面に複数個の接続パッドを有する絶縁基体と、下面に
複数個の電極を有する半導体素子とから成り、絶縁基体
上に半導体素子を搭載するとともに各接続パッドと各電
極とを樹脂フィルム中に導電粒子を分散させて成る異方
性導電膜を介して接続した半導体装置であって、前記全
接続パッド上面の平坦度を15μm以下とするとともに
各接続パッドの表面粗さの最大高さ(Ry)を異方性導
電膜の導電粒子の平均径に対し1/2以上乃至10μm
以下とし、かつ前記接続パッドの側面と、前記異方性導
電膜との間に有機樹脂から成る絶縁層を介在させたこと
を特徴とするものである。
According to the present invention, there is provided a semiconductor device comprising:
An insulating substrate having a plurality of connection pads on an upper surface and a semiconductor element having a plurality of electrodes on a lower surface. The semiconductor element is mounted on the insulating substrate, and each connection pad and each electrode are electrically conductive in a resin film. A semiconductor device connected via an anisotropic conductive film in which particles are dispersed, wherein the flatness of the upper surface of all of the connection pads is set to 15 μm or less and the maximum height (Ry) of the surface roughness of each connection pad. Is 以上 or more to 10 μm with respect to the average diameter of the conductive particles of the anisotropic conductive film.
An insulating layer made of an organic resin is interposed between a side surface of the connection pad and the anisotropic conductive film.

【0010】また本発明の半導体装置は、前記絶縁層の
厚みが1μm以上であることを特徴とするものである。
The semiconductor device according to the present invention is characterized in that the thickness of the insulating layer is 1 μm or more.

【0011】本発明の半導体装置によれば、全接続パッ
ド上面の平坦度を15μm以下としたことから、この接
続パッドと半導体素子の電極とを、樹脂フィルム中に金
属粒子を分散させて成る異方性導電膜を介して接続する
際、全接続パッドにほぼ均等に圧力を加えることがで
き、接続パッドと半導体素子の電極との間に導電粒子を
挟みつける力が各接続パッドの間で均等となり、各接続
部の電気抵抗がばらつくことを有効に防ぐことができ
る。
According to the semiconductor device of the present invention, since the flatness of the upper surface of all the connection pads is set to 15 μm or less, the connection pads and the electrodes of the semiconductor element are formed by dispersing metal particles in a resin film. When connecting via an anisotropic conductive film, pressure can be applied almost uniformly to all connection pads, and the force for sandwiching conductive particles between the connection pads and the electrodes of the semiconductor element is equal between each connection pad Thus, it is possible to effectively prevent the electric resistance of each connection portion from varying.

【0012】また、本発明の半導体装置によれば、各接
続パッドの表面粗さの最大高さRyを異方性導電膜の導
電粒子の平均径に対し1/2以上乃至10μm以下と、
適度に粗面としたことから、接続パッドと半導体素子の
電極との間に異方性導電膜を挟んで加圧するとき、導電
粒子を前記適度に粗面とした接続パッド上面の谷部内に
容易に捕捉するとともにこれを確実に保持させることが
でき、その結果、十分な数の導電粒子が接続面に捕捉、
保持されることとなり接続パッドと半導体素子の電極と
の接触抵抗を十分低いものとし、電気特性に優れた半導
体装置を得ることができる。
Further, according to the semiconductor device of the present invention, the maximum height Ry of the surface roughness of each connection pad is 以上 to 10 μm with respect to the average diameter of the conductive particles of the anisotropic conductive film.
Since the surface is moderately rough, when the anisotropic conductive film is interposed between the connection pad and the electrode of the semiconductor element and pressurized, the conductive particles are easily placed in the valley of the upper surface of the connection pad having the moderately rough surface. And ensure that it is retained, so that a sufficient number of conductive particles are captured on the connection surface,
As a result, the contact resistance between the connection pad and the electrode of the semiconductor element is made sufficiently low, so that a semiconductor device having excellent electrical characteristics can be obtained.

【0013】さらに本発明の半導体装置によれば、接続
パッドの側面と異方性導電膜との間に有機樹脂から成る
絶縁層を介在させたことから、接続パッドが狭ピッチで
形成され、かつ隣接する接続パッド間で異方性導電膜の
複数の導電粒子が横方向に連なったとしても、この連な
った導電粒子と各接続パッドとは前記接続パッド側面の
絶縁層により絶縁され、その結果、隣接する接続パッド
が電気的に短絡することはなく、半導体装置を常に正
常、かつ安定に作動させることができる。
Further, according to the semiconductor device of the present invention, since the insulating layer made of an organic resin is interposed between the side surface of the connection pad and the anisotropic conductive film, the connection pads are formed at a narrow pitch. Even if a plurality of conductive particles of the anisotropic conductive film are connected in a lateral direction between adjacent connection pads, the connected conductive particles and each connection pad are insulated by the insulating layer on the side of the connection pad, and as a result, Adjacent connection pads are not electrically short-circuited, and the semiconductor device can always operate normally and stably.

【0014】[0014]

【発明の実施の形態】次に、本発明を添付図面に基づき
説明する。図1は本発明の半導体装置の一実施例を示す
断面図であり、1は絶縁基体、2は半導体素子、3は接
続パッド、4は異方性導電膜である。
Next, the present invention will be described with reference to the accompanying drawings. FIG. 1 is a sectional view showing one embodiment of the semiconductor device of the present invention, wherein 1 is an insulating base, 2 is a semiconductor element, 3 is a connection pad, and 4 is an anisotropic conductive film.

【0015】前記絶縁基体1は、酸化アルミニウム質焼
結体、窒化アルミニウム質焼結体、ムライト質焼結体、
炭化珪素質焼結体、ガラスセラミックス焼結体等の電気
絶縁材料から成る略四角形状の板体であり、その上面中
央部には半導体素子を搭載するための半導体素子搭載部
1aを有しており、該半導体素子搭載部1aに半導体素
子2が異方性導電膜4を用いて実装される。
The insulating substrate 1 is made of an aluminum oxide sintered body, an aluminum nitride sintered body, a mullite sintered body,
It is a substantially rectangular plate made of an electrically insulating material such as a silicon carbide sintered body or a glass ceramic sintered body, and has a semiconductor element mounting portion 1a for mounting a semiconductor element in the center of the upper surface thereof. The semiconductor element 2 is mounted on the semiconductor element mounting portion 1a using the anisotropic conductive film 4.

【0016】前記絶縁基体1は、例えば、酸化アルミニ
ウム質焼結体から成る場合、酸化アルミニウム、酸化珪
素、酸化マグネシウム、酸化カルシウム等の原料粉末に
適当な有機バインダ、溶剤、可塑剤、分散剤等を添加混
合して泥漿状となすとともにこれを従来周知のドクター
ブレード法やカレンダーロール法等を採用しシート状と
なすことによって複数枚のセラミックグリーンシートを
得、しかる後、前記セラミックグリーンシートに適当な
打ち抜き加工を施すとともに必要に応じて上下に積層
し、これを約1600℃の温度で焼成することによって
製作される。
When the insulating substrate 1 is made of, for example, a sintered body of aluminum oxide, an organic binder, a solvent, a plasticizer, a dispersant, etc. suitable for a raw material powder of aluminum oxide, silicon oxide, magnesium oxide, calcium oxide and the like. Is added to form a slurry, and a plurality of ceramic green sheets are obtained by forming the sheet into a sheet by employing a conventionally known doctor blade method, calender roll method, or the like. It is manufactured by performing a punching process, laminating the layers up and down as necessary, and firing this at a temperature of about 1600 ° C.

【0017】また、前記絶縁基体1はその搭載部1a表
面に、半導体素子2の電極2aと接続される複数の接続
パッド3が半導体素子の電極2aに対応して形成されて
おり、更に前記接続パッド3から絶縁基体1の下面にか
けては複数の配線導体5が導出形成されており、搭載部
1a上に半導体素子2を接合するとともに、半導体素子
2の電極2aを接続パッド3に電気的に接続させること
によって半導体装置として完成し、配線導体5の導出部
を外部電気回路に接続すれば半導体素子2は外部電気回
路に電気的に接続されることとなる。
A plurality of connection pads 3 connected to the electrodes 2a of the semiconductor element 2 are formed on the surface of the mounting portion 1a of the insulating base 1 so as to correspond to the electrodes 2a of the semiconductor element. A plurality of wiring conductors 5 are formed to extend from the pad 3 to the lower surface of the insulating base 1. The semiconductor element 2 is joined to the mounting portion 1a, and the electrode 2a of the semiconductor element 2 is electrically connected to the connection pad 3. Thus, the semiconductor device is completed as a semiconductor device. If the lead portion of the wiring conductor 5 is connected to an external electric circuit, the semiconductor element 2 is electrically connected to the external electric circuit.

【0018】前記接続パッド3及び配線導体5は、タン
グステン、モリブデン、銅、銀等の金属材料から成り、
例えば、タングステン、モリブデン、マンガン等の高融
点金属粉末から成る場合であれば、高融点金属粉末に適
当な有機溶剤、溶媒を添加混合して得た金属ペーストを
従来周知のスクリーン印刷法等の厚膜手法を採用し、絶
縁基体1となるセラミックグリーンシートの表面に予め
印刷塗布しておくことによって絶縁基体1の搭載部1a
から下面にかけて形成される。
The connection pad 3 and the wiring conductor 5 are made of a metal material such as tungsten, molybdenum, copper, silver, etc.
For example, in the case of a metal powder having a high melting point such as tungsten, molybdenum, or manganese, a suitable organic solvent is added to the metal powder having a high melting point, and a metal paste obtained by adding and mixing a solvent is thickened by a conventionally known screen printing method. The mounting portion 1a of the insulating base 1 is formed by applying a film method and printing and coating the surface of the ceramic green sheet serving as the insulating base 1 in advance.
To the lower surface.

【0019】また、前記半導体素子2は、その下面に金
バンプ等の電極2aが形成されており、異方性導電膜4
により、下面が搭載部1a上に接合されるとともに電極
2aが前記接続パッド3に電気的に接続されている。
The semiconductor element 2 has an electrode 2a such as a gold bump formed on the lower surface thereof.
Thereby, the lower surface is joined to the mounting portion 1a, and the electrodes 2a are electrically connected to the connection pads 3.

【0020】前記異方性導電膜4は、半導体素子2を絶
縁基体1の搭載部1a上に接合させる接着剤として作用
するとともに、半導体素子2の電極2aを接続パッド3
に電気的に接続させる導電性接着部材として作用する。
The anisotropic conductive film 4 functions as an adhesive for bonding the semiconductor element 2 to the mounting portion 1a of the insulating base 1, and also connects the electrode 2a of the semiconductor element 2 to the connection pad 3.
And acts as a conductive adhesive member to be electrically connected to the substrate.

【0021】前記異方性導電膜4は、図2に示す如く、
銀、銅、金、ニッケル、錫、鉛またはこれらの合金等の
金属や、これらの金属を表面に被着させたポリスチレン
等の有機樹脂から成る導電粒子(平均径が1〜10μm
程度)4aを、厚さ10〜50μmのエポキシ樹脂等の
熱硬化性樹脂、ポリエチレン樹脂等の熱可塑性樹脂、ア
クリル系樹脂等の光硬化性樹脂等から成る樹脂フィルム
4b中に分散させた構造を有しており、前記樹脂フィル
ム4bは半導体素子2を搭載部1aに接合させる接着剤
として作用し、また前記導電粒子4aは半導体素子2の
電極2aを接続パッド3に接続させる導電性部材として
作用する。
The anisotropic conductive film 4, as shown in FIG.
Conductive particles made of a metal such as silver, copper, gold, nickel, tin, lead or an alloy thereof, or an organic resin such as polystyrene having these metals adhered to the surface (the average diameter is 1 to 10 μm
A) A structure in which 4a is dispersed in a resin film 4b made of a thermosetting resin such as an epoxy resin having a thickness of 10 to 50 μm, a thermoplastic resin such as a polyethylene resin, a photocurable resin such as an acrylic resin, or the like. The resin film 4b functions as an adhesive for bonding the semiconductor element 2 to the mounting portion 1a, and the conductive particles 4a function as a conductive member for connecting the electrode 2a of the semiconductor element 2 to the connection pad 3. I do.

【0022】前記異方性導電膜4による搭載部1aへの
半導体素子2の実装は、例えば、絶縁基体1の搭載部1
a上に半導体素子2を、間に異方性導電膜4を挟み、搭
載部1a表面の複数の接続パッド3と半導体素子2の電
極2aとを上下に位置合わせして載せ、次に、これらの
半導体素子2、異方性導電膜4および絶縁基体1を上下
に約50〜150gfの荷重が各接続パッド毎にかかる
ようにして加圧するとともに加熱することによって行わ
れ、接続パッド3と電極2aとの間に多数の導電粒子4
aを捕捉、保持させるとともにこれを加圧して適度に扁
平化させて広接触面積で挟ませることにより両者が低電
気抵抗で電気的に接続されることとなり、同時に樹脂フ
ィルム4bを熱硬化させることにより導電粒子4aの位
置が固定されるとともに絶縁基体1と半導体素子2とが
接合されることとなる。
The mounting of the semiconductor element 2 on the mounting portion 1 a by the anisotropic conductive film 4 is performed, for example, by mounting the mounting portion 1 of the insulating base 1.
a, a plurality of connection pads 3 on the surface of the mounting portion 1a and the electrodes 2a of the semiconductor element 2 are vertically aligned, and then the semiconductor element 2 is mounted thereon. The semiconductor device 2, the anisotropic conductive film 4, and the insulating base 1 are pressed and heated so that a load of about 50 to 150 gf is applied to each connection pad vertically, and the connection pad 3 and the electrode 2a are heated. A large number of conductive particles 4 between
a is captured and held, and is pressurized to be appropriately flattened and sandwiched with a wide contact area, so that both are electrically connected with low electric resistance, and at the same time, the resin film 4b is thermally cured. As a result, the position of the conductive particles 4a is fixed, and the insulating base 1 and the semiconductor element 2 are joined.

【0023】この場合、前記複数の全接続パッド3上面
の平坦度が15μmを超えると、各接続パッド3におけ
る異方性導電膜4を圧縮させる圧力にばらつきが発生し
各接続パッド3と半導体素子2の電極2aとの間の接触
抵抗に差異が生じて半導体素子2を正確に作動させるこ
とができなくなる。従って、前記全接続パッド3上面の
平坦度は15μm以下に特定される。
In this case, when the flatness of the upper surface of the plurality of connection pads 3 exceeds 15 μm, the pressure for compressing the anisotropic conductive film 4 in each connection pad 3 varies, and each connection pad 3 and the semiconductor element A difference occurs in the contact resistance between the second electrode 2a and the second element 2a, so that the semiconductor element 2 cannot be operated accurately. Therefore, the flatness of the upper surface of all the connection pads 3 is specified to be 15 μm or less.

【0024】また、前記接続パッド3は、その表面粗さ
の最大高さRyが異方性導電膜4中の導電粒子4aの平
均径の1/2未満となると、導電粒子4aの平均径(一
般に1〜10μm)に比べ、これを捕捉、保持する接続
パッド3表面の谷部3aの深さが浅くなりすぎ、導電粒
子4aを捕捉、保持する作用が極めて低いものとなり、
半導体素子2を異方性導電膜4を用いて搭載部1a上に
実装する際、圧力による樹脂フィルム4bの変形にとも
なって多数の導電粒子4aが接続パッド3と半導体素子
の電極2aとの間から外れ、接続パッド3と電極2aと
の間に介在する導電粒子が不足して両者の接触抵抗を高
くしてしまう。また、Ryが10μmを超えて粗面とな
ると、異方性導電膜6中の導電粒子4aの平均径に比べ
て接続パッド3表面の谷部3aの深さが深くなりすぎ、
保持された導電粒子4aの多数が谷部3a内に隠れてし
まい、導電粒子4aを効果的に扁平化させて接続パッド
3と電極2aとの接触面積を広いものとすることができ
ず、両者の接触抵抗を高くしてしまう。従って、前記接
続パッド3は、その表面粗さの最大高さRyを、異方性
導電膜4の導電粒子4aの平均径に対し1/2以上乃至
10μm以下の範囲としておく必要がある。
When the maximum height Ry of the surface roughness of the connection pad 3 is less than half the average diameter of the conductive particles 4a in the anisotropic conductive film 4, the average diameter of the conductive particles 4a ( (Generally 1 to 10 μm), the depth of the valleys 3a on the surface of the connection pad 3 for capturing and holding this is too shallow, and the action of capturing and holding the conductive particles 4a is extremely low.
When the semiconductor element 2 is mounted on the mounting portion 1a using the anisotropic conductive film 4, a large number of conductive particles 4a are formed between the connection pad 3 and the electrode 2a of the semiconductor element due to deformation of the resin film 4b due to pressure. And the conductive particles interposed between the connection pad 3 and the electrode 2a are insufficient, and the contact resistance between them is increased. When Ry exceeds 10 μm and becomes rough, the depth of the valley 3 a on the surface of the connection pad 3 becomes too deep compared to the average diameter of the conductive particles 4 a in the anisotropic conductive film 6,
Many of the held conductive particles 4a are hidden in the valleys 3a, and the conductive particles 4a cannot be effectively flattened to increase the contact area between the connection pad 3 and the electrode 2a. Increase the contact resistance. Therefore, the connection pad 3 needs to have the maximum height Ry of the surface roughness in the range of not less than 乃至 to not more than 10 μm with respect to the average diameter of the conductive particles 4 a of the anisotropic conductive film 4.

【0025】更に、前記接続パッド3はその側面と異方
性導電膜4の間に有機樹脂から成る絶縁層6が介在され
ている。
Further, an insulating layer 6 made of an organic resin is interposed between the side surface of the connection pad 3 and the anisotropic conductive film 4.

【0026】前記絶縁層6は、接続パッド3の側面と異
方性導電膜の導電粒子4aとの電気的接続を防止する作
用をなし、隣接する接続パッド3間の間隔が狭くなると
ともに隣接する接続パッド3間に位置する複数の導電粒
子4aが横方向に連なったとしても隣接する接続パッド
3間は前記絶縁層6によって電気的に短絡するのが有効
に防止され、その結果、半導体素子2を正常、かつ安定
に作動させることができる。
The insulating layer 6 functions to prevent electrical connection between the side surface of the connection pad 3 and the conductive particles 4a of the anisotropic conductive film, and the space between adjacent connection pads 3 is reduced and adjacent. Even if a plurality of conductive particles 4a located between the connection pads 3 are connected in a horizontal direction, the short-circuit between the adjacent connection pads 3 is effectively prevented by the insulating layer 6, so that the semiconductor element 2 Can be operated normally and stably.

【0027】前記絶縁層6は、エポキシ樹脂、ポリイミ
ド樹脂等の有機樹脂から成り、例えば、エポキシ樹脂か
ら成る場合であれば、絶縁基体1の搭載部1a上面に、
半導体素子2を搭載する前に、熱硬化性のエポキシ樹脂
前駆体を所定の厚さに印刷塗布するとともに加熱、硬化
して、搭載部1aの絶縁基体1および接続パッド3の表
面に所定厚さのエポキシ樹脂皮膜を被着させ、その後、
このエポキシ樹脂皮膜上面から平面研磨を施し、接続パ
ッド3の上面を露出させることにより接続パッド3の側
面に所定厚さで被着させることができる。
The insulating layer 6 is made of an organic resin such as an epoxy resin or a polyimide resin. For example, if the insulating layer 6 is made of an epoxy resin, the insulating layer 6 is formed on the upper surface of the mounting portion 1a of the insulating base 1.
Before mounting the semiconductor element 2, a thermosetting epoxy resin precursor is printed and applied to a predetermined thickness and heated and cured to form a predetermined thickness on the surface of the insulating base 1 and the connection pad 3 of the mounting portion 1 a. Epoxy resin film, and then
By performing planar polishing from the upper surface of the epoxy resin film and exposing the upper surface of the connection pad 3, it is possible to adhere the side surface of the connection pad 3 with a predetermined thickness.

【0028】また同時にこの平面研磨により、全接続パ
ッド3上面の平坦度を高くするとともにその表面を適度
に粗くすることができ、全接続パッド3上面の平坦度を
15μm以下とするとともに、各接続パッド3の表面粗
さの最大高さRyを異方性導電膜4の導電粒子4aの平
均径に対し1/2以上乃至10μm以下の範囲とするこ
とができる。
At the same time, by this planar polishing, the flatness of the upper surface of all the connection pads 3 can be increased and the surface thereof can be appropriately roughened. The maximum height Ry of the surface roughness of the pad 3 can be in the range of 以上 to 10 μm with respect to the average diameter of the conductive particles 4 a of the anisotropic conductive film 4.

【0029】なお、前記絶縁層6は、その厚さが1μm
未満と薄いものとなると絶縁層6で接続パッド3の側面
を完全に被覆することができず隣接する接続パッド3間
の電気的短絡を有効に防止するのが困難となつてしま
う。従って、前記絶縁層6は、その厚さを1μm以上と
しておくことが好ましく、特に約10μmとしておくこ
とが好ましい。
The insulating layer 6 has a thickness of 1 μm.
If the thickness is less than 10 mm, the side surface of the connection pad 3 cannot be completely covered with the insulating layer 6, and it is difficult to effectively prevent an electrical short circuit between the adjacent connection pads 3. Therefore, the thickness of the insulating layer 6 is preferably set to 1 μm or more, and particularly preferably set to about 10 μm.

【0030】また、前記絶縁層6を形成する有機樹脂は
その熱膨張係数を異方性導電膜4の樹脂フィルム4bを
形成する有機樹脂の熱膨張係数に近似(約90%〜11
0%)させておくと、絶縁層6と異方性導電膜4に熱が
作用したとしても両者間に大きな熱応力が発生すること
なく両者を強固に接合させておくことができる。従っ
て、半導体装置の長期信頼性をより一層高めるために絶
縁層6と異方性導電膜4との接合を強固としておくには
前記絶縁層6を形成する有機樹脂のの熱膨張係数を異方
性導電膜4の樹脂フィルム4bを形成する有機樹脂の熱
膨張係数に近似(約90%〜110%)させておくこと
が好ましい。
The coefficient of thermal expansion of the organic resin forming the insulating layer 6 is similar to that of the organic resin forming the resin film 4b of the anisotropic conductive film 4 (about 90% to 11%).
0%), even if heat acts on the insulating layer 6 and the anisotropic conductive film 4, the two can be firmly joined without generating large thermal stress between them. Therefore, in order to further increase the long-term reliability of the semiconductor device and to keep the bonding between the insulating layer 6 and the anisotropic conductive film 4 strong, the thermal expansion coefficient of the organic resin forming the insulating layer 6 must be anisotropic. It is preferable that the thermal expansion coefficient of the organic resin forming the resin film 4b of the conductive conductive film 4 is approximated (about 90% to 110%).

【0031】更に、前記接続パッド3および配線導体5
は、その露出する表面にニッケル、金等の耐食性に優
れ、かつボンディング性、半田との濡れ性に優れる金属
をめっき法により1〜20μmの厚みに被着させておく
と、接続パッド3および配線導体5の酸化腐食を有効に
防止することができるとともに、配線導体5の外部電気
回路基板への接続を容易かつ確実なものとすることがで
きる。従って、前記配線導体5、及び接続パッド3は、
その露出する表面にニッケル、金等の耐食性に優れ、か
つボンディング性、半田との濡れ性に優れる金属をめっ
き法により1〜20μmの厚みに被着させておくことが
好ましい。
Further, the connection pads 3 and the wiring conductors 5
When a metal having excellent corrosion resistance such as nickel and gold, and excellent in bonding property and wettability with solder is applied to the exposed surface to a thickness of 1 to 20 μm by plating, the connection pad 3 and the wiring Oxidation and corrosion of the conductor 5 can be effectively prevented, and the connection of the wiring conductor 5 to the external electric circuit board can be made easy and reliable. Therefore, the wiring conductor 5 and the connection pad 3
It is preferable that a metal having excellent corrosion resistance, such as nickel and gold, and having excellent bonding properties and wettability with solder is applied to the exposed surface to a thickness of 1 to 20 μm by plating.

【0032】なお、本発明は上述の実施例に限定される
ものではなく、本発明の要旨を逸脱しない範囲であれば
種々の変更は可能であり、例えば、上述の実施例では、
絶縁層6を接続パッド3の側面から絶縁基体1表面にま
で形成しているが、光硬化性のエポキシ樹脂を用いると
ともにフォトリソグラフィー技術を採用することによ
り、絶縁層6を接続パッド3の側面のみに被着させるよ
うにしてもよい。
It should be noted that the present invention is not limited to the above-described embodiment, and various changes can be made without departing from the spirit of the present invention.
Although the insulating layer 6 is formed from the side surface of the connection pad 3 to the surface of the insulating base 1, the insulating layer 6 is formed only on the side surface of the connection pad 3 by using a photocurable epoxy resin and employing photolithography technology. It may be made to adhere to.

【0033】[0033]

【発明の効果】本発明の半導体装置によれば、全接続パ
ッド上面の平坦度を15μm以下としたことから、この
接続パッドと半導体素子の電極とを、樹脂フィルム中に
金属粒子を分散させて成る異方性導電膜を介して接続す
る際、全接続パッドにほぼ均等に圧力を加えることがで
き、接続パッドと半導体素子の電極との間に導電粒子を
挟みつける力が各接続パッドの間で均等となり、各接続
部の電気抵抗がばらつくことを有効に防ぐことができ
る。
According to the semiconductor device of the present invention, since the flatness of the upper surface of all the connection pads is set to 15 μm or less, the connection pads and the electrodes of the semiconductor element are formed by dispersing metal particles in a resin film. When connecting via the anisotropic conductive film, the pressure can be applied almost uniformly to all the connection pads, and the force for sandwiching the conductive particles between the connection pads and the electrodes of the semiconductor element is applied between the connection pads. Thus, it is possible to effectively prevent the electric resistance of each connection portion from varying.

【0034】また、本発明の半導体装置によれば、各接
続パッドの表面粗さの最大高さRyを異方性導電膜の導
電粒子の平均径に対し1/2以上乃至10μm以下と、
適度に粗面としたことから、接続パッドと半導体素子の
電極との間に異方性導電膜を挟んで加圧するとき、導電
粒子を前記適度に粗面とした接続パッド上面の谷部内に
容易に捕捉するとともにこれを確実に保持させることが
でき、その結果、十分な数の導電粒子が接続面に捕捉、
保持されることとなり接続パッドと半導体素子の電極と
の接触抵抗を十分低いものとし、電気特性に優れた半導
体装置を得ることができる。
According to the semiconductor device of the present invention, the maximum height Ry of the surface roughness of each connection pad is set to 1 / to 10 μm with respect to the average diameter of the conductive particles of the anisotropic conductive film.
Since the surface is moderately rough, when the anisotropic conductive film is interposed between the connection pad and the electrode of the semiconductor element and pressurized, the conductive particles are easily placed in the valley of the upper surface of the connection pad having the moderately rough surface. And ensure that it is retained, so that a sufficient number of conductive particles are captured on the connection surface,
As a result, the contact resistance between the connection pad and the electrode of the semiconductor element is made sufficiently low, so that a semiconductor device having excellent electrical characteristics can be obtained.

【0035】さらに本発明の半導体装置によれば、接続
パッドの側面と異方性導電膜との間に有機樹脂から成る
絶縁層を介在させたことから、接続パッドが狭ピッチで
形成され、かつ隣接する接続パッド間で異方性導電膜の
複数の導電粒子が横方向に連なったとしても、この連な
った導電粒子と各接続パッドとは前記接続パッド側面の
絶縁層により絶縁され、その結果、隣接する接続パッド
が電気的に短絡することはなく、半導体装置を常に正
常、かつ安定に作動させることができる。
Further, according to the semiconductor device of the present invention, since the insulating layer made of an organic resin is interposed between the side surface of the connection pad and the anisotropic conductive film, the connection pads are formed at a narrow pitch. Even if a plurality of conductive particles of the anisotropic conductive film are connected in a lateral direction between adjacent connection pads, the connected conductive particles and each connection pad are insulated by the insulating layer on the side of the connection pad, and as a result, Adjacent connection pads are not electrically short-circuited, and the semiconductor device can always operate normally and stably.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の半導体装置の一実施例を示す断面図で
ある
FIG. 1 is a sectional view showing one embodiment of a semiconductor device of the present invention.

【図2】図1に示す半導体装置の要部断面図であるFIG. 2 is a sectional view of a principal part of the semiconductor device shown in FIG. 1;

【符号の説明】[Explanation of symbols]

1・・・・絶縁基体 2・・・・半導体素子 2a・・・電極 3・・・・接続パッド 4・・・・異方性導電膜 4a・・・導電粒子 4b・・・樹脂フィルム 5・・・・配線導体 6・・・・絶縁層 DESCRIPTION OF SYMBOLS 1 ... Insulating base 2 ... Semiconductor element 2a ... Electrode 3 ... Connection pad 4 ... Anisotropic conductive film 4a ... Conductive particles 4b ... Resin film 5 ... ... Wiring conductor 6 ... Insulating layer

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】上面に複数個の接続パッドを有する絶縁基
体と、下面に複数個の電極を有する半導体素子とから成
り、絶縁基体上に半導体素子を搭載するとともに各接続
パッドと各電極とを樹脂フィルム中に導電粒子を分散さ
せて成る異方性導電膜を介して接続した半導体装置であ
って、前記全接続パッド上面の平坦度を15μm以下と
するとともに各接続パッドの表面粗さの最大高さ(R
y)を異方性導電膜の導電粒子の平均径に対し1/2以
上乃至10μm以下とし、かつ前記接続パッドの側面
と、前記異方性導電膜との間に有機樹脂から成る絶縁層
を介在させたことを特徴とする半導体装置。
An insulating substrate having a plurality of connection pads on an upper surface; and a semiconductor element having a plurality of electrodes on a lower surface. The semiconductor element is mounted on the insulating substrate, and each connection pad and each electrode are connected to each other. A semiconductor device connected via an anisotropic conductive film formed by dispersing conductive particles in a resin film, wherein the flatness of the upper surface of all the connection pads is 15 μm or less, and the maximum surface roughness of each connection pad is Height (R
y) is set to 1 / to 10 μm with respect to the average diameter of the conductive particles of the anisotropic conductive film, and an insulating layer made of an organic resin is provided between the side surface of the connection pad and the anisotropic conductive film. A semiconductor device characterized by being interposed.
【請求項2】前記絶縁層の厚みが1μm以上であること
を特徴とする請求項1に記載の半導体装置。
2. The semiconductor device according to claim 1, wherein said insulating layer has a thickness of 1 μm or more.
JP2000006112A 2000-01-11 2000-01-11 Semiconductor device Pending JP2001196418A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000006112A JP2001196418A (en) 2000-01-11 2000-01-11 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000006112A JP2001196418A (en) 2000-01-11 2000-01-11 Semiconductor device

Publications (1)

Publication Number Publication Date
JP2001196418A true JP2001196418A (en) 2001-07-19

Family

ID=18534695

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000006112A Pending JP2001196418A (en) 2000-01-11 2000-01-11 Semiconductor device

Country Status (1)

Country Link
JP (1) JP2001196418A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003255849A (en) * 2002-02-28 2003-09-10 Rohm Co Ltd Flat panel display
JP2008034868A (en) * 2007-09-25 2008-02-14 Seiko Epson Corp Terminal electrode, semiconductor device, module, and electronic apparatus

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003255849A (en) * 2002-02-28 2003-09-10 Rohm Co Ltd Flat panel display
JP2008034868A (en) * 2007-09-25 2008-02-14 Seiko Epson Corp Terminal electrode, semiconductor device, module, and electronic apparatus
JP4670851B2 (en) * 2007-09-25 2011-04-13 セイコーエプソン株式会社 Modules and electronics

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