JP2001195011A - Thin-film transistor array substrate for display device and display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a TFT array substrate of a drive circuit built-in type which allows the simplification of manufacturing processes and are decreased in characteristic variations. SOLUTION: This TFT array substrate 1 has pixel driving TFTs 8 which control the writing of pixel signals to pixels connected to the respective pixels of a display region 4 and TFTs 9 for drivers for driving the pixel driving TFTs 8 on the same substrate. Semiconductor active layers 15 of the pixel driving TFTs 8 consist of polcyrstalline silicon formed without heat treatment after deposition and semiconductor active layers 15 of the TFTs 9 for drivers consist of polcyrstalline silicon obtained by subjecting the polcyrstalline silicon to heat treatment.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor array substrate for a display device and a display device. The present invention relates to a thin-film transistor array substrate technology that is made differently according to a place of use.

[0002]

2. Description of the Related Art In a thin film transistor (TFT) array substrate constituting a liquid crystal display panel, a plurality of source lines and a plurality of gate lines are arranged in a matrix. A region surrounded by a source line and two adjacent gate lines constitutes each pixel. Each pixel is provided with a pixel electrode, and a TFT for controlling writing of a signal to the pixel electrode is provided. The structure of a TFT is roughly classified into a top gate type (also referred to as a forward stagger type) and a bottom gate type (also referred to as an inverted stagger type). Here, an example of a top gate type TFT is shown. explain.

As shown in FIG. 7, a top gate type TFT is provided with an island-shaped semiconductor active layer 105 having a source region 102, a drain region 104 and a channel region 103 on a transparent substrate 101.
A gate insulating film 106 is provided thereon, and the gate insulating film 10
A gate electrode 107 is provided on 6. An interlayer insulating film is provided so as to cover the gate electrode 107 and the semiconductor active layer 105, and a source electrode 110 connected to the source region 102 of the semiconductor active layer 105 through a contact hole 109 is provided on the interlayer insulating film. And a drain electrode 112 connected to the drain region 104 of the semiconductor active layer 105 through the contact hole 111. When the TFT is used as a switching element of each pixel of the active matrix substrate, a passivation film 113 is provided on the interlayer insulating film 108 so as to cover the source electrode 110 and the drain electrode 112. A pixel electrode 115 connected to the drain electrode 112 through the contact hole 114 is provided.

In the above-mentioned TFT structure, as an example of a material constituting each layer, the semiconductor active layer 105 is made of polycrystalline silicon (poly-Si), and the source electrode 11 is made of poly-Si.
The drain electrode 112 and the gate electrode 107 are made of a conductive metal material, and the pixel electrode 115 is made of a transparent conductive film such as indium tin oxide (hereinafter abbreviated as ITO). Insulating films such as the gate insulating film 106 and the interlayer insulating film 108 are formed of a silicon oxide film (SiO ₂ film), and the passivation film 1
13 is composed of a silicon nitride film (SiN _x film).
The TFT functions as a switching element by turning on and off a current flowing between the source and the drain by controlling carriers induced in the channel region 103 by the action of an electric field when a voltage is applied to the gate electrode 107.

As exemplified above, in recent years, TFTs used as switching elements in liquid crystal display panels and the like have
Polycrystalline silicon has been widely used as a semiconductor active layer. The reason is that polycrystalline silicon has a higher carrier mobility than amorphous silicon. For example, amorphous silicon has a mobility of 0.3 to ¹ cm ² / V · sec.
While the mobility of polycrystalline silicon is 10
About 100 cm ² / V · sec. Thus, what is called a polycrystalline silicon TFT is an amorphous silicon TFT.
This is because the mobility of the carrier is larger than that of the FT, so that the driving capability is large and the high-speed operation can be performed.

[0006]

As for the driving of the liquid crystal display panel, instead of the conventional method in which a driver IC is externally mounted on a TFT array substrate, a pixel driving TFT is driven.
As with the FT, a TFT array substrate with a built-in driver circuit, in which a driver circuit is formed by TFTs formed on the substrate, is employed. In this case, the driving abilities required for the pixel driving TFT and the driver TFT are not the same, and the pixel driving TF that performs only the switching operation of one pixel is used.
Many TFTs connected to source line and gate line compared to T
It is necessary that the driver TFT for driving the TFT has a higher driving capability.

In manufacturing this type of TFT, a polycrystalline silicon film forming a semiconductor active layer has been formed through the following steps. First, an amorphous silicon film is formed on a substrate using a low-pressure plasma CVD apparatus. At this time, since hydrogen is contained in the structure of the amorphous silicon film, subsequently, the substrate is heated using, for example, a thermal annealing apparatus such as an electric furnace to dehydrogenate the amorphous silicon film. Then, for example, XeCl, ArF, Ar
The amorphous silicon film after the dehydrogenation was polycrystallized by using a gas laser annealing apparatus using a halogen gas such as Cl, XeF or the like to convert the amorphous silicon film into a polycrystalline silicon film.

This method is a method of forming a polycrystalline silicon film generally called a solid phase growth method. Other low pressure CVD
Polycrystalline silicon can be directly formed by a sputtering method, a sputtering method, or the like.However, conventionally, in the case of polycrystalline silicon formed directly in this manner, the crystal grain size is small, and the carrier mobility is too large. did not become. Therefore, a method has been adopted in which amorphous silicon is once formed at a relatively low temperature, and then a heat treatment (annealing treatment) at a higher temperature is performed to grow a polycrystalline silicon film having a crystal grain size of several μm. .

However, in the above-mentioned conventional method of forming a polycrystalline silicon film, the formation of amorphous silicon containing hydrogen (hereinafter referred to as hydrogenated amorphous silicon), the dehydrogenation of the hydrogenated amorphous silicon film, the formation of the amorphous silicon film, The polycrystallization process and the film forming process are complicated, which causes an increase in TAT (Turn Around Time, time until product completion). In particular, when manufacturing a large-screen liquid crystal display panel, the load on the laser annealing apparatus used for polycrystallization becomes extremely large, and the variation in characteristics due to the large in-plane variation of the annealing process increases. There was an obstacle to enlargement of the screen.

In accordance with the difference in driving ability required for the TFT, for example, the pixel driving TFT has a bottom gate structure and the driver TFT has a top gate structure. And T
It has also been proposed to change the structure of the FT itself. However, in this case, since it is necessary to have both a step for forming a bottom gate structure and a step for forming a top gate structure during the manufacturing process, the manufacturing process becomes extremely complicated, the TAT increases, and the manufacturing cost increases. There was a problem that caused soaring.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problem, and has a driver circuit built-in type TFT which can simplify a manufacturing process and has less characteristic variation.
It is an object to provide an array substrate and a display device using the same.

[0012]

In order to achieve the above object, a TFT array substrate for a display device according to the present invention is provided on a same substrate by a pixel drive which is connected to pixels and controls writing of image signals to the pixels. A thin film transistor for driving a pixel driver, a thin film transistor for a source driver for supplying an image signal to the thin film transistor for pixel driving, and a thin film transistor for a gate driver for driving the thin film transistor for pixel driving. The low-mobility polycrystalline silicon is formed without heat treatment, and the semiconductor active layer of at least one of the source driver thin film transistor and the gate driver thin film transistor is obtained by performing heat treatment on the low mobility polycrystalline silicon. And high mobility polycrystalline silicon.

In manufacturing a conventional polycrystalline silicon TFT, after forming an amorphous silicon film, an annealing process is applied to polycrystallize the amorphous silicon to form a semiconductor active layer made of polycrystalline silicon. In polycrystalline silicon that has not been subjected to heat treatment such as annealing after being directly formed into a film (this polycrystalline silicon is hereinafter referred to as as-depo. Polycrystalline silicon), the mobility of carriers is not so large, and amorphous silicon Because it was equivalent to On the other hand, as a result of diligent research, the present applicant has found that if a polycrystalline silicon film is formed by a specific film forming method, the mobility does not reach 100, but as-depo. And found that a sufficiently high mobility was obtained.

The TFT array substrate of the present invention has
o. A polycrystalline silicon film is used for a semiconductor active layer of a pixel driving TFT. In other words, the polycrystalline silicon film with the mobility of about 2 to 10 achieved by the present applicant has insufficient driving capability as a driver TFT, but is in a range that can be sufficiently used as a pixel driving TFT. So T
In the FT array substrate, in a pixel driving TFT corresponding to a display region, an as-deposited polycrystalline silicon film (low mobility polycrystalline silicon) which is not subjected to an annealing process is directly used as a semiconductor active layer and corresponds to a peripheral circuit region. In driver TFT
A configuration in which a polycrystalline silicon film (high mobility polycrystalline silicon) whose mobility is improved by performing a heat treatment such as laser annealing on the polycrystalline silicon film is employed as a semiconductor active layer.

According to this structure, heat treatment such as laser annealing only needs to be performed on the driver TFT portion in the peripheral circuit region, so that the load on the laser annealing device is reduced and the influence of the in-plane variation of the annealing process is sufficient. Become smaller. In addition, since a relatively high mobility has already been obtained in the as-depo. Polycrystalline silicon film state, the intensity of the laser beam can be reduced as compared with the case where the amorphous silicon film is annealed. Thereby, the variation itself of the annealing process is also reduced.

That is, according to the present invention, since a certain degree of mobility can be already obtained in the as-depo. Polycrystalline silicon film, this can be used for a pixel driving TFT.
Since the mobility is increased by annealing the polycrystalline silicon film, this can be used for the driver TFT. Therefore, the pixel driving T for which the required driving capability is different is used.
The same structure can be adopted for both TFTs without changing the structure between the FT and the driver TFT. In particular, when a top gate structure is employed, the source / drain regions of the semiconductor active layer can be formed in a self-aligned manner, which can contribute to reduction in the number of masks used and simplification of the manufacturing process.

As described above, according to the present invention, a TFT array substrate with a built-in driver circuit which can be expected to simplify the manufacturing process, reduce the manufacturing cost, shorten the TAT, etc., and has less variation in characteristics. It becomes possible.

It should be noted that "low mobility polycrystalline silicon" as used herein means 2 to 50 cm which is sufficient for driving a pixel.
Polycrystalline silicon with a mobility of ² / V · sec, “high mobility polycrystalline silicon” means that it can be used for driver circuits.
Polycrystalline silicon having a mobility of 0 to ²⁰⁰ cm ² / V · sec,
Respectively.

As one of suitable methods for forming a low mobility polycrystalline silicon film in the present invention, a radial line slot antenna type plasma CVD film forming method can be used. As another method, a sputtering method can be used. In particular, it is desirable to use a two-frequency excitation sputtering method using helium gas as a sputtering gas.
The “two-frequency excitation sputtering method” is a method in which high-frequency power is applied to both an upper electrode holding a target and a lower electrode holding a substrate to perform sputtering.

A display device according to the present invention is characterized by using the above-mentioned TFT array substrate for a display device according to the present invention. The display device of the present invention is the same as the display device T
Since the FT array substrate is used, reduction in manufacturing cost, reduction in TAT, reduction in variation in characteristics, and the like can be realized.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a diagram showing a schematic configuration of a TFT array substrate (a thin film transistor array substrate for a display device) according to the present embodiment. This TFT array substrate is a driver built-in substrate in which a source driver and a gate driver are formed on the substrate, which constitutes one substrate of the liquid crystal display device. Note that a large number of TFTs are actually provided in the display area, the source driver, and the gate driver.
However, FIG. 1 shows only one TFT in an enlarged manner for convenience of illustration.

As shown in FIG. 1, the TFT array substrate 1 of this embodiment has a large number of source lines 2 and a large number of gate lines 3.
Are arranged in a lattice pattern, and these source lines 2 and gate lines 3
And a peripheral area 5 arranged around the display area 4 in which a number of pixel electrodes are arranged in a matrix. In the peripheral circuit area 5, a source driver 6 is provided above the display area 4 in FIG. 1, and one end of a number of source lines 2 extending in the display area 4 in the vertical direction is connected to the source driver 6. Have been. Similarly, a gate driver 7 is provided on the left side of the display area 4, and one ends of a number of gate lines 3 extending in the display area 4 in the horizontal direction are connected to the gate driver 7. A large number of pixel driving TFTs are provided inside the display area 4.
8 are formed, and a large number of driver TFTs 9 are formed inside the source driver 6 and the gate driver 7. In the case of the present embodiment, these are all constituted by top gate type TFTs. Also, the source driver 6,
Each of the gate drivers 7 is provided with a connection wiring 10 for supplying a signal from an external controller (not shown) to the source driver 6 and the gate driver 7.

Next, the TFT array substrate 1 of the present embodiment
Will be described with reference to FIGS. The right side of the broken line in FIG.
A cross-sectional view showing T8 (a cross-sectional view along the line AA in FIG. 1), and the left side of the broken line is a cross-sectional view (a cross-sectional view along the line BB in FIG. 1) showing the driver TFT 9 in the peripheral circuit region 5. is there.

First, as shown in FIG. 2A, a polycrystalline silicon film 13 (low mobility polycrystalline silicon film) having a thickness of, for example, about 50 nm is formed on a transparent substrate 12 such as a glass substrate. In this case, either a radial line slot antenna type plasma CVD film formation method or a sputtering method can be used. Here, a film forming apparatus used for this film formation will be described.

FIG. 3 shows a schematic configuration of a radial line slot antenna type plasma CVD apparatus 53, in which a radial line slot antenna 5 for radiating microwaves.
4 is a film forming apparatus of a microwave plasma excitation type provided with the apparatus 4. FIG. 4 shows a radial line slot antenna 54.
FIG.

As shown in FIG. 3, a radial line slot antenna 54 is installed above the chamber 55, and a susceptor 56 for supporting the transparent substrate 12 is installed below the chamber 55 so as to face the antenna. Have been. Therefore, the upper part of the transparent substrate 12 becomes the plasma forming space 57 and the radial line slot antenna 54
Microwaves are radiated toward the plasma forming space 57 from. A number of slot holes for microwave radiation (not shown in FIG. 3) are provided on the surface of the radial line slot antenna 54, and 2.45 GHz generated by the microwave generation system 58 is provided.
Is supplied from the back side of the antenna 54 via the waveguide 59 and the coaxial waveguide converter 60.

The radial line slot antenna 54 includes:
A microwave slow wave path forming member 62 made of a dielectric material such as AlN or Al ₂ O ₃ is fixed to the lower surface of the disc-shaped conductor 61, and a number of slot holes 63 are formed in the lower surface of the slow wave path forming member 62. A slot body 64 made of a metal plate such as aluminum having Further, the lower surface of the slot body 64 has a property of transmitting microwaves, for example, A
A holding body 65 made of a dielectric material such as 1N or Al ₂ O ₃ is fixed. The pressing body 65 is fixed to the conductor 61 by a screw 66 at the peripheral edge thereof. Therefore, the slot body 64 is fixed while being sandwiched between two dielectric plates forming the slow wave path forming body 62 and the pressing body 65. Have been.

The planar arrangement of the slot holes 63 of the radial line slot antenna 54 is as shown in FIG.
A large number of a pair of slot holes 63 are arranged concentrically, and microwaves are radiated from these slot holes 63 into space. Reference numeral 67 in FIG. 4 denotes a screw hole. Further, a cooling pipe (not shown) for flowing cooling water for preventing heating by microwave power supply is inserted through the conductor 61 of the radial line slot antenna 54.

As shown in FIG. 3, a gas introduction port 68 is provided at the periphery of the upper part of the chamber 55, and a reaction gas supplied from a reaction gas supply source (not shown) is supplied to a pipe 69.
Is supplied to the plasma forming space 57 in the chamber 55 through the chamber. On the other hand, an exhaust port 70 is provided at a lower portion of the chamber 55, and the inside of the chamber 55 is depressurized by a vacuum exhaust source (not shown) such as a vacuum pump connected to the exhaust port 70. A load lock chamber 71 is provided on the side of the chamber 55 for loading and unloading the transparent substrate 12 without opening the inside of the chamber 55 to the atmosphere.

In the radial line slot antenna type plasma CVD film forming apparatus 53 having the above structure, a reaction gas necessary for film formation, for example, Si
Gases such as H ₄ and PH ₃ are supplied into the chamber 55.
Then, plasma is generated in the plasma forming space 57 by the microwave of 2.45 GHz radiated from the radial line slot antenna 54, and radicals generated by dissociation of the reaction gas cause a chemical reaction on the substrate surface, so that polycrystalline silicon is generated. A film 13 is formed.

FIG. 5 is a diagram showing a schematic configuration of a sputter film forming apparatus 33. The sputter film forming apparatus 33 is a two-frequency excitation type sputter film forming apparatus for forming the polycrystalline silicon film 13. is there.

The sputter film forming apparatus 33 shown in FIG. 5 has a chamber 39 which can be kept in a reduced pressure state, and a gate valve 40 is connected to the side of the chamber 39.
An upper electrode 41 is provided on the upper part of the chamber 39, a silicon target 42 is detachably mounted on the lower surface of the upper electrode 41, and a lower electrode 43 is provided on the lower part of the chamber 39. Substrate 12
Is detachably mounted. A known mounting means such as an electrostatic chuck is used for mounting the silicon target 42 or the transparent substrate 12.

Then, a first high-frequency power supply 44 is connected to the upper electrode 41, and a matching circuit 45 is incorporated between the upper electrode 41 and the first high-frequency power supply 44, so that a high-frequency reflected wave is It has the effect of making it zero. Further, a DC power supply 47 is connected to the upper electrode 41 via a band-pass filter 46 such as a low-pass filter for impedance adjustment. This bandpass filter 4
Numeral 6 is to adjust the impedance of the circuit to infinity so that high frequency does not get on the DC power supply 47. further,
A second high frequency power supply 48 is also connected to the lower electrode 43, and a matching circuit 49 having the same operation as the matching circuit 45 is provided between the lower electrode 43 and the second high frequency power supply 48.
Is incorporated. In addition, the sputtering film forming apparatus 33 includes:
It has an exhaust unit 50 for evacuation and gas exhaust, a gas supply mechanism 51 into the chamber 39, and the like.
In FIG. 5, these are simplified and shown.

When the polycrystalline silicon film 13 is formed by using the sputtering film forming apparatus 33, a helium gas atmosphere is set in the chamber 39, a silicon target 42 is formed on the upper electrode 41, and the transparent substrate 12 is formed on the lower electrode 43. In a state in which the high-frequency power is supplied from the first high-frequency power supply 44 to the upper electrode 41, the load DC power is supplied from the DC power supply 47, and the high-frequency power is supplied to the lower electrode 43 from the second high-frequency power supply 48. I do. Thereby, the silicon target 42 is sputtered by the helium ions, and the polycrystalline silicon film 13 is formed on the transparent substrate 12. When the sputtering method is used, it is desirable to use the two-frequency excitation sputtering method using helium gas as the sputtering gas.

The two types of film forming apparatuses 3 as described above
By forming a polycrystalline silicon film using 3, 53, a polycrystalline silicon film 13 having a mobility of about ^{2 to} 50 cm ² / V · sec required in the present invention can be formed. .

Next, as shown in FIG. 2A, of the polycrystalline silicon film 13, only the polycrystalline silicon film 13 corresponding to the peripheral circuit region 5 is subjected to laser annealing. In this case, a general laser annealing apparatus may be used, and the scanning area may be controlled so that the spot-shaped laser light is scanned only in the peripheral circuit area on the transparent substrate 12. Laser irradiation conditions are, for example, a KrF excimer laser having a wavelength of 248 nm or 308 nm and a pulse width of 20 nsec, and the power density of the laser is 100 to 300 mJ / cm ² , preferably 150 to 300 mJ / cm ² .
It is set to 200 mJ / cm ² . By this laser annealing process,
The portion irradiated with the laser beam, that is, the polycrystalline silicon film 13 in the peripheral circuit region 5 has a high mobility,
Polycrystalline silicon film 1 having a mobility of about 00 cm ² / V · sec
Change to 4.

Next, as shown in FIG.
The polycrystalline silicon films 13 and 14 in both the peripheral circuit region 5 are patterned using well-known photolithography and etching, and processed into the shape of the semiconductor active layer 15 of the TFT. The laser annealing may be performed after patterning the polycrystalline silicon film by reversing the above process order.

Next, a silicon oxide film 16 serving as a gate insulating film is formed on the entire surface of the substrate so as to cover the semiconductor active layer 15. Next, for example, Cu having a thickness of about 100 nm
After forming a metal film such as Al, photolithography,
This metal film is patterned by etching to form a gate electrode 17 and a gate line 3.

Next, as shown in FIG.
, An n-type impurity such as phosphorus or arsenic is ion-implanted from above the gate electrode 1 of the semiconductor active layer 15.
A region excluding the region below 7 is an n-type silicon layer, and a source region 18 and a drain region 19 are formed. Here, a region between the source region 18 and the drain region 19 becomes a channel region 20. Next, for example, a film thickness of 200 n
An interlayer insulating film 21 of about m silicon oxide film is formed. Next, the interlayer insulating film 21 is patterned by photolithography and etching to form contact holes 22 and 23 reaching the source region 18 and the drain region 19 of the semiconductor active film 15, respectively. Then
A metal film of, for example, Cu or Al having a thickness of about 100 nm is formed on the entire surface and patterned to form a source electrode 2.
4 and the source line 2 and the drain electrode 25 are formed.

Next, as shown in FIG. 2D, after a passivation film 26 made of a silicon nitride film is formed on the entire surface, the passivation film 26 is patterned by photolithography and etching, and the drain electrode 25 or the source electrode of each TFT is formed. Contact holes 27 and 28 reaching 24 are formed. Next, a transparent conductive film such as ITO or indium zinc oxide (ITZO) is formed on the entire surface and patterned to form a pixel driving TFT.
8, a pixel electrode 29 is formed, and a driver TFT is formed.
At 9, a wiring 10 for connection to the controller is formed. Through the above steps, the pixel driving TFT 8 and the driver TFT 9 having different driving capabilities are formed.

The TFT array substrate 1 of the present embodiment employs a radial line slot antenna type plasma CVD method or a dual frequency excitation sputtering method using helium as a sputtering gas, as exemplified in the above description of the manufacturing method. As a result, a polycrystalline silicon film 13 having higher mobility than before is formed as as.depo, and this is used as the semiconductor active layer of the TFT. Although the obtained semiconductor active layer having a mobility of about ^{2 to} 50 cm ² / V · sec has insufficient capacity for the driver TFT 9, the pixel driving TF
It is enough for T8 and can be used as it is as the semiconductor active layer 15. Therefore, in the next laser annealing step, only the portion of the peripheral circuit region 5 that becomes the driver TFT 9 needs to be laser-annealed, so that the load on the laser annealing device is reduced. In addition, since a certain degree of mobility has already been obtained in the polycrystalline silicon film 13 of as.depo, a conventional polycrystalline silicon film has a mobility of 200 to 400 mJ.
What needed power of about / cm ²
The laser power can be reduced to about 0 mJ / cm ² . Due to both the effect of performing laser annealing only on the peripheral circuit region 5 and the effect of reducing the laser power,
Variations in characteristics caused by the laser annealing can be reduced.

In the present embodiment, the pixel driving TF
A top gate structure was adopted for both T8 and driver TFT 9. When this structure is adopted, the semiconductor active layer 15
Since the source region 18 and the drain region 19 can be formed in a self-aligned manner, the number of masks used can be reduced and the manufacturing process can be simplified.

As described above, according to the present embodiment, the manufacturing process can be simplified. In particular, by simplifying the steps around the formation of the polycrystalline silicon film, it is possible to expect a reduction in manufacturing cost, a reduction in TAT, and the like. In addition, it is possible to provide a TFT array substrate with a built-in driver circuit having less variation in characteristics.

An example of a liquid crystal display using the TFT array substrate 1 of the present embodiment will be described with reference to FIG. As shown in FIG. 6, the liquid crystal display device 73 of the present embodiment has a pair of transparent substrates 12 and 74 arranged opposite to each other, and one of the transparent substrates 12 and 74 is provided with the TFT array substrate. 1. The other substrate 74 is a counter substrate 75. The pixel electrode 29 is provided on the opposite surface side of the TFT array substrate 1, and the common electrode 76 is provided on the opposite surface side of the opposite substrate 75. Further, these pixel electrodes 29,
An alignment film (not shown) is provided on each of the common electrodes 76, and a liquid crystal layer 77 is provided between these alignment films. Then, first and second polarizing plates 78 and 79 are provided outside the transparent substrates 12 and 74, respectively, and a backlight 80 is attached outside the first polarizing plate 78.

According to the liquid crystal display device 73 of the present embodiment, the use of the above-described TFT array substrate 1 makes it possible to realize a reduction in manufacturing cost, a reduction in TAT, a reduction in characteristic variations, and the like.

The technical scope of the present invention is not limited to the above embodiment, and various changes can be made without departing from the spirit of the present invention. For example, the various process conditions and the like in the method of manufacturing a TFT array substrate described in the above embodiment are merely examples, and it is needless to say that they can be changed. Although an example has been described in which laser annealing is performed on both the source driver and the gate driver, the laser annealing may be performed on only one of the drivers according to the required driving capability of the TFT. Good. Further, the pixel driving TFT and the driver TFT formed on the TFT array substrate do not necessarily have to be of a top gate type, and may be of a bottom gate type. Further, the TFT array substrate can be applied to other display devices other than the liquid crystal display device.

[0047]

As described in detail above, according to the present invention, the manufacturing process can be simplified. In particular, the manufacturing cost can be reduced by simplifying the steps around the formation of the polycrystalline silicon film, and the TAT can be reduced. It is possible to provide a TFT array substrate for a display device with a built-in driver circuit, which can be expected to be shortened and has little characteristic variation.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of a TFT array substrate according to an embodiment of the present invention.

2 is a diagram showing a cross-sectional structure of a TFT formed on the same substrate, wherein a right side of a break line is a cross-sectional view showing a pixel driving TFT (a cross-sectional view along line AA in FIG. 1), and a break line. Is a cross-sectional view (a cross-sectional view along the line BB in FIG. 1) showing the driver TFT.

FIG. 3 is a schematic configuration diagram of a radial line slot antenna type plasma CVD apparatus used for manufacturing a TFT array substrate.

FIG. 4 is a plan view showing a radial line slot antenna of the plasma CVD apparatus.

FIG. 5 is a schematic configuration diagram of a sputtering apparatus used for manufacturing a TFT array substrate.

FIG. 6 is a schematic configuration diagram of a liquid crystal display device according to an embodiment of the present invention.

FIG. 7 is a cross-sectional view illustrating an example of a conventional top gate type TFT.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 TFT array substrate (thin film transistor array substrate for display device) 2 source line 3 gate line 4 display area 5 peripheral circuit area 6 source driver 7 gate driver 8 pixel driving TFT 9 driver TFT 13 polycrystalline silicon film (low mobility poly) Crystal silicon) 14 polycrystalline silicon film (high mobility polycrystalline silicon) 15 semiconductor active layer 33 sputter film forming device 53 radial line slot antenna type plasma CVD device 73 liquid crystal display device

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI theme coat ゛ (Reference) H01L 21/336 H01L 29/78 618Z F term (Reference) 2H092 GA59 JA25 JA29 JA38 JA42 JA44 JA46 JB13 JB23 JB32 JB33 JB38 JB51 JB57 JB63 JB69 KA04 KA16 KA18 KB24 MA05 MA08 MA22 NA24 NA25 NA27 5C094 AA13 AA25 AA43 AA44 AA48 AA53 BA03 BA43 CA19 DA09 DA13 DB01 DB04 EA04 EB02 FB02 FB14 GB10 5F048 AA09 BB02 BB02 FB02 JA04 JB04 5F110 AA16 AA30 BB02 CC06 DD02 EE02 EE03 EE07 FF02 GG13 GG43 GG45 GG58 HK02 HK03 HL02 HL03 NN23 NN24 PP03 PP15 QQ23

Claims (5)

[Claims] 1. A pixel driving thin film transistor connected to a pixel and controlling writing of an image signal to the pixel, a source driver thin film transistor supplying the image signal to the pixel driving thin film transistor, and the pixel A gate driver thin film transistor for driving a driving thin film transistor, wherein the semiconductor active layer of the pixel driving thin film transistor is made of low-mobility polycrystalline silicon formed without heat treatment after film formation; Wherein at least one semiconductor active layer of the thin film transistor for thin film transistor and the thin film transistor for gate driver is made of high mobility polycrystalline silicon obtained by subjecting the low mobility polycrystalline silicon to heat treatment. Thin film transistor array substrate. 2. The thin film transistor array substrate for a display device according to claim 1, wherein each of the pixel driving thin film transistor, the source driver thin film transistor, and the gate driver thin film transistor is a top gate thin film transistor. 3. The thin film transistor array substrate for a display device according to claim 1, wherein said low mobility polycrystalline silicon is a film formed by a plasma CVD film forming method of a radial line slot antenna system. 4. The thin film transistor array substrate for a display device according to claim 1, wherein the low mobility polycrystalline silicon is a film formed by a sputtering film forming method. 5. A display device using the thin film transistor array substrate for a display device according to claim 1.